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hv: refine a few functions to only one exit point

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IEC 61508,ISO 26262 standards highly recommend single-exit rule.
7C: Procedure has more than one exit point.

Tracked-On: #861
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Zide Chen 2018-12-14 20:04:41 -08:00 committed by wenlingz
parent 64a463000f
commit 4c28e98dc4
3 changed files with 65 additions and 65 deletions
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5
hypervisor/arch/x86/guest/vmtrr.c
View File

@ -44,10 +44,11 @@ static uint32_t get_index_of_fixed_mtrr(uint32_t msr)
for (i = 0U; i < FIXED_RANGE_MTRR_NUM; i++) {
if (fixed_mtrr_map[i].msr == msr) {
return i;
break;
}
}
return FIXED_MTRR_INVALID_INDEX;
return (i < FIXED_RANGE_MTRR_NUM) ? i : FIXED_MTRR_INVALID_INDEX;
}
static uint32_t

49
hypervisor/dm/vioapic.c
View File

@ -55,26 +55,23 @@ vioapic_send_intr(struct acrn_vioapic *vioapic, uint32_t pin)
if ((rte.full & IOAPIC_RTE_INTMASK) == IOAPIC_RTE_INTMSET) {
dev_dbg(ACRN_DBG_IOAPIC, "ioapic pin%hhu: masked", pin);
return;
}
} else {
phys = ((rte.full & IOAPIC_RTE_DESTMOD) == IOAPIC_RTE_DESTPHY);
delmode = (uint32_t)(rte.full & IOAPIC_RTE_DELMOD);
level = ((rte.full & IOAPIC_RTE_TRGRLVL) != 0UL);
phys = ((rte.full & IOAPIC_RTE_DESTMOD) == IOAPIC_RTE_DESTPHY);
delmode = (uint32_t)(rte.full & IOAPIC_RTE_DELMOD);
level = ((rte.full & IOAPIC_RTE_TRGRLVL) != 0UL);
/* For level trigger irq, avoid send intr if
* previous one hasn't received EOI
*/
if (level) {
if ((vioapic->rtbl[pin].full & IOAPIC_RTE_REM_IRR) != 0UL) {
return;
/* For level trigger irq, avoid send intr if
* previous one hasn't received EOI
*/
if (!level || ((vioapic->rtbl[pin].full & IOAPIC_RTE_REM_IRR) == 0UL)) {
if (level) {
vioapic->rtbl[pin].full |= IOAPIC_RTE_REM_IRR;
}
vector = rte.u.lo_32 & IOAPIC_RTE_LOW_INTVEC;
dest = (uint32_t)(rte.full >> IOAPIC_RTE_DEST_SHIFT);
vlapic_deliver_intr(vioapic->vm, level, dest, phys, delmode, vector, false);
}
vioapic->rtbl[pin].full |= IOAPIC_RTE_REM_IRR;
}
vector = rte.u.lo_32 & IOAPIC_RTE_LOW_INTVEC;
dest = (uint32_t)(rte.full >> IOAPIC_RTE_DEST_SHIFT);
vlapic_deliver_intr(vioapic->vm, level, dest, phys,
delmode, vector, false);
}
/**
@ -216,18 +213,20 @@ vioapic_update_tmr(struct acrn_vcpu *vcpu)
static uint32_t
vioapic_indirect_read(const struct acrn_vioapic *vioapic, uint32_t addr)
{
uint32_t regnum;
uint32_t regnum, ret = 0U;
uint32_t pin, pincount = vioapic_pincount(vioapic->vm);
regnum = addr & 0xffU;
switch (regnum) {
case IOAPIC_ID:
return vioapic->id;
ret = vioapic->id;
break;
case IOAPIC_VER:
return (((uint32_t)pincount - 1U) << MAX_RTE_SHIFT) |
ACRN_IOAPIC_VERSION;
ret = (((uint32_t)pincount - 1U) << MAX_RTE_SHIFT) | ACRN_IOAPIC_VERSION;
break;
case IOAPIC_ARB:
return vioapic->id;
ret = vioapic->id;
break;
default:
/*
* In this switch statement, regnum shall either be IOAPIC_ID or
@ -245,13 +244,13 @@ vioapic_indirect_read(const struct acrn_vioapic *vioapic, uint32_t addr)
uint32_t rte_offset = addr_offset >> 1U;
pin = rte_offset;
if ((addr_offset & 0x1U) != 0U) {
return vioapic->rtbl[pin].u.hi_32;
ret = vioapic->rtbl[pin].u.hi_32;
} else {
return vioapic->rtbl[pin].u.lo_32;
ret = vioapic->rtbl[pin].u.lo_32;
}
}
return 0;
return ret;
}
static inline bool vioapic_need_intr(const struct acrn_vioapic *vioapic, uint16_t pin)

76
hypervisor/dm/vpic.c
View File

@ -49,6 +49,7 @@ static inline bool master_pic(const struct acrn_vpic *vpic, struct i8259_reg_sta
static inline uint8_t vpic_get_highest_isrpin(const struct i8259_reg_state *i8259)
{
uint8_t bit, pin, i;
uint8_t found_pin = VPIC_INVALID_PIN;
pin = (i8259->lowprio + 1U) & 0x7U;
@ -64,18 +65,20 @@ static inline uint8_t vpic_get_highest_isrpin(const struct i8259_reg_state *i825
pin = (pin + 1U) & 0x7U;
continue;
} else {
return pin;
found_pin = pin;
break;
}
}
pin = (pin + 1U) & 0x7U;
}
return VPIC_INVALID_PIN;
return found_pin;
}
static inline uint8_t vpic_get_highest_irrpin(const struct i8259_reg_state *i8259)
{
uint8_t serviced, bit, pin, tmp;
uint8_t found_pin = VPIC_INVALID_PIN;
/*
* In 'Special Fully-Nested Mode' when an interrupt request from
@ -115,13 +118,14 @@ static inline uint8_t vpic_get_highest_irrpin(const struct i8259_reg_state *i825
* the corresponding 'pin' to the caller.
*/
if (((i8259->request & bit) != 0) && ((i8259->mask & bit) == 0)) {
return pin;
found_pin = pin;
break;
}
pin = (pin + 1U) & 0x7U;
}
return VPIC_INVALID_PIN;
return found_pin;
}
static void vpic_notify_intr(struct acrn_vpic *vpic)
@ -457,42 +461,38 @@ void vpic_set_irq(struct acrn_vm *vm, uint32_t irq, uint32_t operation)
struct i8259_reg_state *i8259;
uint8_t pin;
if (irq >= NR_VPIC_PINS_TOTAL) {
return;
}
if (irq < NR_VPIC_PINS_TOTAL) {
vpic = vm_pic(vm);
i8259 = &vpic->i8259[irq >> 3U];
pin = (uint8_t)irq;
vpic = vm_pic(vm);
i8259 = &vpic->i8259[irq >> 3U];
pin = (uint8_t)irq;
if (i8259->ready == false) {
return;
if (i8259->ready) {
spinlock_obtain(&(vpic->lock));
switch (operation) {
case GSI_SET_HIGH:
vpic_set_pinstate(vpic, pin, 1U);
break;
case GSI_SET_LOW:
vpic_set_pinstate(vpic, pin, 0U);
break;
case GSI_RAISING_PULSE:
vpic_set_pinstate(vpic, pin, 1U);
vpic_set_pinstate(vpic, pin, 0U);
break;
case GSI_FALLING_PULSE:
vpic_set_pinstate(vpic, pin, 0U);
vpic_set_pinstate(vpic, pin, 1U);
break;
default:
/*
* The function caller could guarantee the pre condition.
*/
break;
}
vpic_notify_intr(vpic);
spinlock_release(&(vpic->lock));
}
}
spinlock_obtain(&(vpic->lock));
switch (operation) {
case GSI_SET_HIGH:
vpic_set_pinstate(vpic, pin, 1U);
break;
case GSI_SET_LOW:
vpic_set_pinstate(vpic, pin, 0U);
break;
case GSI_RAISING_PULSE:
vpic_set_pinstate(vpic, pin, 1U);
vpic_set_pinstate(vpic, pin, 0U);
break;
case GSI_FALLING_PULSE:
vpic_set_pinstate(vpic, pin, 0U);
vpic_set_pinstate(vpic, pin, 1U);
break;
default:
/*
* The function caller could guarantee the pre condition.
*/
break;
}
vpic_notify_intr(vpic);
spinlock_release(&(vpic->lock));
}
uint32_t