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HV:treewide:Add 16-bit atomic operations and update vpid type

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There are some integer type conversions reported by static
analysis tool for vcpu id, number of created vcpus, and
vpid, to reduce these type conversions, redesign vcpu id,
number of created vcpus, and vpid type as uint16_t as per
their usage, related 16-bit atomic operations shall be
added in HV.
MISRA C requires that all unsigned constants should have the suffix 'U'
(e.g. 0xffU), but the assembler may not accept such C-style constants.

Add 16-bit atomic add/dec/store operations;
Update temporary variables type and parameters type of
related caller;
Update vpid type as uint16_t;
Replace Macro with constant value for CPU_PAGE_SIZE.

Note: According to SDM A.10, there are some bits defined
in the IA32_VMX_EPT_VPID_CAP MSR to support the INVVPID
instruction, these bits don't mean actual VPID, so
the vpid field in the data struct vmx_capability doesn't
be updated.

V1--V2:
	update comments for assembly code as per coding style;

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
This commit is contained in:
Xiangyang Wu
2018-07-11 11:09:10 +08:00
committed by Jack Ren
parent a23549aa91
commit 4dc39fdb8e
11 changed files with 40 additions and 28 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
hypervisor/include/arch/x86/guest/vcpu.h
View File

@@ -192,7 +192,7 @@ struct vcpu_arch {
/* A pointer to the VMCS for this CPU. */
void *vmcs;
int vpid;
uint16_t vpid;
/* Holds the information needed for IRQ/exception handling. */
struct {

2
hypervisor/include/arch/x86/guest/vm.h
View File

@@ -23,7 +23,7 @@ struct vm_attr {
struct vm_hw_info {
uint16_t num_vcpus; /* Number of total virtual cores */
uint16_t exp_num_vcpus; /* Number of real expected virtual cores */
int created_vcpus; /* Number of created vcpus */
uint16_t created_vcpus; /* Number of created vcpus */
struct vcpu **vcpu_array; /* vcpu array of this VM */
uint64_t gpa_lowtop; /* top lowmem gpa of this VM */
};

4
hypervisor/include/arch/x86/mmu.h
View File

@@ -326,8 +326,8 @@ int modify_mem(struct map_params *map_params, void *paddr, void *vaddr,
int modify_mem_mt(struct map_params *map_params, void *paddr, void *vaddr,
uint64_t size, uint32_t flags);
int check_vmx_mmu_cap(void);
int allocate_vpid(void);
void flush_vpid_single(int vpid);
uint16_t allocate_vpid(void);
void flush_vpid_single(uint16_t vpid);
void flush_vpid_global(void);
void invept(struct vcpu *vcpu);
bool check_continuous_hpa(struct vm *vm, uint64_t gpa, uint64_t size);

4
hypervisor/include/arch/x86/vmx.h
View File

@@ -314,8 +314,8 @@
#define VMX_EPT_INVEPT_SINGLE_CONTEXT (1U << 25)
#define VMX_EPT_INVEPT_GLOBAL_CONTEXT (1U << 26)
#define VMX_MIN_NR_VPID 1
#define VMX_MAX_NR_VPID (1 << 5)
#define VMX_MIN_NR_VPID 1U
#define VMX_MAX_NR_VPID (1U << 5)
#define VMX_VPID_TYPE_INDIVIDUAL_ADDR 0UL
#define VMX_VPID_TYPE_SINGLE_CONTEXT 1UL

3
hypervisor/include/lib/atomic.h
View File

@@ -53,6 +53,7 @@ static inline void name(volatile type *ptr, type v) \
: "r" (v) \
: "cc", "memory"); \
}
build_atomic_store(atomic_store16, "w", uint16_t, p, v)
build_atomic_store(atomic_store, "l", int, p, v)
build_atomic_store(atomic_store64, "q", long, p, v)
@@ -73,6 +74,7 @@ static inline void name(type *ptr) \
: "=m" (*ptr) \
: "m" (*ptr)); \
}
build_atomic_dec(atomic_dec16, "w", uint16_t, p)
build_atomic_dec(atomic_dec, "l", int, p)
build_atomic_dec(atomic_dec64, "q", long, p)
@@ -167,6 +169,7 @@ static inline type name(type *ptr, type v) \
: "cc", "memory"); \
return v; \
}
build_atomic_xadd(atomic_xadd16, "w", uint16_t, p, v)
build_atomic_xadd(atomic_xadd, "l", int, p, v)
build_atomic_xadd(atomic_xadd64, "q", long, p, v)