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https://github.com/projectacrn/acrn-hypervisor.git
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hv: vpic: Change interrupt pin to uint32_t
-- Change the type from uint8_t to uint32_t -- Remove some typecast Tracked-On: #861 Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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50deda8819
@ -31,7 +31,7 @@
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#define ACRN_DBG_PIC 6U
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static void vpic_set_pinstate(struct acrn_vpic *vpic, uint8_t pin, uint8_t level);
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static void vpic_set_pinstate(struct acrn_vpic *vpic, uint32_t pin, uint8_t level);
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static inline bool master_pic(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259)
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{
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@ -46,15 +46,15 @@ static inline bool master_pic(const struct acrn_vpic *vpic, struct i8259_reg_sta
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return ret;
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}
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static inline uint8_t vpic_get_highest_isrpin(const struct i8259_reg_state *i8259)
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static inline uint32_t vpic_get_highest_isrpin(const struct i8259_reg_state *i8259)
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{
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uint8_t bit, pin, i;
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uint8_t found_pin = VPIC_INVALID_PIN;
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uint32_t bit, pin, i;
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uint32_t found_pin = VPIC_INVALID_PIN;
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pin = (i8259->lowprio + 1U) & 0x7U;
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for (i = 0U; i < NR_VPIC_PINS_PER_CHIP; i++) {
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bit = (uint8_t)(1U << pin);
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bit = (1U << pin);
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if ((i8259->service & bit) != 0U) {
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/*
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@ -75,10 +75,11 @@ static inline uint8_t vpic_get_highest_isrpin(const struct i8259_reg_state *i825
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return found_pin;
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}
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static inline uint8_t vpic_get_highest_irrpin(const struct i8259_reg_state *i8259)
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static inline uint32_t vpic_get_highest_irrpin(const struct i8259_reg_state *i8259)
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{
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uint8_t serviced, bit, pin, tmp;
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uint8_t found_pin = VPIC_INVALID_PIN;
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uint8_t serviced;
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uint32_t bit, pin, tmp;
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uint32_t found_pin = VPIC_INVALID_PIN;
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/*
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* In 'Special Fully-Nested Mode' when an interrupt request from
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@ -103,13 +104,13 @@ static inline uint8_t vpic_get_highest_irrpin(const struct i8259_reg_state *i825
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pin = (i8259->lowprio + 1U) & 0x7U;
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for (tmp = 0U; tmp < NR_VPIC_PINS_PER_CHIP; tmp++) {
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bit = (uint8_t)(1U << pin);
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bit = (1U << pin);
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/*
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* If there is already an interrupt in service at the same
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* or higher priority then bail.
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*/
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if ((serviced & bit) != 0) {
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if ((serviced & bit) != 0U) {
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break;
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}
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@ -117,7 +118,7 @@ static inline uint8_t vpic_get_highest_irrpin(const struct i8259_reg_state *i825
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* If an interrupt is asserted and not masked then return
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* the corresponding 'pin' to the caller.
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*/
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if (((i8259->request & bit) != 0) && ((i8259->mask & bit) == 0)) {
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if (((i8259->request & bit) != 0U) && ((i8259->mask & bit) == 0U)) {
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found_pin = pin;
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break;
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}
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@ -131,7 +132,7 @@ static inline uint8_t vpic_get_highest_irrpin(const struct i8259_reg_state *i825
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static void vpic_notify_intr(struct acrn_vpic *vpic)
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{
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struct i8259_reg_state *i8259;
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uint8_t pin;
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uint32_t pin;
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/*
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* First check the slave.
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@ -147,8 +148,8 @@ static void vpic_notify_intr(struct acrn_vpic *vpic)
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* Cascade the request from the slave to the master.
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*/
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i8259->intr_raised = true;
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vpic_set_pinstate(vpic, (uint8_t)2U, 1U);
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vpic_set_pinstate(vpic, (uint8_t)2U, 0U);
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vpic_set_pinstate(vpic, 2U, 1U);
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vpic_set_pinstate(vpic, 2U, 0U);
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} else {
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dev_dbg(ACRN_DBG_PIC,
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"pic slave no eligible interrupt (imr 0x%x irr 0x%x isr 0x%x)",
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@ -303,7 +304,7 @@ static int32_t vpic_icw4(const struct acrn_vpic *vpic, struct i8259_reg_state *i
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static int32_t vpic_ocw1(const struct acrn_vpic *vpic, struct i8259_reg_state *i8259, uint8_t val)
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{
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uint8_t pin, i, bit;
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uint32_t pin, i, bit;
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uint8_t old = i8259->mask;
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dev_dbg(ACRN_DBG_PIC, "vm 0x%x: i8259 ocw1 0x%x\n",
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@ -314,13 +315,13 @@ static int32_t vpic_ocw1(const struct acrn_vpic *vpic, struct i8259_reg_state *i
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/* query and setup if pin/irq is for passthrough device */
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for (i = 0U; i < NR_VPIC_PINS_PER_CHIP; i++) {
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bit = (uint8_t)(1U << pin);
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bit = (1U << pin);
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/* remap for active: interrupt mask -> unmask
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* remap for deactive: when vIOAPIC take it over
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*/
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if (((i8259->mask & bit) == 0U) && ((old & bit) != 0U)) {
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uint8_t virt_pin;
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uint32_t virt_pin;
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/* master i8259 pin2 connect with slave i8259,
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* not device, so not need pt remap
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@ -332,8 +333,7 @@ static int32_t vpic_ocw1(const struct acrn_vpic *vpic, struct i8259_reg_state *i
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virt_pin = (master_pic(vpic, i8259)) ?
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pin : (pin + 8U);
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(void)ptirq_intx_pin_remap(vpic->vm,
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virt_pin, PTDEV_VPIN_PIC);
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(void)ptirq_intx_pin_remap(vpic->vm, virt_pin, PTDEV_VPIN_PIC);
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}
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pin = (pin + 1U) & 0x7U;
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}
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@ -349,7 +349,7 @@ static int32_t vpic_ocw2(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
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i8259->rotate = ((val & OCW2_R) != 0U);
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if ((val & OCW2_EOI) != 0U) {
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uint8_t isr_bit;
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uint32_t isr_bit;
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if ((val & OCW2_SL) != 0U) {
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/* specific EOI */
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@ -369,9 +369,8 @@ static int32_t vpic_ocw2(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
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/* if level ack PTDEV */
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if ((i8259->elc & (1U << (isr_bit & 0x7U))) != 0U) {
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ptirq_intx_ack(vpic->vm,
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(master_pic(vpic, i8259) ? isr_bit : isr_bit + 8U),
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PTDEV_VPIN_PIC);
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ptirq_intx_ack(vpic->vm, (master_pic(vpic, i8259) ? isr_bit : isr_bit + 8U),
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PTDEV_VPIN_PIC);
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}
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} else if (((val & OCW2_SL) != 0U) && i8259->rotate) {
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/* specific priority */
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@ -409,8 +408,7 @@ static int32_t vpic_ocw3(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
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/**
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* @pre pin < NR_VPIC_PINS_TOTAL
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*/
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static void vpic_set_pinstate(struct acrn_vpic *vpic, uint8_t pin,
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uint8_t level)
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static void vpic_set_pinstate(struct acrn_vpic *vpic, uint32_t pin, uint8_t level)
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{
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struct i8259_reg_state *i8259;
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uint8_t old_lvl;
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@ -449,22 +447,22 @@ static void vpic_set_pinstate(struct acrn_vpic *vpic, uint8_t pin,
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* @brief Set vPIC IRQ line status.
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*
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* @param[in] vm Pointer to target VM
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* @param[in] irq Target IRQ number
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* @param[in] irqline Target IRQ number
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* @param[in] operation action options:GSI_SET_HIGH/GSI_SET_LOW/
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* GSI_RAISING_PULSE/GSI_FALLING_PULSE
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*
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* @return None
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*/
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void vpic_set_irqline(struct acrn_vm *vm, uint32_t irq, uint32_t operation)
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void vpic_set_irqline(struct acrn_vm *vm, uint32_t irqline, uint32_t operation)
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{
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struct acrn_vpic *vpic;
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struct i8259_reg_state *i8259;
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uint8_t pin;
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uint32_t pin;
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if (irq < NR_VPIC_PINS_TOTAL) {
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if (irqline < NR_VPIC_PINS_TOTAL) {
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vpic = vm_pic(vm);
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i8259 = &vpic->i8259[irq >> 3U];
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pin = (uint8_t)irq;
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i8259 = &vpic->i8259[irqline >> 3U];
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pin = irqline;
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if (i8259->ready) {
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spinlock_obtain(&(vpic->lock));
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@ -503,16 +501,16 @@ vpic_pincount(void)
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/**
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* @pre vm->vpic != NULL
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* @pre irq < NR_VPIC_PINS_TOTAL
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* @pre irqline < NR_VPIC_PINS_TOTAL
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*/
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void vpic_get_irqline_trigger_mode(struct acrn_vm *vm, uint32_t irq,
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void vpic_get_irqline_trigger_mode(struct acrn_vm *vm, uint32_t irqline,
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enum vpic_trigger *trigger)
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{
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struct acrn_vpic *vpic;
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vpic = vm_pic(vm);
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if ((vpic->i8259[irq >> 3U].elc & (1U << (irq & 0x7U))) != 0U) {
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if ((vpic->i8259[irqline >> 3U].elc & (1U << (irqline & 0x7U))) != 0U) {
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*trigger = LEVEL_TRIGGER;
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} else {
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*trigger = EDGE_TRIGGER;
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@ -532,7 +530,7 @@ void vpic_pending_intr(struct acrn_vm *vm, uint32_t *vecptr)
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{
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struct acrn_vpic *vpic;
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struct i8259_reg_state *i8259;
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uint8_t pin;
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uint32_t pin;
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vpic = vm_pic(vm);
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@ -561,7 +559,7 @@ void vpic_pending_intr(struct acrn_vm *vm, uint32_t *vecptr)
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spinlock_release(&(vpic->lock));
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}
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static void vpic_pin_accepted(struct i8259_reg_state *i8259, uint8_t pin)
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static void vpic_pin_accepted(struct i8259_reg_state *i8259, uint32_t pin)
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{
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i8259->intr_raised = false;
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@ -592,13 +590,13 @@ static void vpic_pin_accepted(struct i8259_reg_state *i8259, uint8_t pin)
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void vpic_intr_accepted(struct acrn_vm *vm, uint32_t vector)
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{
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struct acrn_vpic *vpic;
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uint8_t pin;
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uint32_t pin;
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vpic = vm_pic(vm);
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spinlock_obtain(&(vpic->lock));
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pin = (uint8_t)(vector & 0x7U);
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pin = (vector & 0x7U);
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if ((vector & ~0x7U) == vpic->i8259[1].irq_base) {
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vpic_pin_accepted(&vpic->i8259[1], pin);
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@ -606,7 +604,7 @@ void vpic_intr_accepted(struct acrn_vm *vm, uint32_t vector)
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* If this vector originated from the slave,
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* accept the cascaded interrupt too.
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*/
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vpic_pin_accepted(&vpic->i8259[0], (uint8_t)2U);
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vpic_pin_accepted(&vpic->i8259[0], 2U);
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} else {
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vpic_pin_accepted(&vpic->i8259[0], pin);
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}
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@ -619,7 +617,7 @@ void vpic_intr_accepted(struct acrn_vm *vm, uint32_t vector)
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static int32_t vpic_read(struct acrn_vpic *vpic, struct i8259_reg_state *i8259,
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uint16_t port, uint32_t *eax)
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{
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uint8_t pin;
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uint32_t pin;
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spinlock_obtain(&(vpic->lock));
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@ -118,7 +118,7 @@ struct i8259_reg_state {
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uint8_t smm; /* special mask mode */
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uint8_t pin_state[8]; /* pin state for level */
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uint8_t lowprio; /* lowest priority irq */
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uint32_t lowprio; /* lowest priority irq */
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bool intr_raised;
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uint8_t elc;
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@ -144,13 +144,13 @@ void vpic_init(struct acrn_vm *vm);
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* @brief Set vPIC IRQ line status.
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*
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* @param[in] vm Pointer to target VM
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* @param[in] irq Target IRQ number
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* @param[in] irqline Target IRQ number
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* @param[in] operation action options:GSI_SET_HIGH/GSI_SET_LOW/
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* GSI_RAISING_PULSE/GSI_FALLING_PULSE
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*
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* @return None
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*/
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void vpic_set_irqline(struct acrn_vm *vm, uint32_t irq, uint32_t operation);
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void vpic_set_irqline(struct acrn_vm *vm, uint32_t irqline, uint32_t operation);
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/**
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* @brief Get pending virtual interrupts for vPIC.
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@ -174,7 +174,7 @@ void vpic_pending_intr(struct acrn_vm *vm, uint32_t *vecptr);
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* @pre vm != NULL
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*/
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void vpic_intr_accepted(struct acrn_vm *vm, uint32_t vector);
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void vpic_get_irqline_trigger_mode(struct acrn_vm *vm, uint32_t irq, enum vpic_trigger *trigger);
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void vpic_get_irqline_trigger_mode(struct acrn_vm *vm, uint32_t irqline, enum vpic_trigger *trigger);
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uint32_t vpic_pincount(void);
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/**
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