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hv: treewide: fix 'Expression is not Boolean'

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MISRA-C requires that the controlling expression of an if statement or
an iteration-statement shall be Boolean type.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
Shiqing Gao 2018-08-27 14:41:32 +08:00 committed by lijinxia
parent f611012d28
commit 54439ecae1
15 changed files with 42 additions and 37 deletions
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6
hypervisor/arch/x86/guest/pm.c
View File

@ -161,9 +161,9 @@ static void pm1ab_io_write(__unused struct vm_io_handler *hdlr,
if ((addr == vm->pm.sx_state_data->pm1a_cnt.address)
&& (val == vm->pm.sx_state_data->s3_pkg.val_pm1a)
&& s3_enabled(v)) {
&& (s3_enabled(v) != 0U)) {
if (vm->pm.sx_state_data->pm1b_cnt.address) {
if (vm->pm.sx_state_data->pm1b_cnt.address != 0UL) {
pm1a_cnt_ready = v;
} else {
enter_s3(vm, v, 0U);
@ -173,7 +173,7 @@ static void pm1ab_io_write(__unused struct vm_io_handler *hdlr,
if ((addr == vm->pm.sx_state_data->pm1b_cnt.address)
&& (val == vm->pm.sx_state_data->s3_pkg.val_pm1b)
&& s3_enabled(v)) {
&& (s3_enabled(v) != 0U)) {
if (pm1a_cnt_ready != 0U) {
enter_s3(vm, pm1a_cnt_ready, v);

4
hypervisor/arch/x86/guest/vlapic.c
View File

@ -309,7 +309,7 @@ set_expiration(struct acrn_vlapic *vlapic)
tmicr = vtimer->tmicr;
divisor_shift = vtimer->divisor_shift;
if (!tmicr || (divisor_shift > 8U)) {
if ((tmicr == 0U) || (divisor_shift > 8U)) {
return false;
}
@ -355,7 +355,7 @@ static uint32_t vlapic_get_ccr(struct acrn_vlapic *vlapic)
vtimer = &vlapic->vtimer;
if (vtimer->tmicr && !vlapic_lvtt_tsc_deadline(vlapic)) {
if ((vtimer->tmicr != 0U) && !vlapic_lvtt_tsc_deadline(vlapic)) {
uint64_t fire_tsc = vtimer->timer.fire_tsc;
if (now < fire_tsc) {

2
hypervisor/arch/x86/guest/vm.c
View File

@ -283,7 +283,7 @@ int shutdown_vm(struct vm *vm)
vioapic_cleanup(vm_ioapic(vm));
/* Destroy secure world */
if (vm->sworld_control.flag.active) {
if (vm->sworld_control.flag.active != 0UL) {
destroy_secure_world(vm, true);
}
/* Free EPT allocated resources assigned to VM */

2
hypervisor/arch/x86/mmu.c
View File

@ -180,7 +180,7 @@ void invept(struct vcpu *vcpu)
desc.eptp = HVA2HPA(vcpu->vm->arch_vm.nworld_eptp) |
(3UL << 3U) | 6UL;
local_invept(INVEPT_TYPE_SINGLE_CONTEXT, desc);
if (vcpu->vm->sworld_control.flag.active) {
if (vcpu->vm->sworld_control.flag.active != 0UL) {
desc.eptp = HVA2HPA(vcpu->vm->arch_vm.sworld_eptp)
| (3UL << 3U) | 6UL;
local_invept(INVEPT_TYPE_SINGLE_CONTEXT, desc);

24
hypervisor/arch/x86/mtrr.c
View File

@ -70,8 +70,8 @@ static inline bool is_mtrr_enabled(struct vcpu *vcpu)
static inline bool is_fixed_range_mtrr_enabled(struct vcpu *vcpu)
{
return (vcpu->mtrr.cap.bits.fix &&
vcpu->mtrr.def_type.bits.fixed_enable);
return ((vcpu->mtrr.cap.bits.fix != 0U) &&
(vcpu->mtrr.def_type.bits.fixed_enable != 0U));
}
static inline uint8_t get_default_memory_type(struct vcpu *vcpu)
@ -99,21 +99,23 @@ void init_mtrr(struct vcpu *vcpu)
cap.value = msr_read(MSR_IA32_MTRR_CAP);
for (i = 0U; i < FIXED_RANGE_MTRR_NUM; i++) {
if (cap.bits.fix) {
if (cap.bits.fix != 0U) {
/*
* The system firmware runs in VMX non-root mode on VM0.
* In some cases, the firmware needs particular mem type at
* certain mmeory locations (e.g. UC for some hardware
* registers), so we need to configure EPT according to the
* content of physical MTRRs.
* In some cases, the firmware needs particular mem type
* at certain mmeory locations (e.g. UC for some
* hardware registers), so we need to configure EPT
* according to the content of physical MTRRs.
*/
vcpu->mtrr.fixed_range[i].value = msr_read(fixed_mtrr_map[i].msr);
vcpu->mtrr.fixed_range[i].value =
msr_read(fixed_mtrr_map[i].msr);
} else {
/*
* For non-vm0 EPT, all memory is setup with WB type in EPT,
* so we setup fixed range MTRRs accordingly
* For non-vm0 EPT, all memory is setup with WB type in
* EPT, so we setup fixed range MTRRs accordingly.
*/
vcpu->mtrr.fixed_range[i].value = MTRR_FIXED_RANGE_ALL_WB;
vcpu->mtrr.fixed_range[i].value =
MTRR_FIXED_RANGE_ALL_WB;
}
pr_dbg("vm%d vcpu%hu fixed-range MTRR[%u]: %16llx",

5
hypervisor/arch/x86/notify.c
View File

@ -22,7 +22,7 @@ static void kick_notification(__unused uint32_t irq, __unused void *data)
struct smp_call_info_data *smp_call =
&per_cpu(smp_call_info, pcpu_id);
if (smp_call->func)
if (smp_call->func != NULL)
smp_call->func(smp_call->data);
bitmap_clear_nolock(pcpu_id, &smp_call_mask);
}
@ -34,7 +34,8 @@ void smp_call_function(uint64_t mask, smp_call_func_t func, void *data)
struct smp_call_info_data *smp_call;
/* wait for previous smp call complete, which may run on other cpus */
while (atomic_cmpxchg64(&smp_call_mask, 0UL, mask & INVALID_BIT_INDEX));
while (atomic_cmpxchg64(&smp_call_mask, 0UL, mask & INVALID_BIT_INDEX)
!= 0UL);
pcpu_id = ffs64(mask);
while (pcpu_id != INVALID_BIT_INDEX) {
bitmap_clear_nolock(pcpu_id, &mask);

7
hypervisor/arch/x86/trusty.c
View File

@ -75,8 +75,8 @@ static void create_secure_world_ept(struct vm *vm, uint64_t gpa_orig,
return;
}
if (!vm->sworld_control.flag.supported
|| vm->arch_vm.sworld_eptp != NULL) {
if ((vm->sworld_control.flag.supported == 0UL)
|| (vm->arch_vm.sworld_eptp != NULL)) {
pr_err("Sworld is not supported or Sworld eptp is not NULL");
return;
}
@ -409,7 +409,8 @@ bool initialize_trusty(struct vcpu *vcpu, uint64_t param)
struct trusty_boot_param boot_param;
(void)memset(&boot_param, 0U, sizeof(boot_param));
if (copy_from_gpa(vcpu->vm, &boot_param, param, sizeof(boot_param))) {
if (copy_from_gpa(vcpu->vm, &boot_param, param, sizeof(boot_param))
!= 0) {
pr_err("%s: Unable to copy trusty_boot_param\n", __func__);
return false;
}

2
hypervisor/arch/x86/vmexit.c
View File

@ -286,7 +286,7 @@ int cr_access_vmexit_handler(struct vcpu *vcpu)
*
* set reserved bit in CR8 causes GP to guest
*/
if (reg & ~0xFUL) {
if ((reg & ~0xFUL) != 0UL) {
pr_dbg("Invalid cr8 write operation from guest");
vcpu_inject_gp(vcpu, 0U);
break;

2
hypervisor/arch/x86/vmx.c
View File

@ -909,7 +909,7 @@ static uint32_t check_vmx_ctrl(uint32_t msr, uint32_t ctrl_req)
ctrl &= vmx_msr_high;
ctrl |= vmx_msr_low;
if (ctrl_req & ~ctrl) {
if ((ctrl_req & ~ctrl) != 0U) {
pr_err("VMX ctrl 0x%x not fully enabled: "
"request 0x%x but get 0x%x\n",
msr, ctrl_req, ctrl);

2
hypervisor/arch/x86/vtd.c
View File

@ -733,7 +733,7 @@ static void fault_record_analysis(__unused uint64_t low, uint64_t high)
/* currently skip PASID related parsing */
pr_info("%s, Reason: 0x%x, SID: %x.%x.%x @0x%llx",
dma_frcd_up_t(high) ? "Read/Atomic" : "Write",
(dma_frcd_up_t(high) != 0U) ? "Read/Atomic" : "Write",
dma_frcd_up_fr(high),
dma_frcd_up_sid(high) >> 8,
(dma_frcd_up_sid(high) >> 3) & 0x1fUL,

2
hypervisor/boot/sbl/hob_parse.c
View File

@ -14,7 +14,7 @@ void parse_seed_list(struct seed_list_hob *seed_hob)
struct seed_entry *entry;
struct seed_info dseed_list[BOOTLOADER_SEED_MAX_ENTRIES];
if (!seed_hob) {
if (seed_hob == NULL) {
pr_warn("Invalid seed_list hob pointer. Use fake seed!");
goto fail;
}

3
hypervisor/boot/sbl/multiboot.c
View File

@ -176,7 +176,8 @@ static void *parse_image_boot_params(struct vm *vm, char *cmdline)
* compose cmdline for SOS.
*/
arg_end = strchr(arg, ' ');
len = arg_end ? (uint32_t)(arg_end - arg) : strnlen_s(arg, MEM_2K);
len = (arg_end != NULL) ? (uint32_t)(arg_end - arg) :
strnlen_s(arg, MEM_2K);
(void)memset(arg, ' ', len);
return (void *)boot_params;

14
hypervisor/common/trusty_hypercall.c
View File

@ -23,13 +23,13 @@ int32_t hcall_world_switch(struct vcpu *vcpu)
return -EINVAL;
}
if (!vcpu->vm->sworld_control.flag.supported) {
if (vcpu->vm->sworld_control.flag.supported == 0UL) {
dev_dbg(ACRN_DBG_TRUSTY_HYCALL,
"Secure World is not supported!\n");
return -EPERM;
}
if (!vcpu->vm->sworld_control.flag.active) {
if (vcpu->vm->sworld_control.flag.active == 0UL) {
dev_dbg(ACRN_DBG_TRUSTY_HYCALL,
"Trusty is not initialized!\n");
return -EPERM;
@ -44,13 +44,13 @@ int32_t hcall_world_switch(struct vcpu *vcpu)
*/
int32_t hcall_initialize_trusty(struct vcpu *vcpu, uint64_t param)
{
if (!vcpu->vm->sworld_control.flag.supported) {
if (vcpu->vm->sworld_control.flag.supported == 0UL) {
dev_dbg(ACRN_DBG_TRUSTY_HYCALL,
"Secure World is not supported!\n");
return -EPERM;
}
if (vcpu->vm->sworld_control.flag.active) {
if (vcpu->vm->sworld_control.flag.active != 0UL) {
dev_dbg(ACRN_DBG_TRUSTY_HYCALL,
"Trusty already initialized!\n");
return -EPERM;
@ -76,7 +76,7 @@ int64_t hcall_save_restore_sworld_ctx(struct vcpu *vcpu)
{
struct vm *vm = vcpu->vm;
if (!vm->sworld_control.flag.supported) {
if (vm->sworld_control.flag.supported == 0UL) {
dev_dbg(ACRN_DBG_TRUSTY_HYCALL,
"Secure World is not supported!\n");
return -EPERM;
@ -89,11 +89,11 @@ int64_t hcall_save_restore_sworld_ctx(struct vcpu *vcpu)
return -EPERM;
}
if (vm->sworld_control.flag.active) {
if (vm->sworld_control.flag.active != 0UL) {
save_sworld_context(vcpu);
vm->sworld_control.flag.ctx_saved = 1UL;
} else {
if (vm->sworld_control.flag.ctx_saved) {
if (vm->sworld_control.flag.ctx_saved != 0UL) {
restore_sworld_context(vcpu);
vm->sworld_control.flag.ctx_saved = 0UL;
vm->sworld_control.flag.active = 1UL;

2
hypervisor/dm/vioapic.c
View File

@ -74,7 +74,7 @@ vioapic_send_intr(struct acrn_vioapic *vioapic, uint32_t pin)
* previous one hasn't received EOI
*/
if (level) {
if (vioapic->rtbl[pin].full & IOAPIC_RTE_REM_IRR) {
if ((vioapic->rtbl[pin].full & IOAPIC_RTE_REM_IRR) != 0UL) {
return;
}
vioapic->rtbl[pin].full |= IOAPIC_RTE_REM_IRR;

2
hypervisor/include/arch/x86/guest/guest.h
View File

@ -22,7 +22,7 @@
for (idx = 0U, vcpu = vm->hw.vcpu_array[idx]; \
idx < vm->hw.num_vcpus; \
idx++, vcpu = vm->hw.vcpu_array[idx]) \
if (vcpu)
if (vcpu != NULL)
/* the index is matched with emulated msrs array*/
#define IDX_TSC_DEADLINE 0U