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HV: add px cx data for kbl nuc refresh

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Add Px/Cx data of Intel Core(TM) i7-8650U CPU which used by NUC7i7DNH to
enable guest controlled CPU power states;

Tracked-On: #3158

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
This commit is contained in:
Victor Sun 2019-05-20 15:15:24 +08:00 committed by ACRN System Integration
parent 3d459dfddc
commit 57275a58b3
1 changed files with 31 additions and 0 deletions
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31
hypervisor/arch/x86/cpu_state_tbl.c
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@ -84,6 +84,33 @@ static const struct cpu_cx_data cx_j3455[] = {
{{SPACE_FFixedHW, 0x1U, 0x2U, 0x1U, 0x60UL}, 0x3U, 0x96U, 0x0AUL} /* C3 */
};
/* The table includes cpu cx info of Intel i7-8650U SoC */
static const struct cpu_px_data px_i78650[] = {
{0x835UL, 0x0UL, 0xAUL, 0xAUL, 0x2A00UL, 0x2A00UL}, /* P0 */
{0x834UL, 0x0UL, 0xAUL, 0xAUL, 0x1500UL, 0x1500UL}, /* P1 */
{0x76CUL, 0x0UL, 0xAUL, 0xAUL, 0x1300UL, 0x1300UL}, /* P2 */
{0x708UL, 0x0UL, 0xAUL, 0xAUL, 0x1200UL, 0x1200UL}, /* P3 */
{0x6A4UL, 0x0UL, 0xAUL, 0xAUL, 0x1100UL, 0x1100UL}, /* P4 */
{0x640UL, 0x0UL, 0xAUL, 0xAUL, 0x1000UL, 0x1000UL}, /* P5 */
{0x5DCUL, 0x0UL, 0xAUL, 0xAUL, 0x0F00UL, 0x0F00UL}, /* P6 */
{0x578UL, 0x0UL, 0xAUL, 0xAUL, 0x0E00UL, 0x0E00UL}, /* P7 */
{0x4B0UL, 0x0UL, 0xAUL, 0xAUL, 0x0C00UL, 0x0C00UL}, /* P8 */
{0x44CUL, 0x0UL, 0xAUL, 0xAUL, 0x0B00UL, 0x0B00UL}, /* P9 */
{0x3E8UL, 0x0UL, 0xAUL, 0xAUL, 0x0A00UL, 0x0A00UL}, /* P10 */
{0x320UL, 0x0UL, 0xAUL, 0xAUL, 0x0800UL, 0x0800UL}, /* P11 */
{0x2BCUL, 0x0UL, 0xAUL, 0xAUL, 0x0700UL, 0x0700UL}, /* P12 */
{0x258UL, 0x0UL, 0xAUL, 0xAUL, 0x0600UL, 0x0600UL}, /* P13 */
{0x1F4UL, 0x0UL, 0xAUL, 0xAUL, 0x0500UL, 0x0500UL}, /* P14 */
{0x190UL, 0x0UL, 0xAUL, 0xAUL, 0x0400UL, 0x0400UL} /* P15 */
};
/* The table includes cpu cx info of Intel i7-8650U SoC */
static const struct cpu_cx_data cx_i78650[] = {
{{SPACE_FFixedHW, 0x0U, 0U, 0U, 0UL}, 0x1U, 0x1U, 0UL}, /* C1 */
{{SPACE_SYSTEM_IO, 0x8U, 0U, 0U, 0x1816UL}, 0x2U, 0x97U, 0UL}, /* C2 */
{{SPACE_SYSTEM_IO, 0x8U, 0U, 0U, 0x1819UL}, 0x3U, 0x40AU, 0UL} /* C3 */
};
static const struct cpu_state_table {
char model_name[64];
struct cpu_state_info state_info;
@ -103,6 +130,10 @@ static const struct cpu_state_table {
{"Intel(R) Celeron(R) CPU N3350 @ 1.10GHz",
{(uint8_t)ARRAY_SIZE(px_n3350), px_n3350,
(uint8_t)ARRAY_SIZE(cx_a3960), cx_a3960} /* Cx is same as A3960 */
},
{"Intel(R) Core(TM) i7-8650U CPU @ 1.90GHz",
{(uint8_t)ARRAY_SIZE(px_i78650), px_i78650,
(uint8_t)ARRAY_SIZE(cx_i78650), cx_i78650}
}
};