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hv: msix: fix "Procedure has more than one exit point"

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IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

V1->V2:
  remove the unrelated code.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Huihuang Shi 2018-11-27 15:54:03 +08:00 committed by lijinxia
parent 2f33d1bcf2
commit 5b6c611a1d
1 changed files with 115 additions and 107 deletions
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62
hypervisor/dm/vpci/msix.c
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@ -32,11 +32,15 @@
static inline bool msixcap_access(struct pci_vdev *vdev, uint32_t offset)
{
bool ret;
if (vdev->msix.capoff == 0U) {
return 0;
ret = false;
} else {
ret = in_range(offset, vdev->msix.capoff, vdev->msix.caplen);
}
return in_range(offset, vdev->msix.capoff, vdev->msix.caplen);
return ret;
}
static inline bool msixtable_access(struct pci_vdev *vdev, uint32_t offset)
@ -56,10 +60,7 @@ static int vmsix_remap_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
info.vmsi_data = (enable) ? vdev->msix.tables[index].data : 0U;
ret = ptdev_msix_remap(vdev->vpci->vm, vdev->vbdf.value, (uint16_t)index, &info);
if (ret != 0) {
return ret;
}
if (ret == 0) {
/* Write the table entry to the physical structure */
hva = vdev->msix.mmio_hva + vdev->msix.table_offset;
pentry = (struct msix_table_entry *)hva + index;
@ -74,6 +75,7 @@ static int vmsix_remap_entry(struct pci_vdev *vdev, uint32_t index, bool enable)
mmio_write32(info.pmsi_data, (const void *)&(pentry->data));
mmio_write32(vdev->msix.tables[index].vector_control, (const void *)&(pentry->vector_control));
}
return ret;
}
@ -126,10 +128,7 @@ static int vmsix_remap_one_entry(struct pci_vdev *vdev, uint32_t index, bool ena
enable_disable_msix(vdev, false);
ret = vmsix_remap_entry(vdev, index, enable);
if (ret != 0) {
return ret;
}
if (ret == 0) {
/* If MSI Enable is being set, make sure INTxDIS bit is set */
if (enable) {
enable_disable_pci_intx(vdev->pdev.bdf, false);
@ -140,24 +139,30 @@ static int vmsix_remap_one_entry(struct pci_vdev *vdev, uint32_t index, bool ena
if ((msgctrl & PCIM_MSIXCTRL_MSIX_ENABLE) == PCIM_MSIXCTRL_MSIX_ENABLE) {
pci_pdev_write_cfg(vdev->pdev.bdf, vdev->msix.capoff + PCIR_MSIX_CTRL, 2U, msgctrl);
}
}
return ret;
}
static int vmsix_cfgread(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val)
{
int32_t ret;
/* For PIO access, we emulate Capability Structures only */
if (msixcap_access(vdev, offset)) {
*val = pci_vdev_read_cfg(vdev, offset, bytes);
return 0;
ret = 0;
} else {
ret = -ENODEV;
}
return -ENODEV;
return ret;
}
static int vmsix_cfgwrite(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t val)
{
uint32_t msgctrl;
int32_t ret;
/* Writing MSI-X Capability Structure */
if (msixcap_access(vdev, offset)) {
@ -181,10 +186,12 @@ static int vmsix_cfgwrite(struct pci_vdev *vdev, uint32_t offset, uint32_t bytes
}
}
return 0;
ret = 0;
} else {
ret = -ENODEV;
}
return -ENODEV;
return ret;
}
static void vmsix_table_rw(struct pci_vdev *vdev, struct mmio_request *mmio, uint32_t offset)
@ -300,12 +307,7 @@ static void decode_msix_table_bar(struct pci_vdev *vdev)
uint32_t bar_lo, bar_hi, val32;
bar_lo = pci_pdev_read_cfg(pbdf, pci_bar_offset(bir), 4U);
if ((bar_lo & PCIM_BAR_SPACE) == PCIM_BAR_IO_SPACE) {
/* I/O bar, should never happen */
pr_err("PCI device (%x) has MSI-X Table at IO BAR", vdev->vbdf.value);
return;
}
if ((bar_lo & PCIM_BAR_SPACE) != PCIM_BAR_IO_SPACE) {
/* Get the base address */
base = (uint64_t)bar_lo & PCIM_BAR_MEM_BASE;
if ((bar_lo & PCIM_BAR_MEM_TYPE) == PCIM_BAR_MEM_64) {
@ -336,6 +338,10 @@ static void decode_msix_table_bar(struct pci_vdev *vdev)
if ((bar_lo & PCIM_BAR_MEM_TYPE) == PCIM_BAR_MEM_64) {
pci_pdev_write_cfg(pbdf, pci_bar_offset(bir + 1U), 4U, bar_hi);
}
} else {
/* I/O bar, should never happen */
pr_err("PCI device (%x) has MSI-X Table at IO BAR", vdev->vbdf.value);
}
}
static int vmsix_init(struct pci_vdev *vdev)
@ -344,6 +350,7 @@ static int vmsix_init(struct pci_vdev *vdev)
uint32_t table_info, i;
uint64_t addr_hi, addr_lo;
struct msix *msix = &vdev->msix;
int32_t ret;
msgctrl = pci_pdev_read_cfg(vdev->pdev.bdf, vdev->msix.capoff + PCIR_MSIX_CTRL, 2U);
@ -354,12 +361,7 @@ static int vmsix_init(struct pci_vdev *vdev)
msix->table_offset = table_info & ~PCIM_MSIX_BIR_MASK;
msix->table_count = (msgctrl & PCIM_MSIXCTRL_TABLE_SIZE) + 1U;
if (msix->table_bar >= (PCI_BAR_COUNT - 1U)) {
pr_err("%s, MSI-X device (%x) invalid table BIR %d", __func__, vdev->pdev.bdf.value, msix->table_bar);
vdev->msix.capoff = 0U;
return -EIO;
}
if (msix->table_bar < (PCI_BAR_COUNT - 1U)) {
/* Mask all table entries */
for (i = 0U; i < msix->table_count; i++) {
msix->tables[i].vector_control = PCIM_MSIX_VCTRL_MASK;
@ -395,8 +397,14 @@ static int vmsix_init(struct pci_vdev *vdev)
(void)register_mmio_emulation_handler(vdev->vpci->vm, vmsix_table_mmio_access_handler,
msix->intercepted_gpa, msix->intercepted_gpa + msix->intercepted_size, vdev);
}
ret = 0;
} else {
pr_err("%s, MSI-X device (%x) invalid table BIR %d", __func__, vdev->pdev.bdf.value, msix->table_bar);
vdev->msix.capoff = 0U;
ret = -EIO;
}
return 0;
return ret;
}
static int vmsix_deinit(struct pci_vdev *vdev)