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hv: check the availability of guest CR4 features

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Check hardware support for all features in CR4,
 and hide bits from guest by vcpuid if they're not supported
 for guests OS.

Tracked-On: #5586
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Yonghua Huang
2020-12-15 17:32:46 +08:00
committed by wenlingz
parent 442fc30117
commit 643bbcfe34
4 changed files with 75 additions and 3 deletions
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2
hypervisor/include/arch/x86/cpu.h
View File

@@ -75,6 +75,7 @@
#define CR4_OSXMMEXCPT (1UL<<10U)
/* OS support for unmasked SIMD floating point exceptions */
#define CR4_UMIP (1UL<<11U) /* User-Mode Inst prevention */
#define CR4_LA57 (1UL<<12U) /* 57-bit linear address */
#define CR4_VMXE (1UL<<13U) /* VMX enable */
#define CR4_SMXE (1UL<<14U) /* SMX enable */
#define CR4_FSGSBASE (1UL<<16U) /* RD(FS|GS|FS)BASE inst */
@@ -85,6 +86,7 @@
#define CR4_SMAP (1UL<<21U)
#define CR4_PKE (1UL<<22U) /* Protect-key-enable */
#define CR4_CET (1UL<<23U) /* Control-flow Enforcement Technology enable */
#define CR4_PKS (1UL<<24U) /* Enable protection keys for supervisor-mode pages */
/* XCR0_SSE */
#define XCR0_SSE (1UL<<1U)

14
hypervisor/include/arch/x86/cpuid.h
View File

@@ -72,16 +72,30 @@
#define CPUID_EDX_TM1 (1U<<29U)
#define CPUID_EDX_IA64 (1U<<30U)
#define CPUID_EDX_PBE (1U<<31U)
/* CPUID.07H:EBX.FSGSBASE*/
#define CPUID_EBX_FSGSBASE (1U<<0U)
/* CPUID.07H:EBX.TSC_ADJUST*/
#define CPUID_EBX_TSC_ADJ (1U<<1U)
/* CPUID.07H:EBX.SGX */
#define CPUID_EBX_SGX (1U<<2U)
/* CPUID.07H:EBX.SMEP*/
#define CPUID_EBX_SMEP (1U<<7U)
/* CPUID.07H:EBX.MPX */
#define CPUID_EBX_MPX (1U<<14U)
/* CPUID.07H:EBX.SMAP*/
#define CPUID_EBX_SMAP (1U<<20U)
/* CPUID.07H:ECX.UMIP */
#define CPUID_ECX_UMIP (1U<<2U)
/* CPUID.07H:ECX.PKE */
#define CPUID_ECX_PKE (1U<<3U)
/* CPUID.07H:ECX.CET_SS */
#define CPUID_ECX_CET_SS (1U<<7U)
/* CPUID.07H:ECX.LA57 */
#define CPUID_ECX_LA57 (1U<<16U)
/* CPUID.07H:ECX.SGX_LC*/
#define CPUID_ECX_SGX_LC (1U<<30U)
/* CPUID.07H:ECX.PKS*/
#define CPUID_ECX_PKS (1U<<31U)
/* CPUID.07H:EDX.CET_IBT */
#define CPUID_EDX_CET_IBT (1U<<20U)
/* CPUID.07H:EDX.IBRS_IBPB*/