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hv: pci: update "union pci_bdf"
- add one more filed in "union pci_bdf" - remove following interfaces: * pci_bus * pci_slot * pci_func * pci_devfn Tracked-On: #1842 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
This commit is contained in:
Shiqing Gao
ACRN System Integration
parent
b16531257e
commit
658fff27b4
@ -103,27 +103,23 @@ static uint8_t get_secondary_bus(uint8_t bus, uint8_t dev, uint8_t func)
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return (data >> 8U) & 0xffU;
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}
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static uint16_t
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static union pci_bdf
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dmar_path_bdf(int32_t path_len, int32_t busno,
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const struct acpi_dmar_pci_path *path)
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{
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int32_t i;
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uint8_t bus;
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uint8_t dev;
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uint8_t fun;
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bus = (uint8_t)busno;
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dev = path->device;
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fun = path->function;
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union pci_bdf dmar_bdf;
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dmar_bdf.bits.b = (uint8_t)busno;
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dmar_bdf.bits.d = path->device;
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dmar_bdf.bits.f = path->function;
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for (i = 1; i < path_len; i++) {
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bus = get_secondary_bus(bus, dev, fun);
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dev = path[i].device;
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fun = path[i].function;
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dmar_bdf.bits.b = get_secondary_bus(dmar_bdf.bits.b, dmar_bdf.bits.d, dmar_bdf.bits.f);
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dmar_bdf.bits.d = path[i].device;
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dmar_bdf.bits.f = path[i].function;
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}
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return (bus << 8U | DEVFUN(dev, fun));
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return dmar_bdf;
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}
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@ -132,7 +128,7 @@ handle_dmar_devscope(struct dmar_dev_scope *dev_scope,
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void *addr, int32_t remaining)
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{
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int32_t path_len;
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uint16_t bdf;
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union pci_bdf dmar_bdf;
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struct acpi_dmar_pci_path *path;
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struct acpi_dmar_device_scope *apci_devscope = addr;
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@ -147,11 +143,11 @@ handle_dmar_devscope(struct dmar_dev_scope *dev_scope,
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sizeof(struct acpi_dmar_device_scope)) /
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sizeof(struct acpi_dmar_pci_path);
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bdf = dmar_path_bdf(path_len, apci_devscope->bus, path);
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dmar_bdf = dmar_path_bdf(path_len, apci_devscope->bus, path);
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dev_scope->id = apci_devscope->enumeration_id;
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dev_scope->type = apci_devscope->entry_type;
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dev_scope->bus = (bdf >> 8U) & 0xffU;
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dev_scope->devfun = bdf & 0xffU;
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dev_scope->bus = dmar_bdf.fields.bus;
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dev_scope->devfun = dmar_bdf.fields.devfun;
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return apci_devscope->length;
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}
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@ -607,6 +607,7 @@ int32_t ptirq_msix_remap(struct acrn_vm *vm, uint16_t virt_bdf, uint16_t phys_bd
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struct ptirq_remapping_info *entry;
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DEFINE_MSI_SID(virt_sid, virt_bdf, entry_nr);
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int32_t ret = -ENODEV;
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union pci_bdf vbdf;
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/*
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* Device Model should pre-hold the mapping entries by calling
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@ -673,9 +674,10 @@ int32_t ptirq_msix_remap(struct acrn_vm *vm, uint16_t virt_bdf, uint16_t phys_bd
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if (ret == 0) {
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entry->msi = *info;
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vbdf.value = virt_bdf;
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dev_dbg(ACRN_DBG_IRQ, "PCI %x:%x.%x MSI VR[%d] 0x%x->0x%x assigned to vm%d",
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pci_bus(virt_bdf), pci_slot(virt_bdf), pci_func(virt_bdf), entry_nr,
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info->vmsi_data.bits.vector, irq_to_vector(entry->allocated_pirq), entry->vm->vm_id);
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vbdf.bits.b, vbdf.bits.d, vbdf.bits.f, entry_nr, info->vmsi_data.bits.vector,
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irq_to_vector(entry->allocated_pirq), entry->vm->vm_id);
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}
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}
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}
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@ -532,9 +532,8 @@ static struct dmar_drhd_rt *ioapic_to_dmaru(uint16_t ioapic_id, union pci_bdf *s
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for (i = 0U; i < dmar_unit->drhd->dev_cnt; i++) {
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if ((dmar_unit->drhd->devices[i].type == ACPI_DMAR_SCOPE_TYPE_IOAPIC) &&
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(dmar_unit->drhd->devices[i].id == ioapic_id)) {
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sid->bits.f = pci_func((uint8_t)dmar_unit->drhd->devices[i].devfun);
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sid->bits.d = pci_slot((uint8_t)dmar_unit->drhd->devices[i].devfun);
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sid->bits.b = dmar_unit->drhd->devices[i].bus;
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sid->fields.devfun = dmar_unit->drhd->devices[i].devfun;
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sid->fields.bus = dmar_unit->drhd->devices[i].bus;
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found = true;
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break;
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}
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@ -868,11 +867,14 @@ static void fault_status_analysis(uint32_t status)
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static void fault_record_analysis(__unused uint64_t low, uint64_t high)
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{
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union pci_bdf dmar_bdf;
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if (!dma_frcd_up_f(high)) {
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dmar_bdf.value = dma_frcd_up_sid(high);
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/* currently skip PASID related parsing */
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pr_info("%s, Reason: 0x%x, SID: %x.%x.%x @0x%llx",
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(dma_frcd_up_t(high) != 0U) ? "Read/Atomic" : "Write", dma_frcd_up_fr(high),
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pci_bus(dma_frcd_up_sid(high)), pci_slot(dma_frcd_up_sid(high)), pci_func(dma_frcd_up_sid(high)), low);
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dmar_bdf.bits.b, dmar_bdf.bits.d, dmar_bdf.bits.f, low);
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#if DBG_IOMMU
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if (iommu_ecap_dt(dmar_unit->ecap) != 0U) {
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pr_info("Address Type: 0x%x", dma_frcd_up_at(high));
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@ -1055,13 +1057,18 @@ static int32_t add_iommu_device(struct iommu_domain *domain, uint16_t segment, u
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uint64_t hi_64;
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uint64_t lo_64 = 0UL;
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int32_t ret = 0;
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/* source id */
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union pci_bdf sid;
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sid.fields.bus = bus;
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sid.fields.devfun = devfun;
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dmar_unit = device_to_dmaru(segment, bus, devfun);
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if (dmar_unit == NULL) {
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pr_err("no dmar unit found for device: %x:%x.%x", bus, pci_slot(devfun), pci_func(devfun));
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pr_err("no dmar unit found for device: %x:%x.%x", bus, sid.bits.d, sid.bits.f);
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ret = -EINVAL;
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} else if (dmar_unit->drhd->ignore) {
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dev_dbg(ACRN_DBG_IOMMU, "device is ignored :0x%x:%x.%x", bus, pci_slot(devfun), pci_func(devfun));
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dev_dbg(ACRN_DBG_IOMMU, "device is ignored :0x%x:%x.%x", bus, sid.bits.d, sid.bits.f);
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} else if ((!dmar_unit_support_aw(dmar_unit, domain->addr_width)) || (dmar_unit->root_table_addr == 0UL)) {
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pr_err("invalid dmar unit");
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ret = -EINVAL;
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@ -1108,7 +1115,7 @@ static int32_t add_iommu_device(struct iommu_domain *domain, uint16_t segment, u
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} else if (dmar_get_bitslice(context_entry->lo_64, CTX_ENTRY_LOWER_P_MASK, CTX_ENTRY_LOWER_P_POS) != 0UL) {
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/* the context entry should not be present */
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pr_err("%s: context entry@0x%llx (Lower:%x) ", __func__, context_entry, context_entry->lo_64);
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pr_err("already present for %x:%x.%x", bus, pci_slot(devfun), pci_func(devfun));
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pr_err("already present for %x:%x.%x", bus, sid.bits.d, sid.bits.f);
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ret = -EBUSY;
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} else {
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/* setup context entry for the devfun */
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@ -1162,15 +1169,20 @@ static int32_t remove_iommu_device(const struct iommu_domain *domain, uint16_t s
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struct dmar_entry *context;
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struct dmar_entry *root_entry;
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struct dmar_entry *context_entry;
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/* source id */
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union pci_bdf sid;
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int32_t ret = 0;
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dmar_unit = device_to_dmaru(segment, bus, devfun);
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sid.fields.bus = bus;
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sid.fields.devfun = devfun;
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if (dmar_unit == NULL) {
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pr_err("no dmar unit found for device: %x:%x.%x", bus, pci_slot(devfun), pci_func(devfun));
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pr_err("no dmar unit found for device: %x:%x.%x", bus, sid.bits.d, sid.bits.f);
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ret = -EINVAL;
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} else if (dmar_unit->drhd->ignore) {
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dev_dbg(ACRN_DBG_IOMMU, "device is ignored :0x%x:%x.%x", bus, pci_slot(devfun), pci_func(devfun));
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dev_dbg(ACRN_DBG_IOMMU, "device is ignored :0x%x:%x.%x", bus, sid.bits.d, sid.bits.f);
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} else {
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root_table = (struct dmar_entry *)hpa2hva(dmar_unit->root_table_addr);
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root_entry = root_table + bus;
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@ -1179,7 +1191,8 @@ static int32_t remove_iommu_device(const struct iommu_domain *domain, uint16_t s
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pr_err("dmar root table entry is invalid\n");
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ret = -EINVAL;
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} else {
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context_table_addr = dmar_get_bitslice(root_entry->lo_64, ROOT_ENTRY_LOWER_CTP_MASK, ROOT_ENTRY_LOWER_CTP_POS);
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context_table_addr = dmar_get_bitslice(root_entry->lo_64, ROOT_ENTRY_LOWER_CTP_MASK,
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ROOT_ENTRY_LOWER_CTP_POS);
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context_table_addr = context_table_addr << PAGE_SHIFT;
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context = (struct dmar_entry *)hpa2hva(context_table_addr);
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@ -1188,7 +1201,8 @@ static int32_t remove_iommu_device(const struct iommu_domain *domain, uint16_t s
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if ((context == NULL) || (context_entry == NULL)) {
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pr_err("dmar context entry is invalid");
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ret = -EINVAL;
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} else if ((uint16_t)dmar_get_bitslice(context_entry->hi_64, CTX_ENTRY_UPPER_DID_MASK, CTX_ENTRY_UPPER_DID_POS) != vmid_to_domainid(domain->vm_id)) {
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} else if ((uint16_t)dmar_get_bitslice(context_entry->hi_64, CTX_ENTRY_UPPER_DID_MASK,
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CTX_ENTRY_UPPER_DID_POS) != vmid_to_domainid(domain->vm_id)) {
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pr_err("%s: domain id mismatch", __func__);
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ret = -EPERM;
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} else {
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@ -1197,11 +1211,10 @@ static int32_t remove_iommu_device(const struct iommu_domain *domain, uint16_t s
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context_entry->hi_64 = 0UL;
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iommu_flush_cache(context_entry, sizeof(struct dmar_entry));
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sid.bits.b = bus;
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sid.bits.d = pci_slot(devfun);
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sid.bits.f = pci_func(devfun);
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dmar_invalid_context_cache(dmar_unit, vmid_to_domainid(domain->vm_id), sid.value, 0U, DMAR_CIRG_DEVICE);
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dmar_invalid_iotlb(dmar_unit, vmid_to_domainid(domain->vm_id), 0UL, 0U, false, DMAR_IIRG_DOMAIN);
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dmar_invalid_context_cache(dmar_unit, vmid_to_domainid(domain->vm_id), sid.value, 0U,
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DMAR_CIRG_DEVICE);
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dmar_invalid_iotlb(dmar_unit, vmid_to_domainid(domain->vm_id), 0UL, 0U, false,
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DMAR_IIRG_DOMAIN);
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}
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}
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}
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@ -1345,7 +1358,7 @@ int32_t dmar_assign_irte(struct intr_source intr_src, union dmar_ir_entry irte,
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int32_t ret = 0;
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if (intr_src.is_msi) {
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dmar_unit = device_to_dmaru(0U, (uint8_t)intr_src.src.msi.bits.b, pci_devfn(intr_src.src.msi.value));
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dmar_unit = device_to_dmaru(0U, (uint8_t)intr_src.src.msi.bits.b, intr_src.src.msi.fields.devfun);
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sid.value = intr_src.src.msi.value;
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trigger_mode = 0x0UL;
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} else {
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@ -1389,7 +1402,7 @@ void dmar_free_irte(struct intr_source intr_src, uint16_t index)
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union pci_bdf sid;
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if (intr_src.is_msi) {
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dmar_unit = device_to_dmaru(0U, (uint8_t)intr_src.src.msi.bits.b, pci_devfn(intr_src.src.msi.value));
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dmar_unit = device_to_dmaru(0U, (uint8_t)intr_src.src.msi.bits.b, intr_src.src.msi.fields.devfun);
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} else {
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dmar_unit = ioapic_to_dmaru(intr_src.src.ioapic_id, &sid);
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}
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@ -830,13 +830,13 @@ int32_t hcall_gpa_to_hpa(struct acrn_vm *vm, uint16_t vmid, uint64_t param)
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int32_t hcall_assign_ptdev(struct acrn_vm *vm, uint16_t vmid, uint64_t param)
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{
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int32_t ret;
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uint16_t bdf;
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union pci_bdf bdf;
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struct acrn_vm *target_vm = get_vm_from_vmid(vmid);
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bool bdf_valid = true;
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if (!is_poweroff_vm(target_vm) && is_postlaunched_vm(target_vm)) {
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if (param < 0x10000UL) {
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bdf = (uint16_t) param;
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bdf.value = (uint16_t)param;
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} else {
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if (copy_from_gpa(vm, &bdf, param, sizeof(bdf)) != 0) {
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pr_err("%s: Unable copy param from vm %d\n",
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@ -847,8 +847,7 @@ int32_t hcall_assign_ptdev(struct acrn_vm *vm, uint16_t vmid, uint64_t param)
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}
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if (bdf_valid) {
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ret = move_pt_device(vm->iommu, target_vm->iommu,
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(uint8_t)(bdf >> 8U), (uint8_t)(bdf & 0xffU));
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ret = move_pt_device(vm->iommu, target_vm->iommu, bdf.fields.bus, bdf.fields.devfun);
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}
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} else {
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pr_err("%s, target vm is invalid\n", __func__);
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@ -873,13 +872,13 @@ int32_t hcall_assign_ptdev(struct acrn_vm *vm, uint16_t vmid, uint64_t param)
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int32_t hcall_deassign_ptdev(struct acrn_vm *vm, uint16_t vmid, uint64_t param)
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{
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int32_t ret = -1;
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uint16_t bdf;
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union pci_bdf bdf;
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bool bdf_valid = true;
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struct acrn_vm *target_vm = get_vm_from_vmid(vmid);
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if (!is_poweroff_vm(target_vm) && is_postlaunched_vm(target_vm)) {
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if (param < 0x10000UL) {
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bdf = (uint16_t) param;
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bdf.value = (uint16_t)param;
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} else {
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if (copy_from_gpa(vm, &bdf, param, sizeof(bdf)) != 0) {
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pr_err("%s: Unable copy param to vm\n", __func__);
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@ -888,8 +887,7 @@ int32_t hcall_deassign_ptdev(struct acrn_vm *vm, uint16_t vmid, uint64_t param)
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}
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if (bdf_valid) {
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ret = move_pt_device(target_vm->iommu, vm->iommu,
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(uint8_t)(bdf >> 8U), (uint8_t)(bdf & 0xffU));
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ret = move_pt_device(target_vm->iommu, vm->iommu, bdf.fields.bus, bdf.fields.devfun);
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}
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}
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@ -1032,7 +1032,7 @@ static void get_ptdev_info(char *str_arg, size_t str_max)
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uint64_t dest;
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bool lvl_tm;
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uint32_t pin, vpin;
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uint32_t bdf, vbdf;
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union pci_bdf bdf, vbdf;
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len = snprintf(str, size, "\r\nVM\tTYPE\tIRQ\tVEC\tDEST\tTM\tPIN\tVPIN\tBDF\tVBDF");
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if (len >= size) {
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@ -1044,9 +1044,8 @@ static void get_ptdev_info(char *str_arg, size_t str_max)
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for (idx = 0U; idx < CONFIG_MAX_PT_IRQ_ENTRIES; idx++) {
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entry = &ptirq_entries[idx];
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if (is_entry_active(entry)) {
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get_entry_info(entry, type, &irq, &vector,
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&dest, &lvl_tm, &pin, &vpin,
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&bdf, &vbdf);
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get_entry_info(entry, type, &irq, &vector, &dest, &lvl_tm, &pin, &vpin,
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(uint32_t *)&bdf, (uint32_t *)&vbdf);
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len = snprintf(str, size, "\r\n%d\t%s\t%d\t0x%X\t0x%X",
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entry->vm->vm_id, type, irq, vector, dest);
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if (len >= size) {
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@ -1057,10 +1056,8 @@ static void get_ptdev_info(char *str_arg, size_t str_max)
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len = snprintf(str, size, "\t%s\t%hhu\t%hhu\t%x:%x.%x\t%x:%x.%x",
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is_entry_active(entry) ? (lvl_tm ? "level" : "edge") : "none",
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pin, vpin, (bdf & 0xff00U) >> 8U,
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(bdf & 0xf8U) >> 3U, bdf & 0x7U,
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(vbdf & 0xff00U) >> 8U,
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(vbdf & 0xf8U) >> 3U, vbdf & 0x7U);
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pin, vpin, bdf.bits.b, bdf.bits.d, bdf.bits.f,
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vbdf.bits.b, vbdf.bits.d, vbdf.bits.f);
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if (len >= size) {
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goto overflow;
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}
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@ -141,6 +141,10 @@ union pci_bdf {
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uint8_t d : 5; /* BITs 3-7 */
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uint8_t b; /* BITs 8-15 */
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} bits;
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struct {
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uint8_t devfun; /* BITs 0-7 */
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uint8_t bus; /* BITs 8-15 */
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} fields;
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};
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enum pci_bar_type {
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@ -278,26 +282,6 @@ static inline uint64_t git_size_masked_bar_base(uint64_t size, uint64_t val)
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return (mask & val);
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}
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static inline uint8_t pci_bus(uint16_t bdf)
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{
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return (uint8_t)((bdf >> 8U) & 0xFFU);
|
||||
}
|
||||
|
||||
static inline uint8_t pci_slot(uint16_t bdf)
|
||||
{
|
||||
return (uint8_t)((bdf >> 3U) & 0x1FU);
|
||||
}
|
||||
|
||||
static inline uint8_t pci_func(uint16_t bdf)
|
||||
{
|
||||
return (uint8_t)(bdf & 0x7U);
|
||||
}
|
||||
|
||||
static inline uint8_t pci_devfn(uint16_t bdf)
|
||||
{
|
||||
return (uint8_t)(bdf & 0xFFU);
|
||||
}
|
||||
|
||||
/**
|
||||
* @pre a != NULL
|
||||
* @pre b != NULL
|
||||
|
||||
Loading…
Reference in New Issue
Block a user