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hv: update the hypervisor 64-bit entry address for efi-stub
- remove .data and .text directives. We want to place all the boot data and text in the .entry section since the boot code is different from others in terms of relocation fixup. With this change, the page tables are in entry section now and it's aligned at 4KB. - regardless CONFIG_MULTIBOOT2 is set or not, the 64-bit entry offset is fixed at 0x1200: 0x00 -- 0x10: Multiboot1 header 0x10 -- 0x88: Multiboot2 header if CONFIG_MULTIBOOT2 is set 0x1000: start of entry section: cpu_primary_start_32 0x1200: cpu_primary_start_64 (thanks to the '.org 0x200' directive) GDT tables initial page tables etc. Tracked-On: #4441 Reviewed-by: Fengwei Yin <fengwei.yin@intel.com> Signed-off-by: Zide Chen <zide.chen@intel.com>
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@ -115,8 +115,14 @@ relocatable_tag_end:
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mb2_header_end:
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#endif
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/*
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* The page tables are aligned to 4KB, which implicitly aligns this section at
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* 4KB boundary. Put an extra .align here to explicitly state that regardless
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* the actual length of the multiboot header section, this section will be linked
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* at offset 0x1000 to the beginning of the target executable.
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*/
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.align 0x1000
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.section entry, "ax"
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.align 8
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.code32
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@ -210,8 +216,13 @@ jmpbuf_32:
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/* 0x0008 = HOST_GDT_RING0_CODE_SEL */
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.word 0x0008
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.code64
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/*
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* Offset from the beginning of the entry section.
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* This is to make sure that cpu_primary_start_64 is linked to a known address
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* so that efi-stub knows where to pass control to hypervisor.
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*/
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.org 0x200
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.code64
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.global cpu_primary_start_64
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cpu_primary_start_64:
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/* save the MULTBOOT magic number & MBI */
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@ -252,11 +263,10 @@ primary_start_long_mode:
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lea after(%rip), %rbx
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mov %rbx, (%rax)
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rex.w ljmp *(%rax)
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.data
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jmpbuf_64: .quad 0
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/* 0x0008 = HOST_GDT_RING0_CODE_SEL */
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.word 0x0008
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.text
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after:
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/* 0x10 = HOST_GDT_RING0_DATA_SEL*/
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movl $0x10,%eax
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@ -94,14 +94,10 @@ static inline void hv_jump(EFI_PHYSICAL_ADDRESS hv_start,
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efi_ctx->vcpu_regs.rip = (uint64_t)&guest_entry;
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/* The 64-bit entry of acrn hypervisor is 0x200 from the start
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* address of hv image. But due to there is multiboot header,
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* so it has to be added with 0x10.
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*
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* FIXME: The hardcode value 0x210 should be worked out
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* from the link address of cpu_primary_start_64 in acrn.out
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/* The 64-bit entry of acrn hypervisor is 0x1200 from the start
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* address of hv image.
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*/
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hf = (hv_func)(hv_start + 0x210);
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hf = (hv_func)(hv_start + 0x1200);
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asm volatile ("cli");
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