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https://github.com/projectacrn/acrn-hypervisor.git
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HV:treewide:rename enum vpic_wire_mode, stack_canary, segment_override, pde_index
For data structure types "enum vpic_wire_mode, struct stack_canary", its name is identical with variable name in the same scope. This MISRA C violation is detected by static analysis tool. For variables "segment_override, pde_index", its name is identical with function name. This MISRA C violation is detected. Naming convention rule:Variable name can be shortened from its data structure type name. The following udpates are made: enum vpic_wire_mode vpic_wire_mode-->enum vpic_wire_mode wire_mode struct stack_canary stack_canary-->struct stack_canary stk_canary uint8_t segment_override:1 --> uint8_t seg_override:1 uint32_t pde_index--> uint32_t pde_idx V1-->V2: Remove update "enum cpu_state cpu_state-->enum cpu_state state" and "enum irqstate irqstate-->enum irq_ops_mode ops_mode", other patch will cover it. V2-->V3: Update "uint32_t pde_index--> uint32_t pde_idx". Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
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@ -330,7 +330,7 @@ static uint64_t get_random_value(void)
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static void set_fs_base(void)
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{
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struct stack_canary *psc = &get_cpu_var(stack_canary);
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struct stack_canary *psc = &get_cpu_var(stk_canary);
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psc->canary = get_random_value();
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msr_write(MSR_IA32_FS_BASE, (uint64_t)psc);
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@ -50,7 +50,7 @@ static void free_ept_mem(void *pml4_addr)
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void *pte_addr;
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uint32_t pml4_index;
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uint32_t pdpt_index;
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uint32_t pde_index;
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uint32_t pde_idx;
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if (pml4_addr == NULL) {
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ASSERT(false, "EPTP is NULL");
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@ -74,10 +74,10 @@ static void free_ept_mem(void *pml4_addr)
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continue;
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}
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for (pde_index = 0U; pde_index < IA32E_NUM_ENTRIES;
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pde_index++) {
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for (pde_idx = 0U; pde_idx < IA32E_NUM_ENTRIES;
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pde_idx++) {
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/* Walk from the PD table to the page table */
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pte_addr = HPA2HVA(find_next_table(pde_index,
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pte_addr = HPA2HVA(find_next_table(pde_idx,
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pde_addr));
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/* Free page table entry table */
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@ -714,7 +714,7 @@ emulate_movs(struct vcpu *vcpu, __unused uint64_t gpa, struct instr_emul_vie *vi
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}
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}
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seg = (vie->segment_override != 0U) ? (vie->segment_register) : CPU_REG_DS;
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seg = (vie->seg_override != 0U) ? (vie->segment_register) : CPU_REG_DS;
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error = get_gla(vcpu, vie, paging, opsize, vie->addrsize,
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PROT_READ, seg, CPU_REG_RSI, &srcaddr, &fault);
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if ((error != 0) || (fault != 0)) {
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@ -1791,7 +1791,7 @@ decode_prefixes(struct instr_emul_vie *vie, enum vm_cpu_mode cpu_mode, bool cs_d
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} else if (x == 0xF2U) {
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vie->repnz_present = 1U;
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} else if (segment_override(x, &vie->segment_register)) {
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vie->segment_override = 1U;
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vie->seg_override = 1U;
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} else {
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break;
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}
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@ -163,7 +163,7 @@ struct instr_emul_vie {
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repnz_present:1, /* REPNE/REPNZ prefix */
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opsize_override:1, /* Operand size override */
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addrsize_override:1, /* Address size override */
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segment_override:1; /* Segment override */
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seg_override:1; /* Segment override */
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uint8_t mod:2, /* ModRM byte */
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reg:4,
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@ -347,11 +347,11 @@ vioapic_write(struct vioapic *vioapic, uint32_t addr, uint32_t data)
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/* mask -> umask */
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if ((last.full & IOAPIC_RTE_INTMASK) != 0UL &&
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((new.full & IOAPIC_RTE_INTMASK) == 0UL)) {
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if ((vioapic->vm->vpic_wire_mode ==
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if ((vioapic->vm->wire_mode ==
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VPIC_WIRE_NULL) ||
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(vioapic->vm->vpic_wire_mode ==
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(vioapic->vm->wire_mode ==
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VPIC_WIRE_INTR)) {
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vioapic->vm->vpic_wire_mode =
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vioapic->vm->wire_mode =
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VPIC_WIRE_IOAPIC;
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dev_dbg(ACRN_DBG_IOAPIC,
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"vpic wire mode -> IOAPIC");
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@ -362,9 +362,9 @@ vioapic_write(struct vioapic *vioapic, uint32_t addr, uint32_t data)
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/* unmask -> mask */
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} else if (((last.full & IOAPIC_RTE_INTMASK) == 0UL) &&
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(new.full & IOAPIC_RTE_INTMASK) != 0UL) {
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if (vioapic->vm->vpic_wire_mode ==
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if (vioapic->vm->wire_mode ==
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VPIC_WIRE_IOAPIC) {
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vioapic->vm->vpic_wire_mode =
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vioapic->vm->wire_mode =
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VPIC_WIRE_INTR;
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dev_dbg(ACRN_DBG_IOAPIC,
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"vpic wire mode -> INTR");
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@ -611,9 +611,9 @@ vlapic_lvt_write_handler(struct acrn_vlapic *vlapic, uint32_t offset)
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/* mask -> unmask: may from every vlapic in the vm */
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if (((last & APIC_LVT_M) != 0U) && ((val & APIC_LVT_M) == 0U)) {
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if (vlapic->vm->vpic_wire_mode == VPIC_WIRE_INTR ||
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vlapic->vm->vpic_wire_mode == VPIC_WIRE_NULL) {
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vlapic->vm->vpic_wire_mode = VPIC_WIRE_LAPIC;
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if (vlapic->vm->wire_mode == VPIC_WIRE_INTR ||
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vlapic->vm->wire_mode == VPIC_WIRE_NULL) {
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vlapic->vm->wire_mode = VPIC_WIRE_LAPIC;
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dev_dbg(ACRN_DBG_LAPIC,
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"vpic wire mode -> LAPIC");
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} else {
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@ -622,8 +622,8 @@ vlapic_lvt_write_handler(struct acrn_vlapic *vlapic, uint32_t offset)
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}
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/* unmask -> mask: only from the vlapic LINT0-ExtINT enabled */
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} else if (((last & APIC_LVT_M) == 0U) && ((val & APIC_LVT_M) != 0U)) {
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if (vlapic->vm->vpic_wire_mode == VPIC_WIRE_LAPIC) {
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vlapic->vm->vpic_wire_mode = VPIC_WIRE_NULL;
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if (vlapic->vm->wire_mode == VPIC_WIRE_LAPIC) {
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vlapic->vm->wire_mode = VPIC_WIRE_NULL;
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dev_dbg(ACRN_DBG_LAPIC,
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"vpic wire mode -> NULL");
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}
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@ -1279,8 +1279,8 @@ vlapic_svr_write_handler(struct acrn_vlapic *vlapic)
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vlapic_mask_lvts(vlapic);
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/* the only one enabled LINT0-ExtINT vlapic disabled */
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if (vlapic->vm->vpic_wire_mode == VPIC_WIRE_NULL) {
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vlapic->vm->vpic_wire_mode = VPIC_WIRE_INTR;
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if (vlapic->vm->wire_mode == VPIC_WIRE_NULL) {
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vlapic->vm->wire_mode = VPIC_WIRE_INTR;
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dev_dbg(ACRN_DBG_LAPIC,
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"vpic wire mode -> INTR");
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}
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@ -177,7 +177,7 @@ int create_vm(struct vm_description *vm_desc, struct vm **rtn_vm)
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vm->vpic = vpic_init(vm);
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/* vpic wire_mode default is INTR */
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vm->vpic_wire_mode = VPIC_WIRE_INTR;
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vm->wire_mode = VPIC_WIRE_INTR;
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/* Allocate full emulated vIOAPIC instance */
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vm->arch_vm.virt_ioapic = vioapic_init(vm);
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@ -231,7 +231,7 @@ static void vpic_notify_intr(struct acrn_vpic *vpic)
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* interrupt.
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*/
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i8259->intr_raised = true;
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if (vpic->vm->vpic_wire_mode == VPIC_WIRE_INTR) {
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if (vpic->vm->wire_mode == VPIC_WIRE_INTR) {
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struct vcpu *vcpu = vcpu_from_vid(vpic->vm, 0U);
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ASSERT(vcpu != NULL, "vm%d, vcpu0", vpic->vm->attr.id);
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@ -13,7 +13,7 @@ uint8_t host_enter_s3_success = 1U;
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void restore_msrs(void)
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{
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#ifdef STACK_PROTECTOR
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struct stack_canary *psc = &get_cpu_var(stack_canary);
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struct stack_canary *psc = &get_cpu_var(stk_canary);
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msr_write(MSR_IA32_FS_BASE, (uint64_t)psc);
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#endif
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@ -134,7 +134,7 @@ struct vm {
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enum vm_state state; /* VM state */
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void *vuart; /* Virtual UART */
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struct acrn_vpic *vpic; /* Virtual PIC */
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enum vpic_wire_mode vpic_wire_mode;
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enum vpic_wire_mode wire_mode;
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struct iommu_domain *iommu; /* iommu domain of this VM */
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struct list_head list; /* list of VM */
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spinlock_t spinlock; /* Spin-lock used to protect VM modifications */
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@ -31,7 +31,7 @@ struct per_cpu_region {
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void *vcpu;
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void *ever_run_vcpu;
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#ifdef STACK_PROTECTOR
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struct stack_canary stack_canary;
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struct stack_canary stk_canary;
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#endif
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struct per_cpu_timers cpu_timers;
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struct sched_context sched_ctx;
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