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HV: trap and validate px request

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Currently acrn partitions cpus between SOS and UOS, so the default
policy is to allow guest managing CPU px state. However we would
not blindly passthrough perf_ctrl MSR to guest. Instead guest access
is always trapped and validated by acrn hypervisor before forwarding
to pcpu. Doing so leaves room for future power budget control in
hypervisor, e.g. limiting turbo percentage that a cpu can enter.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
This commit is contained in:
Victor Sun
2018-04-05 19:08:38 +08:00
committed by Jack Ren
parent 1d0d4d3185
commit 7647517a15
3 changed files with 42 additions and 0 deletions
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hypervisor/include/arch/x86/cpu_state_tbl.h
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@@ -39,5 +39,6 @@ struct cpu_state_table {
void load_cpu_state_data(void);
void vm_setup_cpu_state(struct vm *vm);
int validate_pstate(struct vm *vm, uint64_t perf_ctl);
#endif /* CPU_STATE_TBL_H */