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hv: fix possible SSE region mismatch issue

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During context switch in hypervisor, xsave/xrstore are used to
save/resotre the XSAVE area according to the XCR0 and XSS. The legacy
region in XSAVE area include FPU and SSE, we should make sure the
legacy region be saved during contex switch. FPU in XCR0 is always
enabled according to SDM.
For SSE, we enable it in XCR0 during context switch.

Tracked-On: #5062
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Conghui Chen
2020-07-15 00:09:17 +00:00
committed by wenlingz
parent 53d4a7169b
commit 821c65b40c
3 changed files with 7 additions and 1 deletions
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hypervisor/include/arch/x86/cpu.h
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@@ -158,6 +158,7 @@
#define XSAVE_COMPACTED_FORMAT (1UL << 63U)
#define XSAVE_FPU (1UL << 0U)
#define XSAVE_SSE (1UL << 1U)
#define CPU_CONTEXT_OFFSET_RAX 0U
#define CPU_CONTEXT_OFFSET_RCX 8U