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hv: use per platform maximum physical address width

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MAXIMUM_PA_WIDTH will be calculated from board information.

Tracked-On: #6357
Signed-off-by: Liang Yi <yi.liang@intel.com>
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
Liang Yi 2021-08-09 14:39:47 +08:00 committed by wenlingz
parent 67c06564f7
commit 8553a1d35d
2 changed files with 5 additions and 1 deletions
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2
hypervisor/include/arch/x86/asm/page.h
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@ -8,12 +8,12 @@
#define PAGE_H
#include <asm/lib/spinlock.h>
#include <board_info.h>
#define PAGE_SHIFT 12U
#define PAGE_SIZE (1U << PAGE_SHIFT)
#define PAGE_MASK 0xFFFFFFFFFFFFF000UL
#define MAXIMUM_PA_WIDTH 46U /* maximum physical-address width */
#define MAX_PHY_ADDRESS_SPACE (1UL << MAXIMUM_PA_WIDTH)
/* size of the low MMIO address space: 2GB */

4
misc/config_tools/xforms/board_info.h.xsl
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@ -37,6 +37,10 @@
<xsl:template match="board-data/acrn-config">
<xsl:call-template name="MAX_PCPU_NUM" />
<xsl:call-template name="MAX_VMSIX_ON_MSI_PDEVS_NUM" />
<xsl:variable name="physical_address_bits" select="//processors/model/attribute[@id='physical_address_bits']/text()" />
<xsl:if test="$physical_address_bits">
<xsl:value-of select="acrn:define('MAXIMUM_PA_WIDTH', $physical_address_bits[1], 'U')" />
</xsl:if>
</xsl:template>
<xsl:template match="allocation-data/acrn-config">