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HV:Added support to configure PMI and VM switch info

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This patch provides interface to configure(setup before actual
collection) PMI and VM switch tracing information.

profiling_config_pmi:
    Receives required information for configuring PMI from guest,
    populates the information info per_cpu region and SMP calls profiling_initilaize_pmi

profiling_initialize_pmi:
    Configure the PMU's for sep/socwatch profiling.
    Initial write of PMU registers.
    Walk through the entries and write the value of the register accordingly.

profiling_config_vmsw:
    Receives required information for configuring
    VMswitch from guest, Configure for VM-switch data on all cpus

profiling_initialize_vmsw: initializes VMSwitch	tracing

Tracked-On: projectacrn#1409
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Manisha <manisha.chinthapally@intel.com>
This commit is contained in:
Chinthapally, Manisha
2018-10-22 15:22:06 -07:00
committed by wenlingz
parent df549096f2
commit 898b9c8d4a
2 changed files with 250 additions and 13 deletions
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77
hypervisor/include/debug/profiling_internal.h
View File

@@ -11,10 +11,19 @@
#define MAX_NR_VCPUS 8
#define MAX_NR_VMS 6
#define MAX_MSR_LIST_NUM 15U
#define MAX_GROUP_NUM 1U
#define COLLECT_PROFILE_DATA 0
#define COLLECT_POWER_DATA 1
enum MSR_CMD_TYPE {
MSR_OP_NONE = 0,
MSR_OP_READ,
MSR_OP_WRITE,
MSR_OP_READ_CLEAR
};
typedef enum IPI_COMMANDS {
IPI_MSR_OP = 0,
IPI_PMU_CONFIG,
@@ -24,6 +33,14 @@ typedef enum IPI_COMMANDS {
IPI_UNKNOWN,
} ipi_commands;
typedef enum SEP_PMU_STATE {
PMU_INITIALIZED = 0,
PMU_SETUP,
PMU_RUNNING,
PMU_UNINITIALIZED,
PMU_UNKNOWN
} sep_pmu_state;
typedef enum PROFILING_SEP_FEATURE {
CORE_PMU_SAMPLING = 0,
CORE_PMU_COUNTING,
@@ -75,12 +92,70 @@ struct profiling_vm_info_list {
struct profiling_vm_info vm_list[MAX_NR_VMS];
};
struct profiling_msr_op {
/* value to write or location to write into */
uint64_t value;
/* MSR address to read/write; last entry will have value of -1 */
uint32_t msr_id;
/* parameter; usage depends on operation */
uint16_t param;
uint8_t msr_op_type;
uint8_t reg_type;
};
struct profiling_pmi_config {
uint32_t num_groups;
uint32_t trigger_count;
struct profiling_msr_op initial_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
struct profiling_msr_op start_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
struct profiling_msr_op stop_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
struct profiling_msr_op entry_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
struct profiling_msr_op exit_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
};
struct profiling_vmsw_config {
int32_t collector_id;
struct profiling_msr_op initial_list[MAX_MSR_LIST_NUM];
struct profiling_msr_op entry_list[MAX_MSR_LIST_NUM];
struct profiling_msr_op exit_list[MAX_MSR_LIST_NUM];
};
struct sep_state {
sep_pmu_state pmu_state;
uint32_t current_pmi_group_id;
uint32_t num_pmi_groups;
struct profiling_msr_op
pmi_initial_msr_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
struct profiling_msr_op
pmi_start_msr_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
struct profiling_msr_op
pmi_stop_msr_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
struct profiling_msr_op
pmi_entry_msr_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
struct profiling_msr_op
pmi_exit_msr_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
uint32_t current_vmsw_group_id;
uint32_t num_msw_groups;
struct profiling_msr_op
vmsw_initial_msr_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
struct profiling_msr_op
vmsw_entry_msr_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
struct profiling_msr_op
vmsw_exit_msr_list[MAX_GROUP_NUM][MAX_MSR_LIST_NUM];
uint64_t guest_debugctl_value;
} __aligned(8);
/*
* Wrapper containing SEP sampling/profiling related data structures
*/
struct profiling_info_wrapper {
struct sep_state sep_state;
ipi_commands ipi_cmd;
};
} __aligned(8);
int32_t profiling_get_version_info(struct vm *vm, uint64_t addr);
int32_t profiling_get_pcpu_id(struct vm *vm, uint64_t addr);