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irq: convert irq/vector numbers to unsigned

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Currently irq and vector numbers are used inconsistently.

    * Sometimes vector or irq ids is used in bit operations, indicating
      that they should be unsigned (which is required by MISRA C).

    * At the same time we use -1 to indicate an unknown irq (in
      common_register_handler()) or unavailable irq (in
      alloc_irq()). Also (irq < 0) or (vector < 0) are used for error
      checking. These indicate that irq or vector ids should be signed.

This patch converts irq and vector numbers to unsigned 32-bit integers, and
replace the previous -1 with IRQ_INVALID or VECTOR_INVALID. The branch
conditions are updated accordingly.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Junjie Mao
2018-06-08 20:53:59 +08:00
committed by lijinxia
parent 5e2c83f395
commit 8c4a5987e3
17 changed files with 186 additions and 185 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
hypervisor/arch/x86/guest/vcpu.c
View File

@@ -99,7 +99,7 @@ int create_vcpu(int cpu_id, struct vm *vm, struct vcpu **rtn_vcpu_handle)
memset(vcpu->arch_vcpu.vmcs, 0, CPU_PAGE_SIZE);
/* Initialize exception field in VCPU context */
vcpu->arch_vcpu.exception_info.exception = -1;
vcpu->arch_vcpu.exception_info.exception = VECTOR_INVALID;
/* Initialize cur context */
vcpu->arch_vcpu.cur_context = NORMAL_WORLD;

14
hypervisor/arch/x86/guest/vioapic.c
View File

@@ -137,11 +137,11 @@ enum irqstate {
};
static int
vioapic_set_irqstate(struct vm *vm, int irq, enum irqstate irqstate)
vioapic_set_irqstate(struct vm *vm, uint32_t irq, enum irqstate irqstate)
{
struct vioapic *vioapic;
if (irq < 0 || irq >= vioapic_pincount(vm))
if (irq >= (uint32_t)vioapic_pincount(vm))
return -EINVAL;
vioapic = vm_ioapic(vm);
@@ -167,19 +167,19 @@ vioapic_set_irqstate(struct vm *vm, int irq, enum irqstate irqstate)
}
int
vioapic_assert_irq(struct vm *vm, int irq)
vioapic_assert_irq(struct vm *vm, uint32_t irq)
{
return vioapic_set_irqstate(vm, irq, IRQSTATE_ASSERT);
}
int
vioapic_deassert_irq(struct vm *vm, int irq)
vioapic_deassert_irq(struct vm *vm, uint32_t irq)
{
return vioapic_set_irqstate(vm, irq, IRQSTATE_DEASSERT);
}
int
vioapic_pulse_irq(struct vm *vm, int irq)
vioapic_pulse_irq(struct vm *vm, uint32_t irq)
{
return vioapic_set_irqstate(vm, irq, IRQSTATE_PULSE);
}
@@ -258,7 +258,7 @@ vioapic_read(struct vioapic *vioapic, uint32_t addr)
* register to clear related IRR.
*/
static void
vioapic_write_eoi(struct vioapic *vioapic, int32_t vector)
vioapic_write_eoi(struct vioapic *vioapic, uint32_t vector)
{
struct vm *vm = vioapic->vm;
int pin;
@@ -477,7 +477,7 @@ vioapic_mmio_write(void *vm, uint64_t gpa, uint64_t wval,
}
void
vioapic_process_eoi(struct vm *vm, int vector)
vioapic_process_eoi(struct vm *vm, uint32_t vector)
{
struct vioapic *vioapic;
int pin;

38
hypervisor/arch/x86/guest/vlapic.c
View File

@@ -83,13 +83,13 @@ do { \
static void *apicv_apic_access_addr;
static int
apicv_set_intr_ready(struct vlapic *vlapic, int vector, bool level);
apicv_set_intr_ready(struct vlapic *vlapic, uint32_t vector, bool level);
static int
apicv_pending_intr(struct vlapic *vlapic, int *vecptr);
apicv_pending_intr(struct vlapic *vlapic, uint32_t *vecptr);
static void
apicv_set_tmr(struct vlapic *vlapic, int vector, bool level);
apicv_set_tmr(struct vlapic *vlapic, uint32_t vector, bool level);
static void
apicv_batch_set_tmr(struct vlapic *vlapic);
@@ -366,14 +366,14 @@ vlapic_esr_write_handler(struct vlapic *vlapic)
* Returns 1 if the vcpu needs to be notified of the interrupt and 0 otherwise.
*/
static int
vlapic_set_intr_ready(struct vlapic *vlapic, int vector, bool level)
vlapic_set_intr_ready(struct vlapic *vlapic, uint32_t vector, bool level)
{
struct lapic *lapic;
struct lapic_reg *irrptr, *tmrptr;
uint32_t mask;
int idx;
ASSERT((vector >= 0) && (vector <= NR_MAX_VECTOR),
ASSERT(vector <= NR_MAX_VECTOR,
"invalid vector %d", vector);
lapic = vlapic->apic_page;
@@ -742,7 +742,7 @@ vlapic_set_error(struct vlapic *vlapic, uint32_t mask)
}
static int
vlapic_trigger_lvt(struct vlapic *vlapic, int vector)
vlapic_trigger_lvt(struct vlapic *vlapic, uint32_t vector)
{
uint32_t lvt;
@@ -1081,7 +1081,7 @@ vlapic_icrlo_write_handler(struct vlapic *vlapic)
}
int
vlapic_pending_intr(struct vlapic *vlapic, int *vecptr)
vlapic_pending_intr(struct vlapic *vlapic, uint32_t *vecptr)
{
struct lapic *lapic = vlapic->apic_page;
int i, bitpos;
@@ -1111,7 +1111,7 @@ vlapic_pending_intr(struct vlapic *vlapic, int *vecptr)
}
void
vlapic_intr_accepted(struct vlapic *vlapic, int vector)
vlapic_intr_accepted(struct vlapic *vlapic, uint32_t vector)
{
struct lapic *lapic = vlapic->apic_page;
struct lapic_reg *irrptr, *isrptr;
@@ -1584,7 +1584,7 @@ vlapic_enabled(struct vlapic *vlapic)
}
void
vlapic_set_tmr(struct vlapic *vlapic, int vector, bool level)
vlapic_set_tmr(struct vlapic *vlapic, uint32_t vector, bool level)
{
struct lapic *lapic;
struct lapic_reg *tmrptr;
@@ -1613,7 +1613,7 @@ vlapic_apicv_batch_set_tmr(struct vlapic *vlapic)
}
void
vlapic_apicv_set_tmr(struct vlapic *vlapic, int vector, bool level)
vlapic_apicv_set_tmr(struct vlapic *vlapic, uint32_t vector, bool level)
{
if (vlapic->ops.apicv_set_tmr != NULL)
vlapic->ops.apicv_set_tmr(vlapic, vector, level);
@@ -1622,7 +1622,7 @@ vlapic_apicv_set_tmr(struct vlapic *vlapic, int vector, bool level)
void
vlapic_reset_tmr(struct vlapic *vlapic)
{
int vector;
uint32_t vector;
dev_dbg(ACRN_DBG_LAPIC,
"vlapic resetting all vectors to edge-triggered");
@@ -1635,9 +1635,9 @@ vlapic_reset_tmr(struct vlapic *vlapic)
void
vlapic_set_tmr_one_vec(struct vlapic *vlapic, __unused int delmode,
int vector, bool level)
uint32_t vector, bool level)
{
ASSERT((vector >= 0) && (vector <= NR_MAX_VECTOR),
ASSERT(vector <= NR_MAX_VECTOR,
"invalid vector %d", vector);
/*
@@ -1662,7 +1662,7 @@ vlapic_set_tmr_one_vec(struct vlapic *vlapic, __unused int delmode,
}
int
vlapic_set_intr(struct vcpu *vcpu, int vector, bool level)
vlapic_set_intr(struct vcpu *vcpu, uint32_t vector, bool level)
{
struct vlapic *vlapic;
int ret = 0;
@@ -1687,7 +1687,7 @@ vlapic_set_intr(struct vcpu *vcpu, int vector, bool level)
}
int
vlapic_set_local_intr(struct vm *vm, int cpu_id, int vector)
vlapic_set_local_intr(struct vm *vm, int cpu_id, uint32_t vector)
{
struct vlapic *vlapic;
uint64_t dmask = 0;
@@ -2013,7 +2013,7 @@ void vlapic_free(struct vcpu *vcpu)
* APIC-v functions
* **/
static int
apicv_set_intr_ready(struct vlapic *vlapic, int vector, __unused bool level)
apicv_set_intr_ready(struct vlapic *vlapic, uint32_t vector, __unused bool level)
{
struct pir_desc *pir_desc;
uint64_t mask;
@@ -2030,7 +2030,7 @@ apicv_set_intr_ready(struct vlapic *vlapic, int vector, __unused bool level)
}
static int
apicv_pending_intr(struct vlapic *vlapic, __unused int *vecptr)
apicv_pending_intr(struct vlapic *vlapic, __unused uint32_t *vecptr)
{
struct pir_desc *pir_desc;
struct lapic *lapic;
@@ -2061,7 +2061,7 @@ apicv_pending_intr(struct vlapic *vlapic, __unused int *vecptr)
}
static void
apicv_set_tmr(__unused struct vlapic *vlapic, int vector, bool level)
apicv_set_tmr(__unused struct vlapic *vlapic, uint32_t vector, bool level)
{
uint64_t mask, val;
@@ -2234,7 +2234,7 @@ int veoi_vmexit_handler(struct vcpu *vcpu)
{
struct vlapic *vlapic = NULL;
int vector;
uint32_t vector;
struct lapic *lapic;
struct lapic_reg *tmrptr;
uint32_t idx, mask;

8
hypervisor/arch/x86/guest/vlapic_priv.h
View File

@@ -99,11 +99,11 @@ struct pir_desc {
struct vlapic_ops {
int (*apicv_set_intr_ready)
(struct vlapic *vlapic, int vector, bool level);
int (*apicv_pending_intr)(struct vlapic *vlapic, int *vecptr);
void (*apicv_intr_accepted)(struct vlapic *vlapic, int vector);
(struct vlapic *vlapic, uint32_t vector, bool level);
int (*apicv_pending_intr)(struct vlapic *vlapic, uint32_t *vecptr);
void (*apicv_intr_accepted)(struct vlapic *vlapic, uint32_t vector);
void (*apicv_post_intr)(struct vlapic *vlapic, int hostcpu);
void (*apicv_set_tmr)(struct vlapic *vlapic, int vector, bool level);
void (*apicv_set_tmr)(struct vlapic *vlapic, uint32_t vector, bool level);
void (*apicv_batch_set_tmr)(struct vlapic *vlapic);
void (*enable_x2apic_mode)(struct vlapic *vlapic);
};

26
hypervisor/arch/x86/guest/vpic.c
View File

@@ -58,7 +58,7 @@ struct pic {
bool rotate;
bool sfn; /* special fully-nested mode */
int irq_base;
uint32_t irq_base;
uint8_t request; /* Interrupt Request Register (IIR) */
uint8_t service; /* Interrupt Service (ISR) */
uint8_t mask; /* Interrupt Mask Register (IMR) */
@@ -489,12 +489,12 @@ static void vpic_set_pinstate(struct vpic *vpic, int pin, bool newstate)
vpic_notify_intr(vpic);
}
static int vpic_set_irqstate(struct vm *vm, int irq, enum irqstate irqstate)
static int vpic_set_irqstate(struct vm *vm, uint32_t irq, enum irqstate irqstate)
{
struct vpic *vpic;
struct pic *pic;
if (irq < 0 || irq > 15)
if (irq > 15)
return -EINVAL;
vpic = vm_pic(vm);
@@ -524,26 +524,26 @@ static int vpic_set_irqstate(struct vm *vm, int irq, enum irqstate irqstate)
}
/* hypervisor interface: assert/deassert/pulse irq */
int vpic_assert_irq(struct vm *vm, int irq)
int vpic_assert_irq(struct vm *vm, uint32_t irq)
{
return vpic_set_irqstate(vm, irq, IRQSTATE_ASSERT);
}
int vpic_deassert_irq(struct vm *vm, int irq)
int vpic_deassert_irq(struct vm *vm, uint32_t irq)
{
return vpic_set_irqstate(vm, irq, IRQSTATE_DEASSERT);
}
int vpic_pulse_irq(struct vm *vm, int irq)
int vpic_pulse_irq(struct vm *vm, uint32_t irq)
{
return vpic_set_irqstate(vm, irq, IRQSTATE_PULSE);
}
int vpic_set_irq_trigger(struct vm *vm, int irq, enum vpic_trigger trigger)
int vpic_set_irq_trigger(struct vm *vm, uint32_t irq, enum vpic_trigger trigger)
{
struct vpic *vpic;
if (irq < 0 || irq > 15)
if (irq > 15)
return -EINVAL;
/*
@@ -575,11 +575,11 @@ int vpic_set_irq_trigger(struct vm *vm, int irq, enum vpic_trigger trigger)
return 0;
}
int vpic_get_irq_trigger(struct vm *vm, int irq, enum vpic_trigger *trigger)
int vpic_get_irq_trigger(struct vm *vm, uint32_t irq, enum vpic_trigger *trigger)
{
struct vpic *vpic;
if (irq < 0 || irq > 15)
if (irq > 15)
return -EINVAL;
vpic = vm_pic(vm);
@@ -593,7 +593,7 @@ int vpic_get_irq_trigger(struct vm *vm, int irq, enum vpic_trigger *trigger)
return 0;
}
void vpic_pending_intr(struct vm *vm, int *vecptr)
void vpic_pending_intr(struct vm *vm, uint32_t *vecptr)
{
struct vpic *vpic;
struct pic *pic;
@@ -616,7 +616,7 @@ void vpic_pending_intr(struct vm *vm, int *vecptr)
* interrupt vector instead.
*/
if (pin == -1) {
*vecptr = -1;
*vecptr = VECTOR_INVALID;
VPIC_UNLOCK(vpic);
return;
}
@@ -646,7 +646,7 @@ static void vpic_pin_accepted(struct pic *pic, int pin)
}
}
void vpic_intr_accepted(struct vm *vm, int vector)
void vpic_intr_accepted(struct vm *vm, uint32_t vector)
{
struct vpic *vpic;
int pin;