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HV: move NR_IOAPICS to platform acpi info

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The I/O APIC number should be parsed from host ACPI table, so move the
definition from Kconfig to platform_acpi_info.h.

Tracked-On: #1500
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Victor Sun 2018-10-12 23:17:41 +08:00 committed by wenlingz
parent bf834072d4
commit 8f701b0ff7
5 changed files with 11 additions and 10 deletions
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5
hypervisor/arch/x86/Kconfig
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@ -42,11 +42,6 @@ config MAX_VCPUS_PER_VM
range 1 8 range 1 8
default 4 default 4
config NR_IOAPICS
int "Maximum number of IOAPICs supported"
range 1 2
default 1
config MAX_IOMMU_NUM config MAX_IOMMU_NUM
int "Maximum number of iommu dev" int "Maximum number of iommu dev"
range 1 2 range 1 2

8
hypervisor/arch/x86/ioapic.c
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@ -18,7 +18,7 @@ static struct gsi_table gsi_table[NR_MAX_GSI];
static uint32_t nr_gsi; static uint32_t nr_gsi;
static spinlock_t ioapic_lock; static spinlock_t ioapic_lock;
static union ioapic_rte saved_rte[CONFIG_NR_IOAPICS][IOAPIC_MAX_PIN]; static union ioapic_rte saved_rte[NR_IOAPICS][IOAPIC_MAX_PIN];
/* /*
* the irq to ioapic pin mapping should extract from ACPI MADT table * the irq to ioapic pin mapping should extract from ACPI MADT table
@ -351,7 +351,7 @@ void setup_ioapic_irqs(void)
spinlock_init(&ioapic_lock); spinlock_init(&ioapic_lock);
for (ioapic_id = 0U; for (ioapic_id = 0U;
ioapic_id < CONFIG_NR_IOAPICS; ioapic_id++) { ioapic_id < NR_IOAPICS; ioapic_id++) {
void *addr; void *addr;
uint8_t pin, nr_pins; uint8_t pin, nr_pins;
@ -403,7 +403,7 @@ void suspend_ioapic(void)
{ {
uint8_t ioapic_id, ioapic_pin; uint8_t ioapic_id, ioapic_pin;
for (ioapic_id = 0U; ioapic_id < CONFIG_NR_IOAPICS; ioapic_id++) { for (ioapic_id = 0U; ioapic_id < NR_IOAPICS; ioapic_id++) {
void *addr; void *addr;
uint8_t nr_pins; uint8_t nr_pins;
@ -420,7 +420,7 @@ void resume_ioapic(void)
{ {
uint8_t ioapic_id, ioapic_pin; uint8_t ioapic_id, ioapic_pin;
for (ioapic_id = 0U; ioapic_id < CONFIG_NR_IOAPICS; ioapic_id++) { for (ioapic_id = 0U; ioapic_id < NR_IOAPICS; ioapic_id++) {
void *addr; void *addr;
uint8_t nr_pins; uint8_t nr_pins;

3
hypervisor/bsp/include/sbl/platform_acpi_info.h
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@ -12,6 +12,9 @@
#define ACPI_INFO_VALIDATED #define ACPI_INFO_VALIDATED
/* APIC */
#define NR_IOAPICS 1U
/* pm sstate data */ /* pm sstate data */
#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO #define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_EVT_BIT_WIDTH 0x20U #define PM1A_EVT_BIT_WIDTH 0x20U

3
hypervisor/bsp/include/uefi/platform_acpi_info.h
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@ -10,6 +10,9 @@
#ifndef PLATFORM_ACPI_INFO_H #ifndef PLATFORM_ACPI_INFO_H
#define PLATFORM_ACPI_INFO_H #define PLATFORM_ACPI_INFO_H
/* APIC */
#define NR_IOAPICS 1U
/* pm sstate data */ /* pm sstate data */
#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO #define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_EVT_BIT_WIDTH 0U #define PM1A_EVT_BIT_WIDTH 0U

2
hypervisor/include/arch/x86/ioapic.h
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@ -14,7 +14,7 @@
#define IOAPIC_MAX_LINES 120U #define IOAPIC_MAX_LINES 120U
#define NR_LEGACY_IRQ 16U #define NR_LEGACY_IRQ 16U
#define NR_LEGACY_PIN NR_LEGACY_IRQ #define NR_LEGACY_PIN NR_LEGACY_IRQ
#define NR_MAX_GSI (CONFIG_NR_IOAPICS * IOAPIC_MAX_LINES) #define NR_MAX_GSI (NR_IOAPICS * IOAPIC_MAX_LINES)
void setup_ioapic_irqs(void); void setup_ioapic_irqs(void);