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HV: platform acpi info refactor

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Replace platform_acpi_info.c with platform_acpi_info.h and define needed
host ACPI info in MACROs. Then the struct host_acpi_info is not needed
any more.

This header file should be generated by offline tool automatically;

Tracked-On: #1500
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Victor Sun 2018-10-12 14:33:04 +08:00 committed by wenlingz
parent 4ed87f90e9
commit bf834072d4
10 changed files with 160 additions and 134 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
hypervisor/Makefile
View File

@ -103,7 +103,7 @@ ifeq ($(CONFIG_PARTITION_MODE),y)
INCLUDE_PATH += include/dm/vpci
endif
INCLUDE_PATH += bsp/include
INCLUDE_PATH += bsp/$(CONFIG_PLATFORM)/include/bsp
INCLUDE_PATH += bsp/include/$(CONFIG_PLATFORM)
INCLUDE_PATH += boot/include
INCLUDE_PATH += $(HV_OBJDIR)/include
@ -186,7 +186,6 @@ C_SRCS += dm/vrtc.c
endif
C_SRCS += bsp/$(CONFIG_PLATFORM)/$(CONFIG_PLATFORM).c
C_SRCS += bsp/$(CONFIG_PLATFORM)/platform_acpi_info.c
ifeq ($(CONFIG_PLATFORM),uefi)
C_SRCS += bsp/$(CONFIG_PLATFORM)/cmdline.c

20
hypervisor/arch/x86/guest/pm.c
View File

@ -111,17 +111,15 @@ void vm_setup_cpu_state(struct vm *vm)
*/
int vm_load_pm_s_state(struct vm *vm)
{
if ((boot_cpu_data.family == host_acpi_info.x86_family)
&& (boot_cpu_data.model == host_acpi_info.x86_model)) {
vm->pm.sx_state_data = (struct pm_s_state_data *)
&host_acpi_info.pm_s_state;
pr_info("System S3/S5 is supported.");
return 0;
} else {
vm->pm.sx_state_data = NULL;
pr_err("System S3/S5 is NOT supported.");
return -1;
}
#ifdef ACPI_INFO_VALIDATED
vm->pm.sx_state_data = (struct pm_s_state_data *)&host_pm_s_state;
pr_info("System S3/S5 is supported.");
return 0;
#else
vm->pm.sx_state_data = NULL;
pr_err("System S3/S5 is NOT supported.");
return -1;
#endif
}
static inline uint32_t s3_enabled(uint32_t pm1_cnt)

44
hypervisor/arch/x86/pm.c
View File

@ -7,6 +7,50 @@
struct cpu_context cpu_ctx;
/* The values in this structure should come from host ACPI table */
struct pm_s_state_data host_pm_s_state = {
.pm1a_evt = {
.space_id = PM1A_EVT_SPACE_ID,
.bit_width = PM1A_EVT_BIT_WIDTH,
.bit_offset = PM1A_EVT_BIT_OFFSET,
.access_size = PM1A_EVT_ACCESS_SIZE,
.address = PM1A_EVT_ADDRESS
},
.pm1b_evt = {
.space_id = PM1B_EVT_SPACE_ID,
.bit_width = PM1B_EVT_BIT_WIDTH,
.bit_offset = PM1B_EVT_BIT_OFFSET,
.access_size = PM1B_EVT_ACCESS_SIZE,
.address = PM1B_EVT_ADDRESS
},
.pm1a_cnt = {
.space_id = PM1A_CNT_SPACE_ID,
.bit_width = PM1A_CNT_BIT_WIDTH,
.bit_offset = PM1A_CNT_BIT_OFFSET,
.access_size = PM1A_CNT_ACCESS_SIZE,
.address = PM1A_CNT_ADDRESS
},
.pm1b_cnt = {
.space_id = PM1B_CNT_SPACE_ID,
.bit_width = PM1B_CNT_BIT_WIDTH,
.bit_offset = PM1B_CNT_BIT_OFFSET,
.access_size = PM1B_CNT_ACCESS_SIZE,
.address = PM1B_CNT_ADDRESS
},
.s3_pkg = {
.val_pm1a = S3_PKG_VAL_PM1A,
.val_pm1b = S3_PKG_VAL_PM1B,
.reserved = S3_PKG_RESERVED
},
.s5_pkg = {
.val_pm1a = S5_PKG_VAL_PM1A,
.val_pm1b = S5_PKG_VAL_PM1B,
.reserved = S5_PKG_RESERVED
},
.wake_vector_32 = (uint32_t *)WAKE_VECTOR_32,
.wake_vector_64 = (uint64_t *)WAKE_VECTOR_64
};
/* whether the host enter s3 success */
uint8_t host_enter_s3_success = 1U;

4
hypervisor/boot/acpi.c
View File

@ -377,9 +377,9 @@ void acpi_fixup(void)
facs_addr = get_facs_table();
if (facs_addr != NULL) {
host_acpi_info.pm_s_state.wake_vector_32 =
host_pm_s_state.wake_vector_32 =
(uint32_t *)(facs_addr + OFFSET_WAKE_VECTOR_32);
host_acpi_info.pm_s_state.wake_vector_64 =
host_pm_s_state.wake_vector_64 =
(uint64_t *)(facs_addr + OFFSET_WAKE_VECTOR_64);
}
}

4
hypervisor/bsp/include/bsp_extern.h
View File

@ -18,6 +18,8 @@
#ifndef BSP_EXTERN_H
#define BSP_EXTERN_H
#include "platform_acpi_info.h"
#define UOS_DEFAULT_START_ADDR (0x100000000UL)
struct acpi_info {
@ -30,8 +32,6 @@ struct acpi_info {
/**********************************/
/* EXTERNAL VARIABLES */
/**********************************/
extern struct acpi_info host_acpi_info;
/* BSP Interfaces */
void init_bsp(void);

51
hypervisor/bsp/include/sbl/platform_acpi_info.h Normal file
View File

@ -0,0 +1,51 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/* This is a template header file for platform ACPI info definition,
* we should use a user space tool running on target to generate this file.
*/
#ifndef PLATFORM_ACPI_INFO_H
#define PLATFORM_ACPI_INFO_H
#define ACPI_INFO_VALIDATED
/* pm sstate data */
#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_EVT_BIT_WIDTH 0x20U
#define PM1A_EVT_BIT_OFFSET 0U
#define PM1A_EVT_ACCESS_SIZE 3U
#define PM1A_EVT_ADDRESS 0x400UL
#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_EVT_BIT_WIDTH 0U
#define PM1B_EVT_BIT_OFFSET 0U
#define PM1B_EVT_ACCESS_SIZE 0U
#define PM1B_EVT_ADDRESS 0UL
#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_CNT_BIT_WIDTH 0x10U
#define PM1A_CNT_BIT_OFFSET 0U
#define PM1A_CNT_ACCESS_SIZE 2U
#define PM1A_CNT_ADDRESS 0x404UL
#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_CNT_BIT_WIDTH 0U
#define PM1B_CNT_BIT_OFFSET 0U
#define PM1B_CNT_ACCESS_SIZE 0U
#define PM1B_CNT_ADDRESS 0UL
#define S3_PKG_VAL_PM1A 0x05U
#define S3_PKG_VAL_PM1B 0U
#define S3_PKG_RESERVED 0U
#define S5_PKG_VAL_PM1A 0x07U
#define S5_PKG_VAL_PM1B 0U
#define S5_PKG_RESERVED 0U
#define WAKE_VECTOR_32 0x7A86BBDCUL
#define WAKE_VECTOR_64 0x7A86BBE8UL
#endif /* PLATFORM_ACPI_INFO_H */

49
hypervisor/bsp/include/uefi/platform_acpi_info.h Normal file
View File

@ -0,0 +1,49 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/* This is a template header file for platform ACPI info definition,
* we should use a user space tool running on target to generate this file.
*/
#ifndef PLATFORM_ACPI_INFO_H
#define PLATFORM_ACPI_INFO_H
/* pm sstate data */
#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_EVT_BIT_WIDTH 0U
#define PM1A_EVT_BIT_OFFSET 0U
#define PM1A_EVT_ACCESS_SIZE 0U
#define PM1A_EVT_ADDRESS 0UL
#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_EVT_BIT_WIDTH 0U
#define PM1B_EVT_BIT_OFFSET 0U
#define PM1B_EVT_ACCESS_SIZE 0U
#define PM1B_EVT_ADDRESS 0UL
#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_CNT_BIT_WIDTH 0U
#define PM1A_CNT_BIT_OFFSET 0U
#define PM1A_CNT_ACCESS_SIZE 0U
#define PM1A_CNT_ADDRESS 0UL
#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_CNT_BIT_WIDTH 0U
#define PM1B_CNT_BIT_OFFSET 0U
#define PM1B_CNT_ACCESS_SIZE 0U
#define PM1B_CNT_ADDRESS 0UL
#define S3_PKG_VAL_PM1A 0U
#define S3_PKG_VAL_PM1B 0U
#define S3_PKG_RESERVED 0U
#define S5_PKG_VAL_PM1A 0U
#define S5_PKG_VAL_PM1B 0U
#define S5_PKG_RESERVED 0U
#define WAKE_VECTOR_32 0UL
#define WAKE_VECTOR_64 0UL
#endif /* PLATFORM_ACPI_INFO_H */

59
hypervisor/bsp/sbl/platform_acpi_info.c
View File

@ -1,59 +0,0 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <hypervisor.h>
struct acpi_info host_acpi_info = {
.x86_family = 6U,
.x86_model = 0x5CU, /* ApolloLake */
.pm_s_state = {
.pm1a_evt = {
.space_id = SPACE_SYSTEM_IO,
.bit_width = 0x20U,
.bit_offset = 0U,
.access_size = 3U,
.address = 0x400UL
},
.pm1b_evt = {
.space_id = SPACE_SYSTEM_IO,
.bit_width = 0U,
.bit_offset = 0U,
.access_size = 0U,
.address = 0UL
},
.pm1a_cnt = {
.space_id = SPACE_SYSTEM_IO,
.bit_width = 0x10U,
.bit_offset = 0U,
.access_size = 2U,
.address = 0x404UL
},
.pm1b_cnt = {
.space_id = SPACE_SYSTEM_IO,
.bit_width = 0U,
.bit_offset = 0U,
.access_size = 0U,
.address = 0UL
},
.s3_pkg = {
.val_pm1a = 0x05U,
.val_pm1b = 0U,
.reserved = 0U
},
.s5_pkg = {
.val_pm1a = 0x07U,
.val_pm1b = 0U,
.reserved = 0U
},
#if 0 /* set to 0 if run with ABL, set to 1 if switch back to SBL; */
.wake_vector_32 = (uint32_t *)0x7A86BBDCUL,
.wake_vector_64 = (uint64_t *)0x7A86BBE8UL
#else
.wake_vector_32 = (uint32_t *)0x7AFDCEFCUL,
.wake_vector_64 = (uint64_t *)0x7AFDCF08UL
#endif
}
};

58
hypervisor/bsp/uefi/platform_acpi_info.c
View File

@ -1,58 +0,0 @@
/*
* Copyright (C) 2018 Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/* This is a template for uninitialized host_acpi_info,
* we should use a user space tool running on target to generate this file.
*/
#include <hypervisor.h>
struct acpi_info host_acpi_info = {
.x86_family = 0U,
.x86_model = 0U,
.pm_s_state = {
.pm1a_evt = {
.space_id = SPACE_SYSTEM_IO,
.bit_width = 0U,
.bit_offset = 0U,
.access_size = 0U,
.address = 0UL
},
.pm1b_evt = {
.space_id = SPACE_SYSTEM_IO,
.bit_width = 0U,
.bit_offset = 0U,
.access_size = 0U,
.address = 0UL
},
.pm1a_cnt = {
.space_id = SPACE_SYSTEM_IO,
.bit_width = 0U,
.bit_offset = 0U,
.access_size = 0U,
.address = 0UL
},
.pm1b_cnt = {
.space_id = SPACE_SYSTEM_IO,
.bit_width = 0U,
.bit_offset = 0U,
.access_size = 0U,
.address = 0UL
},
.s3_pkg = {
.val_pm1a = 0U,
.val_pm1b = 0U,
.reserved = 0U
},
.s5_pkg = {
.val_pm1a = 0U,
.val_pm1b = 0U,
.reserved = 0U
},
.wake_vector_32 = (uint32_t *)0UL,
.wake_vector_64 = (uint64_t *)0UL
}
};

2
hypervisor/include/arch/x86/host_pm.h
View File

@ -9,6 +9,8 @@
#define BIT_SLP_EN 13U
#define BIT_WAK_STS 15U
extern struct pm_s_state_data host_pm_s_state;
extern uint8_t host_enter_s3_success;
int enter_s3(struct vm *vm, uint32_t pm1a_cnt_val, uint32_t pm1b_cnt_val);