github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-09-23 09:47:44 +00:00
Code Issues Projects Releases Wiki Activity

acrn-config: Reorg config tool folder

Browse Source 
Remove vm_configs folder and move all the XML files and generic code example into config_tools/data

Tracked-On: #5644
Signed-off-by: Xie, nanlin <nanlin.xie@intel.com>
This commit is contained in:
Xie, nanlin
2021-01-23 07:24:06 +08:00
committed by wenlingz
parent 0ab5db9cf9
commit 97c9b24030
452 changed files with 1533 additions and 12205 deletions
Download Patch File Download Diff File Expand all files Collapse all files

517
misc/config_tools/data/apl-mrb/apl-mrb.xml Normal file
View File

@@ -0,0 +1,517 @@
<acrn-config board="apl-mrb">
<BIOS_INFO>
</BIOS_INFO>
<BASE_BOARD_INFO>
</BASE_BOARD_INFO>
<PCI_DEVICE>
00:00.0 Host bridge: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Host Bridge (rev 0b)
00:00.1 Signal processing controller: Intel Corporation Device 5a8c (rev 0b)
Region 0: Memory at b3618000 (64-bit, non-prefetchable) [size=32K]
00:02.0 VGA compatible controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Integrated Graphics Controller (rev 0b)
Region 0: Memory at b2000000 (64-bit, non-prefetchable) [size=16M]
Region 2: Memory at a0000000 (64-bit, prefetchable) [size=256M]
00:03.0 Multimedia controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Imaging Unit (rev 0b)
Region 0: Memory at b1000000 (64-bit, non-prefetchable) [size=16M]
00:0e.0 Audio device: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Audio Cluster (rev 0b)
Region 0: Memory at b3620000 (64-bit, non-prefetchable) [size=16K]
Region 4: Memory at b3500000 (64-bit, non-prefetchable) [size=1M]
00:0f.0 Communication controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Trusted Execution Engine (rev 0b)
Region 0: Memory at b3657000 (64-bit, non-prefetchable) [size=4K]
00:0f.1 Communication controller: Intel Corporation Device 5a9c (rev 0b)
Region 0: Memory at b3656000 (64-bit, non-prefetchable) [size=4K]
00:0f.2 Communication controller: Intel Corporation Device 5a9e (rev 0b)
Region 0: Memory at b3655000 (64-bit, non-prefetchable) [size=4K]
00:11.0 Unclassified device [0050]: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Integrated Sensor Hub (rev 0b)
Region 0: Memory at b3624000 (64-bit, non-prefetchable) [size=8K]
Region 2: Memory at b3654000 (64-bit, non-prefetchable) [size=4K]
00:12.0 SATA controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SATA AHCI Controller (rev 0b)
Region 0: Memory at b3610000 (32-bit, non-prefetchable) [size=8K]
Region 1: Memory at b3653000 (32-bit, non-prefetchable) [size=256]
Region 5: Memory at b3652000 (32-bit, non-prefetchable) [size=2K]
00:13.0 PCI bridge: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series PCI Express Port A #1 (rev fb)
00:13.2 PCI bridge: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series PCI Express Port A #3 (rev fb)
00:13.3 PCI bridge: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series PCI Express Port A #4 (rev fb)
00:14.0 PCI bridge: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series PCI Express Port B #1 (rev fb)
00:15.0 USB controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series USB xHCI (rev 0b)
Region 0: Memory at b3600000 (64-bit, non-prefetchable) [size=64K]
00:15.1 USB controller: Intel Corporation Device 5aaa (rev 0b)
Region 0: Memory at b3000000 (64-bit, non-prefetchable) [size=2M]
00:16.0 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #1 (rev 0b)
Region 0: Memory at b3650000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b364f000 (64-bit, non-prefetchable) [size=4K]
00:16.1 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #2 (rev 0b)
Region 0: Memory at b364e000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b364d000 (64-bit, non-prefetchable) [size=4K]
00:16.2 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #3 (rev 0b)
Region 0: Memory at b364c000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b364b000 (64-bit, non-prefetchable) [size=4K]
00:16.3 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #4 (rev 0b)
Region 0: Memory at b364a000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b3649000 (64-bit, non-prefetchable) [size=4K]
00:17.0 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #5 (rev 0b)
Region 0: Memory at b3648000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b3647000 (64-bit, non-prefetchable) [size=4K]
00:17.1 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #6 (rev 0b)
Region 0: Memory at b3646000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b3645000 (64-bit, non-prefetchable) [size=4K]
00:17.2 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #7 (rev 0b)
Region 0: Memory at b3644000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b3643000 (64-bit, non-prefetchable) [size=4K]
00:17.3 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #8 (rev 0b)
Region 0: Memory at b3642000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b3641000 (64-bit, non-prefetchable) [size=4K]
00:18.0 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series HSUART Controller #1 (rev 0b)
Region 0: Memory at b3640000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b363f000 (64-bit, non-prefetchable) [size=4K]
00:18.1 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series HSUART Controller #2 (rev 0b)
Region 0: Memory at b363e000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b363d000 (64-bit, non-prefetchable) [size=4K]
00:18.2 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series HSUART Controller #3 (rev 0b)
Region 0: Memory at 80e00000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b363b000 (64-bit, non-prefetchable) [size=4K]
00:18.3 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series HSUART Controller #4 (rev 0b)
Region 0: Memory at b363a000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b3639000 (64-bit, non-prefetchable) [size=4K]
00:19.0 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SPI Controller #1 (rev 0b)
Region 0: Memory at b3638000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b3637000 (64-bit, non-prefetchable) [size=4K]
00:19.1 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SPI Controller #2 (rev 0b)
Region 0: Memory at b3636000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b3635000 (64-bit, non-prefetchable) [size=4K]
00:19.2 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SPI Controller #3 (rev 0b)
Region 0: Memory at b3634000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b3633000 (64-bit, non-prefetchable) [size=4K]
00:1a.0 Serial bus controller [0c80]: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series PWM Pin Controller (rev 0b)
Region 0: Memory at b3632000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b3631000 (64-bit, non-prefetchable) [size=4K]
00:1b.0 SD Host controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SDXC/MMC Host Controller (rev 0b)
Region 0: Memory at b3630000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b362f000 (64-bit, non-prefetchable) [size=4K]
00:1c.0 SD Host controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series eMMC Controller (rev 0b)
Region 0: Memory at b362e000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b362d000 (64-bit, non-prefetchable) [size=4K]
00:1e.0 SD Host controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SDIO Controller (rev 0b)
Region 0: Memory at b362c000 (64-bit, non-prefetchable) [size=4K]
Region 2: Memory at b362b000 (64-bit, non-prefetchable) [size=4K]
00:1f.0 ISA bridge: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Low Pin Count Interface (rev 0b)
00:1f.1 SMBus: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SMBus Controller (rev 0b)
Region 0: Memory at b362a000 (64-bit, non-prefetchable) [size=256]
02:00.0 Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)
Region 0: Memory at b3400000 (32-bit, non-prefetchable) [size=512K]
Region 3: Memory at b3480000 (32-bit, non-prefetchable) [size=16K]
03:00.0 Ethernet controller: Marvell Technology Group Ltd. 88W8897 [AVASTAR] 802.11ac Wireless
Region 0: Memory at b3300000 (64-bit, prefetchable) [size=1M]
Region 2: Memory at b3200000 (64-bit, prefetchable) [size=1M]
</PCI_DEVICE>
<PCI_VID_PID>
00:00.0 0600: 8086:5af0 (rev 0b)
00:00.1 1180: 8086:5a8c (rev 0b)
00:02.0 0300: 8086:5a84 (rev 0b)
00:03.0 0480: 8086:5a88 (rev 0b)
00:0e.0 0403: 8086:5a98 (rev 0b)
00:0f.0 0780: 8086:5a9a (rev 0b)
00:0f.1 0780: 8086:5a9c (rev 0b)
00:0f.2 0780: 8086:5a9e (rev 0b)
00:11.0 0050: 8086:5aa2 (rev 0b)
00:12.0 0106: 8086:5ae3 (rev 0b)
00:13.0 0604: 8086:5ad8 (rev fb)
00:13.2 0604: 8086:5ada (rev fb)
00:13.3 0604: 8086:5adb (rev fb)
00:14.0 0604: 8086:5ad6 (rev fb)
00:15.0 0c03: 8086:5aa8 (rev 0b)
00:15.1 0c03: 8086:5aaa (rev 0b)
00:16.0 1180: 8086:5aac (rev 0b)
00:16.1 1180: 8086:5aae (rev 0b)
00:16.2 1180: 8086:5ab0 (rev 0b)
00:16.3 1180: 8086:5ab2 (rev 0b)
00:17.0 1180: 8086:5ab4 (rev 0b)
00:17.1 1180: 8086:5ab6 (rev 0b)
00:17.2 1180: 8086:5ab8 (rev 0b)
00:17.3 1180: 8086:5aba (rev 0b)
00:18.0 1180: 8086:5abc (rev 0b)
00:18.1 1180: 8086:5abe (rev 0b)
00:18.2 1180: 8086:5ac0 (rev 0b)
00:18.3 1180: 8086:5aee (rev 0b)
00:19.0 1180: 8086:5ac2 (rev 0b)
00:19.1 1180: 8086:5ac4 (rev 0b)
00:19.2 1180: 8086:5ac6 (rev 0b)
00:1a.0 0c80: 8086:5ac8 (rev 0b)
00:1b.0 0805: 8086:5aca (rev 0b)
00:1c.0 0805: 8086:5acc (rev 0b)
00:1e.0 0805: 8086:5ad0 (rev 0b)
00:1f.0 0601: 8086:5ae8 (rev 0b)
00:1f.1 0c05: 8086:5ad4 (rev 0b)
02:00.0 0200: 8086:1533 (rev 03)
03:00.0 0200: 11ab:2b38
</PCI_VID_PID>
<WAKE_VECTOR_INFO>
#define WAKE_VECTOR_32 0x7AFDCEFCUL
#define WAKE_VECTOR_64 0x7AFDCF08UL
</WAKE_VECTOR_INFO>
<RESET_REGISTER_INFO>
#define RESET_REGISTER_ADDRESS 0xCF9UL
#define RESET_REGISTER_SPACE_ID SPACE_SYSTEM_IO
#define RESET_REGISTER_VALUE 0xeU
</RESET_REGISTER_INFO>
<PM_INFO>
#define PM1A_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_EVT_BIT_WIDTH 0x20U
#define PM1A_EVT_BIT_OFFSET 0x0U
#define PM1A_EVT_ADDRESS 0x400UL
#define PM1A_EVT_ACCESS_SIZE 0x3U
#define PM1B_EVT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_EVT_BIT_WIDTH 0x0U
#define PM1B_EVT_BIT_OFFSET 0x0U
#define PM1B_EVT_ADDRESS 0x0UL
#define PM1B_EVT_ACCESS_SIZE 0x0U
#define PM1A_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1A_CNT_BIT_WIDTH 0x10U
#define PM1A_CNT_BIT_OFFSET 0x0U
#define PM1A_CNT_ADDRESS 0x404UL
#define PM1A_CNT_ACCESS_SIZE 0x2U
#define PM1B_CNT_SPACE_ID SPACE_SYSTEM_IO
#define PM1B_CNT_BIT_WIDTH 0x0U
#define PM1B_CNT_BIT_OFFSET 0x0U
#define PM1B_CNT_ADDRESS 0x0UL
#define PM1B_CNT_ACCESS_SIZE 0x0U
</PM_INFO>
<S3_INFO>
#define S3_PKG_VAL_PM1A 0x5U
#define S3_PKG_VAL_PM1B 0U
#define S3_PKG_RESERVED 0x0U
</S3_INFO>
<S5_INFO>
#define S5_PKG_VAL_PM1A 0x7U
#define S5_PKG_VAL_PM1B 0U
#define S5_PKG_RESERVED 0x0U
</S5_INFO>
<DRHD_INFO>
#define DRHD_COUNT 2U
#define DRHD0_DEV_CNT 0x1U
#define DRHD0_SEGMENT 0x0U
#define DRHD0_FLAGS 0x0U
#define DRHD0_REG_BASE 0xFED64000UL
#define DRHD0_IGNORE true
#define DRHD0_DEVSCOPE0_TYPE 0x1U
#define DRHD0_DEVSCOPE0_ID 0x0U
#define DRHD0_DEVSCOPE0_BUS 0x0U
#define DRHD0_DEVSCOPE0_PATH 0x10U
#define DRHD1_DEV_CNT 0x2U
#define DRHD1_SEGMENT 0x0U
#define DRHD1_FLAGS 0x1U
#define DRHD1_REG_BASE 0xFED65000UL
#define DRHD1_IGNORE false
#define DRHD1_DEVSCOPE0_TYPE 0x3U
#define DRHD1_DEVSCOPE0_ID 0x8U
#define DRHD1_DEVSCOPE0_BUS 0xfaU
#define DRHD1_DEVSCOPE0_PATH 0xf8U
#define DRHD1_DEVSCOPE1_TYPE 0x4U
#define DRHD1_DEVSCOPE1_ID 0x0U
#define DRHD1_DEVSCOPE1_BUS 0x0U
#define DRHD1_DEVSCOPE1_PATH 0xffU
</DRHD_INFO>
<CPU_BRAND>
"Intel(R) Atom(TM) Processor A3960 @ 1.90GHz"
</CPU_BRAND>
<CX_INFO>
{{SPACE_FFixedHW, 0x00U, 0x00U, 0x00U, 0x00UL}, 0x01U, 0x01U, 0x00U}, /* C1 */
{{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x415UL}, 0x02U, 0x32U, 0x00U}, /* C2 */
{{SPACE_SYSTEM_IO, 0x08U, 0x00U, 0x00U, 0x419UL}, 0x03U, 0x96U, 0x00U}, /* C3 */
</CX_INFO>
<PX_INFO>
{0x960UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001800UL, 0x001800UL}, /* P0 */
{0x8FCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x001700UL, 0x001700UL}, /* P1 */
{0x898UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001600UL, 0x001600UL}, /* P2 */
{0x834UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001500UL, 0x001500UL}, /* P3 */
{0x7D0UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001400UL, 0x001400UL}, /* P4 */
{0x76CUL, 0x00UL, 0x0AUL, 0x0AUL, 0x001300UL, 0x001300UL}, /* P5 */
{0x708UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001200UL, 0x001200UL}, /* P6 */
{0x6A4UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001100UL, 0x001100UL}, /* P7 */
{0x640UL, 0x00UL, 0x0AUL, 0x0AUL, 0x001000UL, 0x001000UL}, /* P8 */
{0x5DCUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000F00UL, 0x000F00UL}, /* P9 */
{0x578UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000E00UL, 0x000E00UL}, /* P10 */
{0x514UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000D00UL, 0x000D00UL}, /* P11 */
{0x4B0UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000C00UL, 0x000C00UL}, /* P12 */
{0x44CUL, 0x00UL, 0x0AUL, 0x0AUL, 0x000B00UL, 0x000B00UL}, /* P13 */
{0x3E8UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000A00UL, 0x000A00UL}, /* P14 */
{0x384UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000900UL, 0x000900UL}, /* P15 */
{0x320UL, 0x00UL, 0x0AUL, 0x0AUL, 0x000800UL, 0x000800UL}, /* P16 */
</PX_INFO>
<MMCFG_BASE_INFO>
/* PCI mmcfg base of MCFG */
#define DEFAULT_PCI_MMCFG_BASE 0xe0000000UL
</MMCFG_BASE_INFO>
<CLOS_INFO>
rdt resources supported: L2
rdt resource clos max: 4
rdt resource mask max: '0xff'
</CLOS_INFO>
<IOMEM_INFO>
00000000-00000fff : Reserved
00000000-00000000 : intel_punit_ipc
00000000-00000000 : intel_punit_ipc
00000000-00000000 : intel_punit_ipc
00000000-00000000 : intel_punit_ipc
00001000-00097fff : System RAM
00098000-0009ffff : Reserved
000c0000-000fffff : Reserved
000f0000-000fffff : System ROM
00100000-0fffffff : System RAM
10000000-121fffff : Reserved
12200000-7afd5fff : System RAM
4c000000-4d0031d0 : Kernel code
4d0031d1-4d9dc8ff : Kernel data
4dc28000-4ddfffff : Kernel bss
7afd6000-7afdcfff : ACPI Tables
7afdd000-7afdffff : ACPI Non-volatile Storage
7afe0000-7fffffff : Reserved
7b800001-7bffffff : PCI Bus 0000:00
7c000001-7fffffff : PCI Bus 0000:00
7c000001-7ffffffe : Graphics Stolen Memory
80000000-cfffffff : PCI Bus 0000:00
80000000-801fffff : PCI Bus 0000:01
80200000-803fffff : PCI Bus 0000:01
80400000-805fffff : PCI Bus 0000:02
80600000-809fffff : PCI Bus 0000:03
80a00000-80bfffff : PCI Bus 0000:04
80c00000-80dfffff : PCI Bus 0000:04
80e00000-80e00fff : 0000:00:18.2
80e00000-80e001ff : lpss_dev
80e00000-80e0001f : serial
80e00200-80e002ff : lpss_priv
a0000000-afffffff : 0000:00:02.0
b1000000-b1ffffff : .text.unlikely
b2000000-b2ffffff : 0000:00:02.0
b3000000-b31fffff : dwc_usb3
b3000000-b31fffff : 0000:00:15.1
b300c100-b31fffff : dwc_usb3
b3200000-b33fffff : PCI Bus 0000:03
b3200000-b32fffff : 0000:03:00.0
b3300000-b33fffff : 0000:03:00.0
b3400000-b34fffff : PCI Bus 0000:02
b3400000-b347ffff : 0000:02:00.0
b3400000-b347ffff : igb_avb
b3480000-b3483fff : 0000:02:00.0
b3480000-b3483fff : igb_avb
b3500000-b35fffff : 0000:00:0e.0
b3500000-b35fffff : Skylake HD audio
b3600000-b360ffff : 0000:00:15.0
b3600000-b360ffff : xhci-hcd
b3608070-b360846f : intel_xhci_usb_sw
b3610000-b3611fff : 0000:00:12.0
b3610000-b3611fff : ahci
b3618000-b361ffff : 0000:00:00.1
b3620000-b3623fff : 0000:00:0e.0
b3620000-b3623fff : Skylake HD audio
b3624000-b3625fff : 0000:00:11.0
b362a000-b362a0ff : 0000:00:1f.1
b362b000-b362bfff : 0000:00:1e.0
b362c000-b362cfff : 0000:00:1e.0
b362c000-b362cfff : mmc2
b362d000-b362dfff : 0000:00:1c.0
b362e000-b362efff : 0000:00:1c.0
b362e000-b362efff : mmc1
b362f000-b362ffff : 0000:00:1b.0
b3630000-b3630fff : 0000:00:1b.0
b3630000-b3630fff : mmc0
b3631000-b3631fff : 0000:00:1a.0
b3632000-b3632fff : 0000:00:1a.0
b3632000-b3632fff : 0000:00:1a.0
b3633000-b3633fff : 0000:00:19.2
b3634000-b3634fff : 0000:00:19.2
b3634000-b36341ff : lpss_dev
b3634000-b36341ff : lpss_dev
b3634200-b36342ff : lpss_priv
b3634800-b3634fff : idma64.14
b3634800-b3634fff : idma64.14
b3635000-b3635fff : 0000:00:19.1
b3636000-b3636fff : 0000:00:19.1
b3636000-b36361ff : lpss_dev
b3636000-b36361ff : lpss_dev
b3636200-b36362ff : lpss_priv
b3636800-b3636fff : idma64.13
b3636800-b3636fff : idma64.13
b3637000-b3637fff : 0000:00:19.0
b3638000-b3638fff : 0000:00:19.0
b3638000-b36381ff : lpss_dev
b3638000-b36381ff : lpss_dev
b3638200-b36382ff : lpss_priv
b3638800-b3638fff : idma64.12
b3638800-b3638fff : idma64.12
b3639000-b3639fff : 0000:00:18.3
b363a000-b363afff : 0000:00:18.3
b363a000-b363a1ff : lpss_dev
b363a000-b363a01f : serial
b363a200-b363a2ff : lpss_priv
b363b000-b363bfff : 0000:00:18.2
b363d000-b363dfff : 0000:00:18.1
b363e000-b363efff : 0000:00:18.1
b363e000-b363e1ff : lpss_dev
b363e000-b363e01f : serial
b363e200-b363e2ff : lpss_priv
b363e800-b363efff : idma64.9
b363e800-b363efff : idma64.9
b363f000-b363ffff : 0000:00:18.0
b3640000-b3640fff : 0000:00:18.0
b3640000-b36401ff : lpss_dev
b3640000-b364001f : serial
b3640200-b36402ff : lpss_priv
b3640800-b3640fff : idma64.8
b3640800-b3640fff : idma64.8
b3641000-b3641fff : 0000:00:17.3
b3642000-b3642fff : 0000:00:17.3
b3642000-b36421ff : lpss_dev
b3642000-b36421ff : lpss_dev
b3642200-b36422ff : lpss_priv
b3642800-b3642fff : idma64.7
b3642800-b3642fff : idma64.7
b3643000-b3643fff : 0000:00:17.2
b3644000-b3644fff : 0000:00:17.2
b3644000-b36441ff : lpss_dev
b3644000-b36441ff : lpss_dev
b3644200-b36442ff : lpss_priv
b3644800-b3644fff : idma64.6
b3644800-b3644fff : idma64.6
b3645000-b3645fff : 0000:00:17.1
b3646000-b3646fff : 0000:00:17.1
b3646000-b36461ff : lpss_dev
b3646000-b36461ff : lpss_dev
b3646200-b36462ff : lpss_priv
b3646800-b3646fff : idma64.5
b3646800-b3646fff : idma64.5
b3647000-b3647fff : 0000:00:17.0
b3648000-b3648fff : 0000:00:17.0
b3648000-b36481ff : lpss_dev
b3648000-b36481ff : lpss_dev
b3648200-b36482ff : lpss_priv
b3648800-b3648fff : idma64.4
b3648800-b3648fff : idma64.4
b3649000-b3649fff : 0000:00:16.3
b364a000-b364afff : 0000:00:16.3
b364a000-b364a1ff : lpss_dev
b364a000-b364a1ff : lpss_dev
b364a200-b364a2ff : lpss_priv
b364a800-b364afff : idma64.3
b364a800-b364afff : idma64.3
b364b000-b364bfff : 0000:00:16.2
b364c000-b364cfff : 0000:00:16.2
b364c000-b364c1ff : lpss_dev
b364c000-b364c1ff : lpss_dev
b364c200-b364c2ff : lpss_priv
b364c800-b364cfff : idma64.2
b364c800-b364cfff : idma64.2
b364d000-b364dfff : 0000:00:16.1
b364e000-b364efff : 0000:00:16.1
b364e000-b364e1ff : lpss_dev
b364e000-b364e1ff : lpss_dev
b364e200-b364e2ff : lpss_priv
b364e800-b364efff : idma64.1
b364e800-b364efff : idma64.1
b364f000-b364ffff : 0000:00:16.0
b3650000-b3650fff : 0000:00:16.0
b3650000-b36501ff : lpss_dev
b3650000-b36501ff : lpss_dev
b3650200-b36502ff : lpss_priv
b3650800-b3650fff : idma64.0
b3650800-b3650fff : idma64.0
b3652000-b36527ff : 0000:00:12.0
b3652000-b36527ff : ahci
b3653000-b36530ff : 0000:00:12.0
b3653000-b36530ff : ahci
b3654000-b3654fff : 0000:00:11.0
b3655000-b3655fff : 0000:00:0f.2
b3656000-b3656fff : 0000:00:0f.1
b3657000-b3657fff : 0000:00:0f.0
b3657000-b3657fff : mei_me
e0000000-efffffff : PCI MMCONFIG 0000 [bus 00-ff]
e0000000-efffffff : Reserved
e0000000-efffffff : PCI Bus 0000:00
e0000000-efffffff : pnp 00:01
f8c00000-f8c00653 : INT3452:03
f8c00000-f8c00653 : INT3452:03
f8c40000-f8c40763 : INT3452:01
f8c40000-f8c40763 : INT3452:01
f8c50000-f8c5076b : INT3452:00
f8c50000-f8c5076b : INT3452:00
f8c70000-f8c70673 : INT3452:02
f8c70000-f8c70673 : INT3452:02
fe042000-fe043fff : INT34D2:00
fe042000-fe043fff : INT34D2:00
fe044000-fe045fff : INT34D2:00
fe045a00-fe045aef : intel_telemetry
fe045a00-fe045aef : intel_telemetry
fe045b00-fe045bef : intel_telemetry
fe045b00-fe045bef : intel_telemetry
fea00000-feafffff : pnp 00:01
fec00000-fec003ff : IOAPIC 0
fed00000-fedfffff : Reserved
fed00000-fed003ff : HPET 0
fed00000-fed003ff : PNP0103:00
fed01000-fed01fff : intel-spi
fed01000-fed01fff : pnp 00:01
fed03000-fed03fff : pnp 00:01
fed06000-fed06fff : pnp 00:01
fed08000-fed09fff : pnp 00:01
fed17080-fed17083 : INT34D2:00
fed17080-fed17083 : INT34D2:00
fed17080-fed17083 : INT34D2:00
fed17084-fed17087 : INT34D2:00
fed17084-fed17087 : INT34D2:00
fed17084-fed17087 : INT34D2:00
fed1c000-fed1cfff : pnp 00:01
fed40000-fed44fff : MSFT0101:00
fed80000-fedbffff : pnp 00:01
fee00000-feefffff : pnp 00:01
fee00000-fee00fff : Local APIC
ff800000-ffffffff : Unusable memory
100000000-27fffffff : System RAM
</IOMEM_INFO>
<BLOCK_DEVICE_INFO>
/dev/mmcblk1p1: TYPE="ext4"
/dev/mmcblk1p3: TYPE="ext4"
/dev/mmcblk0p1: TYPE="ext4"
/dev/sda3: TYPE="ext4"
</BLOCK_DEVICE_INFO>
<TTYS_INFO>
seri:/dev/ttyS0 type:mmio base:0xB3640000 irq:4 bdf:"00:18.0"
seri:/dev/ttyS2 type:mmio base:0x80E00000 irq:6 bdf:"00:18.2"
seri:/dev/ttyS3 type:mmio base:0xB363A000 irq:7 bdf:"00:18.3"
</TTYS_INFO>
<AVAILABLE_IRQ_INFO>
10, 11, 12, 13, 15
</AVAILABLE_IRQ_INFO>
<TOTAL_MEM_INFO>
8034944 kB
</TOTAL_MEM_INFO>
<CPU_PROCESSOR_INFO>
0, 1, 2, 3
</CPU_PROCESSOR_INFO>
<MAX_MSIX_TABLE_NUM>
5
</MAX_MSIX_TABLE_NUM>
</acrn-config>

216
misc/config_tools/data/apl-mrb/hybrid.xml Normal file
View File

@@ -0,0 +1,216 @@
<acrn-config board="apl-mrb" scenario="hybrid">
<hv>
<DEBUG_OPTIONS desc="Debug options for ACRN hypervisor, only valid on debug version">
<RELEASE desc="Release build. 'y' for Release, 'n' for Debug.">n</RELEASE>
<SERIAL_CONSOLE desc="The serial device which is used for hypervisor debug, only valid on Debug version.">/dev/ttyS2</SERIAL_CONSOLE>
<MEM_LOGLEVEL desc="Default loglevel in memory">5</MEM_LOGLEVEL>
<NPK_LOGLEVEL desc="Default loglevel for the hypervisor NPK log">5</NPK_LOGLEVEL>
<CONSOLE_LOGLEVEL desc="Default loglevel on the serial console">3</CONSOLE_LOGLEVEL>
<LOG_DESTINATION desc="Bitmap of consoles where logs are printed.">7</LOG_DESTINATION>
<LOG_BUF_SIZE desc="Capacity of logbuf for each physical cpu.">0x40000</LOG_BUF_SIZE>
</DEBUG_OPTIONS>
<FEATURES>
<RELOC desc="Enable hypervisor relocation">y</RELOC>
<SCHEDULER desc="The CPU scheduler to be used by the hypervisor.">SCHED_BVT</SCHEDULER>
<MULTIBOOT2 desc="Support boot ACRN from multiboot2 protocol.">y</MULTIBOOT2>
<RDT desc="Intel RDT (Resource Director Technology).">
<RDT_ENABLED desc="Enable RDT">n</RDT_ENABLED>
<CDP_ENABLED desc="CDP (Code and Data Prioritization). CDP is an extension of CAT.">n</CDP_ENABLED>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
</RDT>
<HYPERV_ENABLED desc="Enable Hyper-V enlightenment">y</HYPERV_ENABLED>
<IOMMU_ENFORCE_SNP desc="IOMMU enforce snoop behavior of DMA operation.">n</IOMMU_ENFORCE_SNP>
<ACPI_PARSE_ENABLED desc="Enable ACPI runtime parsing.">y</ACPI_PARSE_ENABLED>
<L1D_VMENTRY_ENABLED desc="Enable L1 cache flush before VM entry.">n</L1D_VMENTRY_ENABLED>
<MCE_ON_PSC_DISABLED desc="Force to disable software workaround for Machine Check Error on Page Size Change.">n</MCE_ON_PSC_DISABLED>
<IVSHMEM desc="IVSHMEM configuration">
<IVSHMEM_ENABLED desc="Enable Share Memory between VMs by IVSHMEM.">n</IVSHMEM_ENABLED>
<IVSHMEM_REGION desc="the shared memory region name (starting with hv:/, size (in MB), and IDs of all VMs (separated by a colon) sharing this region, for example hv:/sharename,2,0:2"></IVSHMEM_REGION>
</IVSHMEM>
</FEATURES>
<MEMORY>
<STACK_SIZE desc="Capacity of one stack, in bytes.">0x2000</STACK_SIZE>
<HV_RAM_SIZE desc="Size of the RAM region used by the hypervisor"></HV_RAM_SIZE>
<HV_RAM_START desc="2M-aligned Start physical address of the RAM region used by the hypervisor."></HV_RAM_START>
<LOW_RAM_SIZE desc="Size of the low RAM region">0x00010000</LOW_RAM_SIZE>
<UOS_RAM_SIZE desc="Size of the User OS (UOS) RAM.">0x200000000</UOS_RAM_SIZE>
<SOS_RAM_SIZE desc="Size of the Service OS (SOS) RAM.">0x400000000</SOS_RAM_SIZE>
<PLATFORM_RAM_SIZE desc="Size of the physical platform RAM">0x400000000</PLATFORM_RAM_SIZE>
</MEMORY>
<CAPACITIES desc="Capacity limits for static assigned data struct or maximum supported resouce">
<IOMMU_BUS_NUM desc="Highest PCI bus ID used during IOMMU initialization.">0x100</IOMMU_BUS_NUM>
<MAX_IR_ENTRIES desc="Maximum number of Interrupt Remapping Entries.">256</MAX_IR_ENTRIES>
<MAX_IOAPIC_NUM desc="Maximum number of IO-APICs.">1</MAX_IOAPIC_NUM>
<MAX_PCI_DEV_NUM desc="Maximum number of PCI devices.">96</MAX_PCI_DEV_NUM>
<MAX_IOAPIC_LINES desc="Maximum number of interrupt lines per IOAPIC.">120</MAX_IOAPIC_LINES>
<MAX_PT_IRQ_ENTRIES desc="Maximum number of interrupt source for PT devices.">64</MAX_PT_IRQ_ENTRIES>
<MAX_MSIX_TABLE_NUM desc="Maximum number of MSI-X tables per device. Please leave it blank if not sure.">16</MAX_MSIX_TABLE_NUM>
<MAX_EMULATED_MMIO desc="Maximum number of emulated MMIO regions.">16</MAX_EMULATED_MMIO>
</CAPACITIES>
<MISC_CFG>
<GPU_SBDF desc="Segment, Bus, Device, and function of the GPU.">0x00000010</GPU_SBDF>
</MISC_CFG>
</hv>
<vm id="0">
<vm_type desc="Specify the VM type" readonly="true">SAFETY_VM</vm_type>
<name desc="Specify the VM name which will be shown in hypervisor console command: vm_list.">ACRN PRE-LAUNCHED VM0</name>
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<cpu_affinity desc="List of pCPU that this VM's vCPUs are pinned to.">
<pcpu_id>3</pcpu_id>
</cpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos>
</clos>
<epc_section configurable="0" desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
</epc_section>
<memory>
<start_hpa desc="The start physical address in host for the VM">0x100000000</start_hpa>
<size desc="The memory size in Bytes for the VM">0x20000000</size>
<start_hpa2 configurable="0" desc="Start of second HPA for non-contiguous allocations in host for the VM">0x0</start_hpa2>
<size_hpa2 configurable="0" desc="Memory size of second HPA for non-contiguous allocations in Bytes for the VM">0x0</size_hpa2>
</memory>
<os_config>
<name desc="Specify the OS name of VM, currently it is not referenced by hypervisor code.">Zephyr</name>
<kern_type desc="Specify the kernel image type so that hypervisor could load it correctly. Currently support KERNEL_BZIMAGE and KERNEL_ZEPHYR.">KERNEL_ZEPHYR</kern_type>
<kern_mod desc="The tag for kernel image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline.">Zephyr_RawImage</kern_mod>
<ramdisk_mod desc="The tag for ramdisk image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline."></ramdisk_mod>
<bootargs desc="Specify kernel boot arguments">reboot=acpi</bootargs>
<kern_load_addr desc="The loading address in host memory for the VM kernel">0x8000</kern_load_addr>
<kern_entry_addr desc="The entry address in host memory for the VM kernel">0x8000</kern_entry_addr>
</os_config>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM2_BASE</base>
<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
<pci_devs desc="pci devices list">
<pci_dev desc="pci device"></pci_dev>
</pci_devs>
<mmio_resources desc="mmio devices list to passthrough">
<TPM2 desc="TPM2 device">n</TPM2>
</mmio_resources>
</vm>
<vm id="1">
<vm_type desc="Specify the VM type" readonly="true">SOS_VM</vm_type>
<name desc="Specify the VM name which will be shown in hypervisor console command: vm_list.">ACRN SOS VM</name>
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<cpu_affinity desc="List of pCPU that this VM's vCPUs are pinned to.">
<pcpu_id>0</pcpu_id>
<pcpu_id>1</pcpu_id>
<pcpu_id>2</pcpu_id>
</cpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos>
<vcpu_clos>0</vcpu_clos>
<vcpu_clos>0</vcpu_clos>
</clos>
<memory>
<start_hpa configurable="0" desc="The start physical address in host for the VM">0</start_hpa>
<size configurable="0" desc="The memory size in Bytes for the VM">CONFIG_SOS_RAM_SIZE</size>
</memory>
<os_config>
<name desc="Specify the OS name of VM, currently it is not referenced by hypervisor code.">ACRN Service OS</name>
<kern_type desc="Specify the kernel image type so that hypervisor could load it correctly. Currently support KERNEL_BZIMAGE and KERNEL_ZEPHYR.">KERNEL_BZIMAGE</kern_type>
<kern_mod desc="The tag for kernel image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline.">Linux_bzImage</kern_mod>
<ramdisk_mod desc="The tag for ramdisk image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline."></ramdisk_mod>
<bootargs configurable="0" desc="Specify kernel boot arguments">SOS_VM_BOOTARGS</bootargs>
</os_config>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">SOS_COM1_BASE</base>
<irq configurable="0" desc="vCOM1 irq">SOS_COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">SOS_COM2_BASE</base>
<irq configurable="0" desc="vCOM2 irq">SOS_COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
<pci_devs configurable="0" desc="pci devices list">
<pci_dev desc="pci device"></pci_dev>
</pci_devs>
<board_private>
<rootfs desc="rootfs for Linux kernel">/dev/mmcblk1p1</rootfs>
<bootargs desc="Specify kernel boot arguments">
rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3
i915.nuclear_pageflip=1 i915.avail_planes_per_pipe=0x01070F i915.domain_plane_owners=0x011100001111 i915.enable_gvt=1
hvlog=2M@0xe00000 memmap=0x600000$0xa00000 ramoops.mem_address=0xa00000 ramoops.mem_size=0x400000 ramoops.console_size=0x200000
reboot_panic=p,w module_blacklist=dwc3_pci i915.enable_initial_modeset=1 i915.enable_guc=0x02 video=DP-1:d video=DP-2:d cma=64M@0- panic_print=0x1f
</bootargs>
</board_private>
</vm>
<vm id="2">
<vm_type desc="Specify the VM type" readonly="true">POST_STD_VM</vm_type>
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
<pcpu_id>2</pcpu_id>
</cpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos>
</clos>
<epc_section configurable="0" desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
</epc_section>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">0</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
</vm>
</acrn-config>

189
misc/config_tools/data/apl-mrb/industry.xml Normal file
View File

@@ -0,0 +1,189 @@
<acrn-config board="apl-mrb" scenario="industry">
<hv>
<DEBUG_OPTIONS desc="Debug options for ACRN hypervisor, only valid on debug version">
<RELEASE desc="Release build. 'y' for Release, 'n' for Debug.">n</RELEASE>
<SERIAL_CONSOLE desc="The serial device which is used for hypervisor debug, only valid on Debug version.">/dev/ttyS2</SERIAL_CONSOLE>
<MEM_LOGLEVEL desc="Default loglevel in memory">5</MEM_LOGLEVEL>
<NPK_LOGLEVEL desc="Default loglevel for the hypervisor NPK log">5</NPK_LOGLEVEL>
<CONSOLE_LOGLEVEL desc="Default loglevel on the serial console">3</CONSOLE_LOGLEVEL>
<LOG_DESTINATION desc="Bitmap of consoles where logs are printed.">7</LOG_DESTINATION>
<LOG_BUF_SIZE desc="Capacity of logbuf for each physical cpu.">0x40000</LOG_BUF_SIZE>
</DEBUG_OPTIONS>
<FEATURES>
<RELOC desc="Enable hypervisor relocation">y</RELOC>
<SCHEDULER desc="The CPU scheduler to be used by the hypervisor.">SCHED_BVT</SCHEDULER>
<MULTIBOOT2 desc="Support boot ACRN from multiboot2 protocol.">y</MULTIBOOT2>
<RDT desc="Intel RDT (Resource Director Technology).">
<RDT_ENABLED desc="Enable RDT">y</RDT_ENABLED>
<CDP_ENABLED desc="CDP (Code and Data Prioritization). CDP is an extension of CAT.">n</CDP_ENABLED>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
</RDT>
<HYPERV_ENABLED desc="Enable Hyper-V enlightenment">y</HYPERV_ENABLED>
<IOMMU_ENFORCE_SNP desc="IOMMU enforce snoop behavior of DMA operation.">n</IOMMU_ENFORCE_SNP>
<ACPI_PARSE_ENABLED desc="Enable ACPI runtime parsing.">y</ACPI_PARSE_ENABLED>
<L1D_VMENTRY_ENABLED desc="Enable L1 cache flush before VM entry.">n</L1D_VMENTRY_ENABLED>
<MCE_ON_PSC_DISABLED desc="Force to disable software workaround for Machine Check Error on Page Size Change.">n</MCE_ON_PSC_DISABLED>
<IVSHMEM desc="IVSHMEM configuration">
<IVSHMEM_ENABLED desc="Enable Share Memory between VMs by IVSHMEM.">n</IVSHMEM_ENABLED>
<IVSHMEM_REGION desc="the shared memory region name (starting with hv:/, size (in MB), and IDs of all VMs (separated by a colon) sharing this region, for example hv:/sharename,2,0:2"></IVSHMEM_REGION>
</IVSHMEM>
</FEATURES>
<MEMORY>
<STACK_SIZE desc="Capacity of one stack, in bytes.">0x2000</STACK_SIZE>
<HV_RAM_SIZE desc="Size of the RAM region used by the hypervisor"></HV_RAM_SIZE>
<HV_RAM_START desc="2M-aligned Start physical address of the RAM region used by the hypervisor."></HV_RAM_START>
<LOW_RAM_SIZE desc="Size of the low RAM region">0x00010000</LOW_RAM_SIZE>
<UOS_RAM_SIZE desc="Size of the User OS (UOS) RAM.">0x200000000</UOS_RAM_SIZE>
<SOS_RAM_SIZE desc="Size of the Service OS (SOS) RAM.">0x400000000</SOS_RAM_SIZE>
<PLATFORM_RAM_SIZE desc="Size of the physical platform RAM">0x400000000</PLATFORM_RAM_SIZE>
</MEMORY>
<CAPACITIES desc="Capacity limits for static assigned data struct or maximum supported resouce">
<IOMMU_BUS_NUM desc="Highest PCI bus ID used during IOMMU initialization.">0x100</IOMMU_BUS_NUM>
<MAX_IR_ENTRIES desc="Maximum number of Interrupt Remapping Entries.">256</MAX_IR_ENTRIES>
<MAX_IOAPIC_NUM desc="Maximum number of IO-APICs.">1</MAX_IOAPIC_NUM>
<MAX_PCI_DEV_NUM desc="Maximum number of PCI devices.">96</MAX_PCI_DEV_NUM>
<MAX_IOAPIC_LINES desc="Maximum number of interrupt lines per IOAPIC.">120</MAX_IOAPIC_LINES>
<MAX_PT_IRQ_ENTRIES desc="Maximum number of interrupt source for PT devices.">64</MAX_PT_IRQ_ENTRIES>
<MAX_MSIX_TABLE_NUM desc="Maximum number of MSI-X tables per device. Please leave it blank if not sure.">16</MAX_MSIX_TABLE_NUM>
<MAX_EMULATED_MMIO desc="Maximum number of emulated MMIO regions.">16</MAX_EMULATED_MMIO>
</CAPACITIES>
<MISC_CFG>
<GPU_SBDF desc="Segment, Bus, Device, and function of the GPU.">0x00000010</GPU_SBDF>
</MISC_CFG>
</hv>
<vm id="0">
<vm_type desc="Specify the VM type" readonly="true">SOS_VM</vm_type>
<name desc="Specify the VM name which will be shown in hypervisor console command: vm_list.">ACRN SOS VM</name>
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<clos configurable="0" desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos>
</clos>
<memory>
<start_hpa configurable="0" desc="The start physical address in host for the VM">0</start_hpa>
<size configurable="0" desc="The memory size in Bytes for the VM">0x20000000</size>
</memory>
<os_config>
<name desc="Specify the OS name of VM, currently it is not referenced by hypervisor code.">ACRN Service OS</name>
<kern_type desc="Specify the VM name which will be shown in hypervisor console command: vm_list.">KERNEL_BZIMAGE</kern_type>
<kern_mod desc="The tag for kernel image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline.">Linux_bzImage</kern_mod>
<ramdisk_mod desc="The tag for ramdisk image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline."></ramdisk_mod>
<bootargs configurable="0" desc="Specify kernel boot arguments">SOS_VM_BOOTARGS</bootargs>
</os_config>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">SOS_COM1_BASE</base>
<irq configurable="0" desc="vCOM1 irq">SOS_COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">SOS_COM2_BASE</base>
<irq configurable="0" desc="vCOM2 irq">SOS_COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">2</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
<pci_devs configurable="0" desc="pci devices list">s
<pci_dev desc="pci device"></pci_dev>
</pci_devs>
<board_private>
<rootfs desc="rootfs for Linux kernel">/dev/mmcblk1p1</rootfs>
<bootargs desc="Specify kernel boot arguments">
rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3
i915.nuclear_pageflip=1 i915.avail_planes_per_pipe=0x01010F i915.domain_plane_owners=0x011111110000 i915.enable_gvt=1
hvlog=2M@0xe00000 memmap=0x600000$0xa00000 ramoops.mem_address=0xa00000 ramoops.mem_size=0x400000 ramoops.console_size=0x200000
reboot_panic=p,w module_blacklist=dwc3_pci i915.enable_initial_modeset=1 i915.enable_guc=0x02 video=DP-1:d video=DP-2:d cma=64M@0- panic_print=0x1f
</bootargs>
</board_private>
</vm>
<vm id="1">
<vm_type desc="Specify the VM type" readonly="true">POST_STD_VM</vm_type>
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
<pcpu_id>1</pcpu_id>
</cpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos>
</clos>
<epc_section configurable="0" desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
</epc_section>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
</vm>
<vm id="2">
<vm_type desc="Specify the VM type" readonly="true">POST_RT_VM</vm_type>
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
<pcpu_id>2</pcpu_id>
<pcpu_id>3</pcpu_id>
</cpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos>
<vcpu_clos>0</vcpu_clos>
</clos>
<epc_section configurable="0" desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
</epc_section>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM2_BASE</base>
<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
</vm>
</acrn-config>

186
misc/config_tools/data/apl-mrb/logical_partition.xml Normal file
View File

@@ -0,0 +1,186 @@
<acrn-config board="apl-mrb" scenario="logical_partition">
<hv>
<DEBUG_OPTIONS desc="Debug options for ACRN hypervisor, only valid on debug version">
<RELEASE desc="Release build. 'y' for Release, 'n' for Debug.">n</RELEASE>
<SERIAL_CONSOLE configurable="0" desc="The serial device which is used for hypervisor debug, only valid on Debug version.">/dev/ttyS2</SERIAL_CONSOLE>
<MEM_LOGLEVEL desc="Default loglevel in memory">5</MEM_LOGLEVEL>
<NPK_LOGLEVEL desc="Default loglevel for the hypervisor NPK log">5</NPK_LOGLEVEL>
<CONSOLE_LOGLEVEL desc="Default loglevel on the serial console">3</CONSOLE_LOGLEVEL>
<LOG_DESTINATION desc="Bitmap of consoles where logs are printed.">7</LOG_DESTINATION>
<LOG_BUF_SIZE desc="Capacity of logbuf for each physical cpu.">0x40000</LOG_BUF_SIZE>
</DEBUG_OPTIONS>
<FEATURES>
<RELOC desc="Enable hypervisor relocation">y</RELOC>
<SCHEDULER desc="The CPU scheduler to be used by the hypervisor.">SCHED_BVT</SCHEDULER>
<MULTIBOOT2 desc="Support boot ACRN from multiboot2 protocol.">y</MULTIBOOT2>
<RDT desc="Intel RDT (Resource Director Technology).">
<RDT_ENABLED desc="Enable RDT">n</RDT_ENABLED>
<CDP_ENABLED desc="CDP (Code and Data Prioritization). CDP is an extension of CAT.">n</CDP_ENABLED>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
</RDT>
<HYPERV_ENABLED desc="Enable Hyper-V enlightenment">y</HYPERV_ENABLED>
<IOMMU_ENFORCE_SNP desc="IOMMU enforce snoop behavior of DMA operation.">n</IOMMU_ENFORCE_SNP>
<ACPI_PARSE_ENABLED desc="Enable ACPI runtime parsing.">y</ACPI_PARSE_ENABLED>
<L1D_VMENTRY_ENABLED desc="Enable L1 cache flush before VM entry.">n</L1D_VMENTRY_ENABLED>
<MCE_ON_PSC_DISABLED desc="Force to disable software workaround for Machine Check Error on Page Size Change.">n</MCE_ON_PSC_DISABLED>
<IVSHMEM desc="IVSHMEM configuration">
<IVSHMEM_ENABLED desc="Enable Share Memory between VMs by IVSHMEM.">n</IVSHMEM_ENABLED>
<IVSHMEM_REGION desc="the shared memory region name (starting with hv:/, size (in MB), and IDs of all VMs (separated by a colon) sharing this region, for example hv:/sharename,2,0:2"></IVSHMEM_REGION>
</IVSHMEM>
</FEATURES>
<MEMORY>
<STACK_SIZE desc="Capacity of one stack, in bytes.">0x2000</STACK_SIZE>
<HV_RAM_SIZE desc="Size of the RAM region used by the hypervisor"></HV_RAM_SIZE>
<HV_RAM_START desc="2M-aligned Start physical address of the RAM region used by the hypervisor."></HV_RAM_START>
<LOW_RAM_SIZE desc="Size of the low RAM region">0x00010000</LOW_RAM_SIZE>
<UOS_RAM_SIZE desc="Size of the User OS (UOS) RAM.">0x200000000</UOS_RAM_SIZE>
<SOS_RAM_SIZE desc="Size of the Service OS (SOS) RAM.">0x400000000</SOS_RAM_SIZE>
<PLATFORM_RAM_SIZE desc="Size of the physical platform RAM">0x400000000</PLATFORM_RAM_SIZE>
</MEMORY>
<CAPACITIES desc="Capacity limits for static assigned data struct or maximum supported resouce">
<IOMMU_BUS_NUM desc="Highest PCI bus ID used during IOMMU initialization.">0x100</IOMMU_BUS_NUM>
<MAX_IR_ENTRIES desc="Maximum number of Interrupt Remapping Entries.">256</MAX_IR_ENTRIES>
<MAX_IOAPIC_NUM desc="Maximum number of IO-APICs.">1</MAX_IOAPIC_NUM>
<MAX_PCI_DEV_NUM desc="Maximum number of PCI devices.">96</MAX_PCI_DEV_NUM>
<MAX_IOAPIC_LINES desc="Maximum number of interrupt lines per IOAPIC.">120</MAX_IOAPIC_LINES>
<MAX_PT_IRQ_ENTRIES desc="Maximum number of interrupt source for PT devices.">64</MAX_PT_IRQ_ENTRIES>
<MAX_MSIX_TABLE_NUM desc="Maximum number of MSI-X tables per device. Please leave it blank if not sure.">16</MAX_MSIX_TABLE_NUM>
<MAX_EMULATED_MMIO desc="Maximum number of emulated MMIO regions.">16</MAX_EMULATED_MMIO>
</CAPACITIES>
<MISC_CFG>
<GPU_SBDF desc="Segment, Bus, Device, and function of the GPU.">0x00000010</GPU_SBDF>
</MISC_CFG>
</hv>
<vm id="0">
<vm_type desc="Specify the VM type" readonly="true">PRE_STD_VM</vm_type>
<name desc="Specify the VM name which will be shown in hypervisor console command: vm_list.">ACRN PRE-LAUNCHED VM0</name>
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag></guest_flag>
</guest_flags>
<cpu_affinity desc="List of pCPU that this VM's vCPUs are pinned to.">
<pcpu_id>0</pcpu_id>
<pcpu_id>2</pcpu_id>
</cpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">>
<vcpu_clos>0</vcpu_clos>
<vcpu_clos>0</vcpu_clos>
</clos>
<epc_section configurable="0" desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
</epc_section>
<memory>
<start_hpa desc="The start physical address in host for the VM">0x100000000</start_hpa>
<size desc="The memory size in Bytes for the VM">0x20000000</size>
<start_hpa2 desc="Start of second HPA for non-contiguous allocations in host for the VM">0x0</start_hpa2>
<size_hpa2 desc="Memory size of second HPA for non-contiguous allocations in Bytes for the VM">0x0</size_hpa2>
</memory>
<os_config>
<name desc="Specify the OS name of VM, currently it is not referenced by hypervisor code.">YOCTO</name>
<kern_type desc="Specify the kernel image type so that hypervisor could load it correctly. Currently support KERNEL_BZIMAGE and KERNEL_ZEPHYR.">KERNEL_BZIMAGE</kern_type>
<kern_mod desc="The tag for kernel image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline.">Linux_bzImage</kern_mod>
<ramdisk_mod desc="The tag for ramdisk image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline."></ramdisk_mod>
<bootargs desc="Specify kernel boot arguments">
rw root=/dev/mmcblk1p1 rootwait console=ttyS0 noxsave nohpet no_timer_check ignore_loglevel log_buf_len=16M
consoleblank=0 tsc=reliable reboot=acpi
</bootargs>
</os_config>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM2_BASE</base>
<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
<pci_devs desc="pci devices list">
<pci_dev desc="pci device">00:12.0 SATA controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SATA AHCI Controller (rev 0b)</pci_dev>
<pci_dev desc="pci device">02:00.0 Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)</pci_dev>
</pci_devs>
<mmio_resources desc="mmio devices list to passthrough">
<TPM2 desc="TPM2 device">n</TPM2>
</mmio_resources>
</vm>
<vm id="1">
<vm_type desc="Specify the VM type" readonly="true">PRE_STD_VM</vm_type>
<name desc="vm_name">ACRN PRE-LAUNCHED VM1</name>
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag></guest_flag>
</guest_flags>
<cpu_affinity desc="List of pCPU that this VM's vCPUs are pinned to.">
<pcpu_id>1</pcpu_id>
<pcpu_id>3</pcpu_id>
</cpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos>
<vcpu_clos>0</vcpu_clos>
</clos>
<epc_section configurable="0" desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
</epc_section>
<memory>
<start_hpa desc="The start physical address in host for the VM">0x120000000</start_hpa>
<size desc="The memory size in Bytes for the VM">0x20000000</size>
<start_hpa2 desc="Start of second HPA for non-contiguous allocations in host for the VM">0x0</start_hpa2>
<size_hpa2 desc="Memory size of second HPA for non-contiguous allocations in Bytes for the VM">0x0</size_hpa2>
</memory>
<os_config>
<name desc="Specify the OS name of VM, currently it is not referenced by hypervisor code.">YOCTO</name>
<kern_type desc="kernel name">KERNEL_BZIMAGE</kern_type>
<kern_mod desc="The tag for kernel image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline.">Linux_bzImage</kern_mod>
<ramdisk_mod desc="The tag for ramdisk image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline."></ramdisk_mod>
<bootargs desc="Specify kernel boot arguments">
rw rootwait root=/dev/sda3 console=ttyS0 noxsave nohpet no_timer_check ignore_loglevel log_buf_len=16M
consoleblank=0 tsc=reliable reboot=acpi
</bootargs>
</os_config>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM1_BASE</base>
<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">COM2_BASE</base>
<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
<pci_devs desc="pci devices list">
<pci_dev desc="pci device">00:15.0 USB controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series USB xHCI (rev 0b)</pci_dev>
<pci_dev desc="pci device">03:00.0 Ethernet controller: Marvell Technology Group Ltd. 88W8897 [AVASTAR] 802.11ac Wireless</pci_dev>
</pci_devs>
<mmio_resources desc="mmio devices list to passthrough">
<TPM2 desc="TPM2 device">n</TPM2>
</mmio_resources>
</vm>
</acrn-config>

186
misc/config_tools/data/apl-mrb/sdc.xml Normal file
View File

@@ -0,0 +1,186 @@
<acrn-config board="apl-mrb" scenario="sdc">
<hv>
<DEBUG_OPTIONS desc="Debug options for ACRN hypervisor, only valid on debug version">
<RELEASE desc="Release build. 'y' for Release, 'n' for Debug.">n</RELEASE>
<SERIAL_CONSOLE desc="The serial device which is used for hypervisor debug, only valid on Debug version.">/dev/ttyS2</SERIAL_CONSOLE>
<MEM_LOGLEVEL desc="Default loglevel in memory">5</MEM_LOGLEVEL>
<NPK_LOGLEVEL desc="Default loglevel for the hypervisor NPK log">5</NPK_LOGLEVEL>
<CONSOLE_LOGLEVEL desc="Default loglevel on the serial console">3</CONSOLE_LOGLEVEL>
<LOG_DESTINATION desc="Bitmap of consoles where logs are printed.">7</LOG_DESTINATION>
<LOG_BUF_SIZE desc="Capacity of logbuf for each physical cpu.">0x40000</LOG_BUF_SIZE>
</DEBUG_OPTIONS>
<FEATURES>
<RELOC desc="Enable hypervisor relocation">y</RELOC>
<SCHEDULER desc="The CPU scheduler to be used by the hypervisor.">SCHED_BVT</SCHEDULER>
<MULTIBOOT2 desc="Support boot ACRN from multiboot2 protocol.">y</MULTIBOOT2>
<RDT desc="Intel RDT (Resource Director Technology).">
<RDT_ENABLED desc="Enable RDT">n</RDT_ENABLED>
<CDP_ENABLED desc="CDP (Code and Data Prioritization). CDP is an extension of CAT.">n</CDP_ENABLED>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
<CLOS_MASK desc="Cache Capacity Bitmask">0xff</CLOS_MASK>
</RDT>
<HYPERV_ENABLED desc="Enable Hyper-V enlightenment">y</HYPERV_ENABLED>
<IOMMU_ENFORCE_SNP desc="IOMMU enforce snoop behavior of DMA operation.">n</IOMMU_ENFORCE_SNP>
<ACPI_PARSE_ENABLED desc="Enable ACPI runtime parsing.">y</ACPI_PARSE_ENABLED>
<L1D_VMENTRY_ENABLED desc="Enable L1 cache flush before VM entry.">n</L1D_VMENTRY_ENABLED>
<MCE_ON_PSC_DISABLED desc="Force to disable software workaround for Machine Check Error on Page Size Change.">n</MCE_ON_PSC_DISABLED>
<IVSHMEM desc="IVSHMEM configuration">
<IVSHMEM_ENABLED desc="Enable Share Memory between VMs by IVSHMEM.">n</IVSHMEM_ENABLED>
<IVSHMEM_REGION desc="the shared memory region name (starting with hv:/, size (in MB), and IDs of all VMs (separated by a colon) sharing this region, for example hv:/sharename,2,0:2"></IVSHMEM_REGION>
</IVSHMEM>
</FEATURES>
<MEMORY>
<STACK_SIZE desc="Capacity of one stack, in bytes.">0x2000</STACK_SIZE>
<HV_RAM_SIZE desc="Size of the RAM region used by the hypervisor"></HV_RAM_SIZE>
<HV_RAM_START desc="2M-aligned Start physical address of the RAM region used by the hypervisor."></HV_RAM_START>
<LOW_RAM_SIZE desc="Size of the low RAM region">0x00010000</LOW_RAM_SIZE>
<UOS_RAM_SIZE desc="Size of the User OS (UOS) RAM.">0x200000000</UOS_RAM_SIZE>
<SOS_RAM_SIZE desc="Size of the Service OS (SOS) RAM.">0x400000000</SOS_RAM_SIZE>
<PLATFORM_RAM_SIZE desc="Size of the physical platform RAM">0x400000000</PLATFORM_RAM_SIZE>
</MEMORY>
<CAPACITIES desc="Capacity limits for static assigned data struct or maximum supported resouce">
<IOMMU_BUS_NUM desc="Highest PCI bus ID used during IOMMU initialization.">0x100</IOMMU_BUS_NUM>
<MAX_IR_ENTRIES desc="Maximum number of Interrupt Remapping Entries.">256</MAX_IR_ENTRIES>
<MAX_IOAPIC_NUM desc="Maximum number of IO-APICs.">1</MAX_IOAPIC_NUM>
<MAX_PCI_DEV_NUM desc="Maximum number of PCI devices.">96</MAX_PCI_DEV_NUM>
<MAX_IOAPIC_LINES desc="Maximum number of interrupt lines per IOAPIC.">120</MAX_IOAPIC_LINES>
<MAX_PT_IRQ_ENTRIES desc="Maximum number of interrupt source for PT devices.">64</MAX_PT_IRQ_ENTRIES>
<MAX_MSIX_TABLE_NUM desc="Maximum number of MSI-X tables per device. Please leave it blank if not sure.">16</MAX_MSIX_TABLE_NUM>
<MAX_EMULATED_MMIO desc="Maximum number of emulated MMIO regions.">16</MAX_EMULATED_MMIO>
</CAPACITIES>
<MISC_CFG>
<GPU_SBDF desc="Segment, Bus, Device, and function of the GPU.">0x00000010</GPU_SBDF>
</MISC_CFG>
</hv>
<vm id="0">
<vm_type desc="Specify the VM type" readonly="true">SOS_VM</vm_type>
<name desc="Specify the VM name which will be shown in hypervisor console command: vm_list.">ACRN SOS VM</name>
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<clos configurable="0" desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos>
</clos>
<memory>
<start_hpa configurable="0" desc="The start physical address in host for the VM">0</start_hpa>
<size configurable="0" desc="The memory size in Bytes for the VM">CONFIG_SOS_RAM_SIZE</size>
</memory>
<os_config>
<name desc="Specify the OS name of VM, currently it is not referenced by hypervisor code.">ACRN Service OS</name>
<kern_type desc="Specify the kernel image type so that hypervisor could load it correctly. Currently support KERNEL_BZIMAGE and KERNEL_ZEPHYR.">KERNEL_BZIMAGE</kern_type>
<kern_mod desc="The tag for kernel image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline.">Linux_bzImage</kern_mod>
<ramdisk_mod desc="The tag for ramdisk image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline."></ramdisk_mod>
<bootargs configurable="0" desc="Specify kernel boot arguments">SOS_VM_BOOTARGS</bootargs>
</os_config>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">SOS_COM1_BASE</base>
<irq configurable="0" desc="vCOM1 irq">SOS_COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
<irq configurable="0" desc="vCOM2 irq">SOS_COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
<pci_devs configurable="0" desc="pci devices list">
<pci_dev desc="pci device"></pci_dev>
</pci_devs>
<board_private>
<rootfs desc="rootfs for Linux kernel">/dev/mmcblk1p1</rootfs>
<bootargs desc="Specify kernel boot arguments">
rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3
i915.nuclear_pageflip=1 i915.avail_planes_per_pipe=0x01010F i915.domain_plane_owners=0x011111110000 i915.enable_gvt=1
hvlog=2M@0xe00000 memmap=0x600000$0xa00000 ramoops.mem_address=0xa00000 ramoops.mem_size=0x400000 ramoops.console_size=0x200000
reboot_panic=p,w module_blacklist=dwc3_pci i915.enable_initial_modeset=1 i915.enable_guc=0x02 video=DP-1:d video=DP-2:d cma=64M@0- panic_print=0x1f
</bootargs>
</board_private>
</vm>
<vm id="1">
<vm_type desc="Specify the VM type" readonly="true">POST_STD_VM</vm_type>
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
<pcpu_id>1</pcpu_id>
<pcpu_id>2</pcpu_id>
</cpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos>
<vcpu_clos>0</vcpu_clos>
</clos>
<epc_section configurable="0" desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
</epc_section>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
</vm>
<vm id="2" configurable="1" desc="specific for Kata">
<vm_type readonly="true" desc="Specify the VM type">KATA_VM</vm_type>
<cpu_affinity desc="List of pCPU: the guest VM is allowed to create vCPU from all or a subset of this list.">
<pcpu_id>3</pcpu_id>
</cpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
<vcpu_clos>0</vcpu_clos>
</clos>
<epc_section configurable="0" desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
</epc_section>
<legacy_vuart id="0">
<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
<base configurable="0" desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
</legacy_vuart>
<legacy_vuart id="1">
<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
<base configurable="0" desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">0</target_uart_id>
</legacy_vuart>
<console_vuart id="0">
<base desc="Console vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
</console_vuart>
<communication_vuart id="1">
<base desc="Communicatin vuart (PCI based) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_PCI_BASE</base>
<target_vm_id desc="This vuart is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
<target_uart_id desc="target vUART ID that this vuart connects to">1</target_uart_id>
</communication_vuart>
</vm>
</acrn-config>

44
misc/config_tools/data/apl-mrb/sdc_launch_1uos_aaag.xml Normal file
View File

@@ -0,0 +1,44 @@
<acrn-config board="apl-mrb" scenario="sdc" uos_launcher="1">
<uos id="1">
<uos_type desc="UOS type">ANDROID</uos_type>
<rtos_type desc="UOS Realtime capability">no</rtos_type>
<mem_size desc="UOS memory size in MByte">2048</mem_size>
<gvt_args desc="GVT arguments. Recommendation is 64 448 8. Leave it blank to disable GVT.">64 448 8</gvt_args>
<vbootloader desc="virtual bootloader method" readonly="true">ovmf</vbootloader>
<vuart0 desc="vUART0 which emulated by device model">Disable</vuart0>
<poweroff_channel desc="the method of power off uos">IOC</poweroff_channel>
<usb_xhci desc="USB xHCI mediator configuration. input format: bus#-port#[:bus#-port#: ...]. e.g.: 1-2:2-4"></usb_xhci>
<cpu_affinity desc="List of pCPU that this VM's vCPUs are pinned to.">
<pcpu_id></pcpu_id>
</cpu_affinity>
<shm_regions desc="List of shared memory regions for inter-VM communication.">
<shm_region desc="configure the shm regions for current VM, for example hv:/sharename,2"></shm_region>
</shm_regions>
<console_vuart desc="A PCI based console vuart which is emulated by device model">Disable</console_vuart>
<communication_vuarts desc="List of PCI based communication vuarts which are emulated by device model">
<communication_vuart></communication_vuart>
</communication_vuarts>
<passthrough_devices>
<usb_xdci desc="vm usb_xdci device">00:15.1 USB controller: Intel Corporation Device 5aaa (rev 0b)</usb_xdci>
<ipu desc="vm ipu device"></ipu>
<ipu_i2c desc="vm ipu_i2c device"></ipu_i2c>
<cse desc="vm cse device"></cse>
<audio desc="vm audio device">00:0e.0 Audio device: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Audio Cluster (rev 0b)</audio>
<audio_codec desc="vm audio codec device">00:17.0 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #5 (rev 0b)</audio_codec>
<wifi desc="vm wifi device">03:00.0 Ethernet controller: Marvell Technology Group Ltd. 88W8897 [AVASTAR] 802.11ac Wireless</wifi>
<bluetooth desc="vm bluetooth">00:18.0 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series HSUART Controller #1 (rev 0b)</bluetooth>
<sd_card desc="vm sd card device">00:1b.0 SD Host controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SDXC/MMC Host Controller (rev 0b)</sd_card>
<ethernet desc="vm ethernet device"></ethernet>
<sata desc="vm sata device"></sata>
<nvme desc="vm nvme device"></nvme>
</passthrough_devices>
<virtio_devices>
<network desc="virtio network devices setting. Input format: tap_name,[vhost],[mac=XX:XX:XX:XX:XX:XX].">AaaG</network>
<input desc="virtio input device"></input>
<block desc="virtio block device setting. format: [blk partition:][img path] e.g.: /dev/sda3:./a/b.img">/dev/mmcblk1p3:android/android.img</block>
<console desc="virtio console device,input format: [@]stdio|tty|pty|sock:portname[=portpath][,[@]stdio|tty|pty:portname[=portpath]]">@stdio:stdio_port</console>
</virtio_devices>
</uos>
</acrn-config>

44
misc/config_tools/data/apl-mrb/sdc_launch_1uos_aliaag.xml Normal file
View File

@@ -0,0 +1,44 @@
<acrn-config board="apl-mrb" scenario="sdc" uos_launcher="1">
<uos id="1">
<uos_type desc="UOS type">ALIOS</uos_type>
<rtos_type desc="UOS Realtime capability">no</rtos_type>
<mem_size desc="UOS memory size in MByte">2048</mem_size>
<gvt_args desc="GVT arguments. Recommendation is 64 448 8. Leave it blank to disable GVT.">64 448 8</gvt_args>
<vbootloader desc="virtual bootloader method" readonly="true">ovmf</vbootloader>
<vuart0 desc="vUART0 which emulated by device model">Disable</vuart0>
<poweroff_channel desc="the method of power off uos">IOC</poweroff_channel>
<usb_xhci desc="USB xHCI mediator configuration. input format: bus#-port#[:bus#-port#: ...]. e.g.: 1-2:2-4"></usb_xhci>
<cpu_affinity desc="List of pCPU that this VM's vCPUs are pinned to.">
<pcpu_id></pcpu_id>
</cpu_affinity>
<shm_regions desc="List of shared memory regions for inter-VM communication.">
<shm_region desc="configure the shm regions for current VM, for example hv:/sharename,2"></shm_region>
</shm_regions>
<console_vuart desc="A PCI based console vuart which is emulated by device model">Disable</console_vuart>
<communication_vuarts desc="List of PCI based communication vuarts which are emulated by device model">
<communication_vuart></communication_vuart>
</communication_vuarts>
<passthrough_devices>
<usb_xdci desc="vm usb_xdci device">00:15.1 USB controller: Intel Corporation Device 5aaa (rev 0b)</usb_xdci>
<ipu desc="vm ipu device"></ipu>
<ipu_i2c desc="vm ipu_i2c device"></ipu_i2c>
<cse desc="vm cse device"></cse>
<audio desc="vm audio device">00:0e.0 Audio device: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Audio Cluster (rev 0b)</audio>
<audio_codec desc="vm audio codec device">00:17.0 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #5 (rev 0b)</audio_codec>
<wifi desc="vm wifi device">03:00.0 Ethernet controller: Marvell Technology Group Ltd. 88W8897 [AVASTAR] 802.11ac Wireless</wifi>
<bluetooth desc="vm bluetooth">00:18.0 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series HSUART Controller #1 (rev 0b)</bluetooth>
<sd_card desc="vm sd card device">00:1b.0 SD Host controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SDXC/MMC Host Controller (rev 0b)</sd_card>
<ethernet desc="vm ethernet device"></ethernet>
<sata desc="vm sata device"></sata>
<nvme desc="vm nvme device"></nvme>
</passthrough_devices>
<virtio_devices>
<network desc="virtio network devices setting. Input format: tap_name,[vhost],[mac=XX:XX:XX:XX:XX:XX].">AliaaG</network>
<input desc="virtio input device"></input>
<block desc="virtio block device setting. format: [blk partition:][img path] e.g.: /dev/sda3:./a/b.img">/dev/mmcblk1p3:alios/alios.img</block>
<console desc="virtio console device,input format: [@]stdio|tty|pty|sock:portname[=portpath][,[@]stdio|tty|pty:portname[=portpath]]">@stdio:stdio_port</console>
</virtio_devices>
</uos>
</acrn-config>

44
misc/config_tools/data/apl-mrb/sdc_launch_1uos_laag.xml Normal file
View File

@@ -0,0 +1,44 @@
<acrn-config board="apl-mrb" scenario="sdc" uos_launcher="1">
<uos id="1">
<uos_type desc="UOS type">YOCTO</uos_type>
<rtos_type desc="UOS Realtime capability">no</rtos_type>
<mem_size desc="UOS memory size in MByte">2048</mem_size>
<gvt_args desc="GVT arguments. Recommendation is 64 448 8. Leave it blank to disable GVT.">64 448 8</gvt_args>
<vbootloader desc="virtual bootloader method" readonly="true">ovmf</vbootloader>
<vuart0 desc="vUART0 which emulated by device model">Enable</vuart0>
<poweroff_channel desc="the method of power off uos">IOC</poweroff_channel>
<usb_xhci desc="USB xHCI mediator configuration. input format: bus#-port#[:bus#-port#: ...]. e.g.: 1-2:2-4"></usb_xhci>
<cpu_affinity desc="List of pCPU that this VM's vCPUs are pinned to.">
<pcpu_id></pcpu_id>
</cpu_affinity>
<shm_regions desc="List of shared memory regions for inter-VM communication.">
<shm_region desc="configure the shm regions for current VM, for example hv:/sharename,2"></shm_region>
</shm_regions>
<console_vuart desc="A PCI based console vuart which is emulated by device model">Disable</console_vuart>
<communication_vuarts desc="List of PCI based communication vuarts which are emulated by device model">
<communication_vuart></communication_vuart>
</communication_vuarts>
<passthrough_devices>
<usb_xdci desc="vm usb_xdci device">00:15.1 USB controller: Intel Corporation Device 5aaa (rev 0b)</usb_xdci>
<audio desc="vm audio device"></audio>
<audio_codec desc="vm audio codec device"></audio_codec>
<ipu desc="vm ipu device">00:03.0 Multimedia controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Imaging Unit (rev 0b)</ipu>
<ipu_i2c desc="vm ipu_i2c device">00:16.0 Signal processing controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series I2C Controller #1 (rev 0b)</ipu_i2c>
<cse desc="vm cse device">00:0f.0 Communication controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series Trusted Execution Engine (rev 0b)</cse>
<wifi desc="vm wifi device"></wifi>
<bluetooth desc="vm bluetooth"></bluetooth>
<sd_card desc="vm sd card device">00:1b.0 SD Host controller: Intel Corporation Celeron N3350/Pentium N4200/Atom E3900 Series SDXC/MMC Host Controller (rev 0b)</sd_card>
<ethernet desc="vm ethernet device"></ethernet>
<sata desc="vm sata device"></sata>
<nvme desc="vm nvme device"></nvme>
</passthrough_devices>
<virtio_devices>
<network desc="virtio network devices setting. Input format: tap_name,[vhost],[mac=XX:XX:XX:XX:XX:XX].">LaaG</network>
<input desc="virtio input device"></input>
<block desc="virtio block device setting. format: [blk partition:][img path] e.g.: /dev/sda3:./a/b.img">/dev/mmcblk1p3:yocto/yocto.img</block>
<console desc="virtio console device,input format: [@]stdio|tty|pty|sock:portname[=portpath][,[@]stdio|tty|pty:portname[=portpath]]">@pty:pty_port</console>
</virtio_devices>
</uos>
</acrn-config>