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acrn-config: rename MAX_PLATFORM_CLOS_NUM to HV_SUPPORTED_MAX_CLOS
HV_SUPPORTED_MAX_CLOS: This value represents the maximum CLOS that is allowed by ACRN hypervisor. This value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0]) among all supported RDT resources in the platform. In other words, it is min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent CLOS allocations between all the RDT resources. Tracked-On: #5229 Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
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@@ -139,7 +139,7 @@ def gen_rdt_res(config):
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cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CLOS_MASK")
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mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "MBA_DELAY")
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# TODO: Since use the MAX_PLATFORM_CLOS_NUM for L2/L3/MBA, so use the minimal number of them
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# TODO: Since use the HV_SUPPORTED_MAX_CLOS for L2/L3/MBA, so use the minimal number of them
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common_clos_max = min(len(cat_mask_list), len(mba_delay_list))
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if common_clos_max > MSR_IA32_L2_MASK_END - MSR_IA32_L2_MASK_BASE or\
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@@ -149,29 +149,29 @@ def gen_rdt_res(config):
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print("\n#ifdef CONFIG_RDT_ENABLED", file=config)
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if len(rdt_resources) == 0 or common_clos_max == 0:
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print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("l2"), file=config)
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print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("l3"), file=config)
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print("struct platform_clos_info platform_{0}_clos_array[MAX_PLATFORM_CLOS_NUM];".format("mba"), file=config)
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print("struct platform_clos_info platform_{0}_clos_array[HV_SUPPORTED_MAX_CLOS];".format("l2"), file=config)
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print("struct platform_clos_info platform_{0}_clos_array[HV_SUPPORTED_MAX_CLOS];".format("l3"), file=config)
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print("struct platform_clos_info platform_{0}_clos_array[HV_SUPPORTED_MAX_CLOS];".format("mba"), file=config)
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else:
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for idx, rdt_res in enumerate(rdt_resources):
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if rdt_res == "L2":
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rdt_res_str = "l2"
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print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
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"MAX_PLATFORM_CLOS_NUM"), file=config)
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"HV_SUPPORTED_MAX_CLOS"), file=config)
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populate_clos_mask_msr(rdt_res, cat_mask_list, config)
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print("};\n", file=config)
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res_present[RDT.L2.value] = 1
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elif rdt_res == "L3":
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rdt_res_str = "l3"
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print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
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"MAX_PLATFORM_CLOS_NUM"), file=config)
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"HV_SUPPORTED_MAX_CLOS"), file=config)
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populate_clos_mask_msr(rdt_res, cat_mask_list, config)
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print("};\n", file=config)
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res_present[RDT.L3.value] = 1
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elif rdt_res == "MBA":
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rdt_res_str = "mba"
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print("struct platform_clos_info platform_{0}_clos_array[{1}] = {{".format(rdt_res_str,
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"MAX_PLATFORM_CLOS_NUM"), file=config)
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"HV_SUPPORTED_MAX_CLOS"), file=config)
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err_dic = populate_mba_delay_mask(rdt_res, mba_delay_list, config)
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print("};\n", file=config)
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res_present[RDT.MBA.value] = 1
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@@ -180,11 +180,11 @@ def gen_rdt_res(config):
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return err_dic
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if res_present[RDT.L2.value] == 0:
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print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l2", "MAX_PLATFORM_CLOS_NUM"), file=config)
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print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l2", "HV_SUPPORTED_MAX_CLOS"), file=config)
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if res_present[RDT.L3.value] == 0:
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print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l3", "MAX_PLATFORM_CLOS_NUM"), file=config)
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print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("l3", "HV_SUPPORTED_MAX_CLOS"), file=config)
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if res_present[RDT.MBA.value] == 0:
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print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("mba", "MAX_PLATFORM_CLOS_NUM"), file=config)
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print("struct platform_clos_info platform_{0}_clos_array[{1}];".format("mba", "HV_SUPPORTED_MAX_CLOS"), file=config)
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print("#endif", file=config)
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@@ -81,7 +81,7 @@ def generate_file(config):
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# define CONFIG_MAX_PCPCU_NUM
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print("#define MAX_PCPU_NUM\t\t\t{}U".format(max_cpu_num), file=config)
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print("#define MAX_PLATFORM_CLOS_NUM\t\t{}U".format(common_clos_max), file=config)
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print("#define HV_SUPPORTED_MAX_CLOS\t\t{}U".format(common_clos_max), file=config)
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# define MAX_VMSIX_ON_MSI_PDEVS_NUM
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gen_known_caps_pci_head(config)
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@@ -182,7 +182,7 @@ def cat_max_mask_check(cat_mask_list, feature, cat_str, max_mask_str):
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cat_max_mask_settings_len = len(cat_mask_list)
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if clos_max_set_entry != cat_max_mask_settings_len:
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key = 'hv,{},{},{}'.format(feature, cat_str, max_mask_str)
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ERR_LIST[key] = "Number of Cache mask entries should be equal to MAX_PLATFORM_CLOS_NUM={}".format(clos_max_set_entry)
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ERR_LIST[key] = "Number of Cache mask entries should be equal to HV_SUPPORTED_MAX_CLOS={}".format(clos_max_set_entry)
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return
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clos_max_mask_str = clos_max_mask_list[0].strip('"').strip("'")
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@@ -212,7 +212,7 @@ def mba_delay_check(mba_delay_list, feature, mba_str, max_mask_str):
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mba_delay_settings_len = len(mba_delay_list)
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if clos_max != mba_delay_settings_len:
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key = 'hv,{},{},{}'.format(feature, mba_str, max_mask_str)
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ERR_LIST[key] = "Number of MBA delay entries should be equal to MAX_PLATFORM_CLOS_NUM={}".format(clos_max)
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ERR_LIST[key] = "Number of MBA delay entries should be equal to HV_SUPPORTED_MAX_CLOS={}".format(clos_max)
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return
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mba_idx = res_info.index("MBA")
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