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hv: cleanup legacy terminologies in RTCM module

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This patch updates below terminologies according
 to the latest TCC Spec:
  PTCT -> RTCT
  PTCM -> RTCM
  pSRAM -> Software SRAM

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
This commit is contained in:
Yonghua Huang
2021-01-26 21:15:13 +08:00
committed by wenlingz
parent 806f479108
commit a6420e8cfa
13 changed files with 201 additions and 187 deletions
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26
hypervisor/include/arch/x86/rtcm.h
View File

@@ -4,29 +4,29 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PTCM_H
#define PTCM_H
#ifndef RTCM_H
#define RTCM_H
#include <rtct.h>
#define MSABI __attribute__((ms_abi))
typedef int32_t MSABI (*ptcm_abi_func)(uint32_t command, void *command_struct);
typedef int32_t MSABI(*rtcm_abi_func)(uint32_t command, void *command_struct);
#define PTCM_CMD_INIT_PSRAM (int32_t)1U
#define PTCM_CMD_CPUID (int32_t)2U
#define PTCM_CMD_RDMSR (int32_t)3U
#define PTCM_CMD_WRMSR (int32_t)4U
#define RTCM_CMD_INIT_SOFTWARE_SRAM (int32_t)1U
#define RTCM_CMD_CPUID (int32_t)2U
#define RTCM_CMD_RDMSR (int32_t)3U
#define RTCM_CMD_WRMSR (int32_t)4U
#define PTCM_MAGIC 0x5054434dU
#define RTCM_MAGIC 0x5054434dU
struct ptcm_header {
struct rtcm_header {
uint32_t magic;
uint32_t version;
uint64_t command_offset;
} __packed;
extern volatile bool is_psram_initialized;
void init_psram(bool is_bsp);
void set_ptct_tbl(void *ptct_tbl_addr);
#endif /* PTCM_H */
extern volatile bool is_sw_sram_initialized;
void init_software_sram(bool is_bsp);
void set_rtct_tbl(void *rtct_tbl_addr);
#endif /* RTCM_H */

40
hypervisor/include/arch/x86/rtct.h
View File

@@ -4,40 +4,40 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef PTCT_H
#define PTCT_H
#ifndef RTCT_H
#define RTCT_H
#include <acpi.h>
#define PTCT_ENTRY_TYPE_PTCD_LIMIT 1U
#define PTCT_ENTRY_TYPE_PTCM_BINARY 2U
#define PTCT_ENTRY_TYPE_WRC_L3_MASKS 3U
#define PTCT_ENTRY_TYPE_GT_L3_MASKS 4U
#define PTCT_ENTRY_TYPE_PSRAM 5U
#define PTCT_ENTRY_TYPE_STREAM_DATAPATH 6U
#define PTCT_ENTRY_TYPE_TIMEAWARE_SUBSYS 7U
#define PTCT_ENTRY_TYPE_RT_IOMMU 8U
#define PTCT_ENTRY_TYPE_MEM_HIERARCHY_LATENCY 9U
#define RTCT_ENTRY_TYPE_RTCD_LIMIT 1U
#define RTCT_ENTRY_TYPE_RTCM_BINARY 2U
#define RTCT_ENTRY_TYPE_WRC_L3_MASKS 3U
#define RTCT_ENTRY_TYPE_GT_L3_MASKS 4U
#define RTCT_ENTRY_TYPE_SOFTWARE_SRAM 5U
#define RTCT_ENTRY_TYPE_STREAM_DATAPATH 6U
#define RTCT_ENTRY_TYPE_TIMEAWARE_SUBSYS 7U
#define RTCT_ENTRY_TYPE_RT_IOMMU 8U
#define RTCT_ENTRY_TYPE_MEM_HIERARCHY_LATENCY 9U
#define PSRAM_BASE_HPA 0x40080000U
#define PSRAM_BASE_GPA 0x40080000U
#define PSRAM_MAX_SIZE 0x00800000U
#define SOFTWARE_SRAM_BASE_HPA 0x40080000U
#define SOFTWARE_SRAM_BASE_GPA 0x40080000U
#define SOFTWARE_SRAM_MAX_SIZE 0x00800000U
struct ptct_entry{
struct rtct_entry {
uint16_t size;
uint16_t format;
uint32_t type;
uint32_t data[64];
} __packed;
struct ptct_entry_data_ptcm_binary
struct rtct_entry_data_rtcm_binary
{
uint64_t address;
uint32_t size;
} __packed;
struct ptct_entry_data_psram
struct rtct_entry_data_software_sram
{
uint32_t cache_level;
uint64_t base;
@@ -47,7 +47,7 @@ struct ptct_entry_data_psram
} __packed;
extern uint64_t psram_area_bottom;
extern uint64_t psram_area_top;
extern uint64_t software_sram_area_bottom;
extern uint64_t software_sram_area_top;
#endif /* PTCT_H */
#endif /* RTCT_H */