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DM USB: xHCI: re-implement the emulation of extented capabilities
There are many quirks in Intel xHCI implementation and it is very hard to debug under Microsoft Windows OS, hence use ACRN xHCI extented capabilities as the default setting. Tracked-On: #3163 Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com> Acked-by: Yu Wang <yu1.wang@intel.com>
This commit is contained in:
Xiaoguang Wu
ACRN System Integration
parent
5f9cd25324
commit
ae066689bb
@ -106,7 +106,7 @@
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*/
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#define XHCI_PADDR_SZ 4096 /* paddr_guest2host max size */
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#define XHCI_ERST_MAX 0 /* max 2^entries event ring seg tbl */
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#define XHCI_CAPLEN (4*8) /* offset of op register space */
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#define XHCI_CAPLEN (8*8) /* offset of op register space */
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#define XHCI_HCCPRAMS2 0x1C /* offset of HCCPARAMS2 register */
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#define XHCI_PORTREGS_START 0x400
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#define XHCI_DOORBELL_MAX 256
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@ -377,6 +377,7 @@ struct pci_xhci_vdev {
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uint32_t hccparams1; /* capability parameters 1 */
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uint32_t dboff; /* doorbell offset */
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uint32_t rtsoff; /* runtime register space offset */
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uint32_t rtsend;
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uint32_t hccparams2; /* capability parameters 2 */
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uint32_t excapoff; /* ext-capability registers offset */
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@ -3332,7 +3333,7 @@ pci_xhci_write(struct vmctx *ctx,
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pci_xhci_hostop_write(xdev, offset, value);
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else if (offset < xdev->rtsoff)
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pci_xhci_dbregs_write(xdev, offset, value);
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else if (offset < xdev->excapoff)
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else if (offset < xdev->rtsend)
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pci_xhci_rtsregs_write(xdev, offset, value);
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else if (offset < xdev->regsend)
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pci_xhci_excap_write(xdev, offset, value);
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@ -3376,8 +3377,36 @@ pci_xhci_hostcap_read(struct pci_xhci_vdev *xdev, uint64_t offset)
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value = xdev->rtsoff;
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break;
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case XHCI_HCCPRAMS2: /* 0x1C */
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value = xdev->hccparams2;
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case ACRN_XHCI_EXCAP1:
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value = 0x02000402; /* USB 2.0 */
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break;
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case ACRN_XHCI_EXCAP1 + 4:
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value = 0x20425355; /* "USB " */
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break;
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case ACRN_XHCI_EXCAP1 + 8:
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value = (((XHCI_MAX_DEVS/2) << 8) | (XHCI_MAX_DEVS/2+1));
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break;
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case ACRN_XHCI_EXCAP1 + 12:
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value = 0;
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break;
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case ACRN_XHCI_EXCAP2:
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value = 0x03000002; /* USB 3.0 */
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break;
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case ACRN_XHCI_EXCAP2 + 4:
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value = 0x20425355; /* "USB " */
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break;
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case ACRN_XHCI_EXCAP2 + 8:
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value = (((XHCI_MAX_DEVS/2) << 8) | 1);
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break;
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case ACRN_XHCI_EXCAP2 + 12:
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value = 0;
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break;
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default:
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@ -3477,11 +3506,11 @@ pci_xhci_rtsregs_read(struct pci_xhci_vdev *xdev, uint64_t offset)
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if (value >= 1)
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xdev->rtsregs.mfindex += value;
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} else if (offset >= 0x20) {
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} else if (offset >= XHCI_RT_IR_BASE) {
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int item;
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uint32_t *p;
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offset -= 0x20;
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offset -= XHCI_RT_IR_BASE;
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item = offset % 32;
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assert(offset < sizeof(xdev->rtsregs.intrreg));
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@ -3551,7 +3580,7 @@ pci_xhci_read(struct vmctx *ctx,
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value = pci_xhci_hostop_read(xdev, offset);
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else if (offset < xdev->rtsoff)
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value = pci_xhci_dbregs_read(xdev, offset);
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else if (offset < xdev->excapoff)
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else if (offset < xdev->rtsend)
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value = pci_xhci_rtsregs_read(xdev, offset);
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else if (offset < xdev->regsend)
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value = pci_xhci_excap_read(xdev, offset);
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@ -3897,19 +3926,18 @@ pci_xhci_parse_extcap(struct pci_xhci_vdev *xdev, char *opts)
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if (!strncmp(cap, "apl", 3)) {
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xdev->excap_write = pci_xhci_apl_drdregs_write;
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xdev->excap_ptr = excap_group_apl;
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xdev->vid = XHCI_PCI_VENDOR_ID_INTEL;
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xdev->pid = XHCI_PCI_DEVICE_ID_INTEL_APL;
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xdev->vid = PCI_INTEL_APL_XHCI_VID;
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xdev->pid = PCI_INTEL_APL_XHCI_PID;
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} else
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rc = -2;
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if (((struct pci_xhci_excap *)(xdev->excap_ptr))->start
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== EXCAP_GROUP_END) {
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xdev->excap_write = NULL;
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xdev->excap_ptr = excap_group_dft;
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xdev->vid = XHCI_PCI_VENDOR_ID_DFLT;
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xdev->pid = XHCI_PCI_DEVICE_ID_DFLT;
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UPRINTF(LWRN, "Invalid xhci excap, force set "
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"default excap\r\n");
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xdev->excap_ptr = NULL;
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xdev->vid = PCI_ACRN_XHCI_VID;
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xdev->pid = PCI_ACRN_XHCI_PID;
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UPRINTF(LWRN, "Invalid excap, set to ACRN excap\r\n");
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}
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errout:
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@ -4034,10 +4062,10 @@ pci_xhci_init(struct vmctx *ctx, struct pci_vdev *dev, char *opts)
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xdev->usb2_port_start = (XHCI_MAX_DEVS/2) + 1;
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xdev->usb3_port_start = 1;
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xdev->excap_ptr = excap_group_dft;
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xdev->vid = XHCI_PCI_VENDOR_ID_DFLT;
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xdev->pid = XHCI_PCI_DEVICE_ID_DFLT;
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xdev->vid = PCI_ACRN_XHCI_VID;
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xdev->pid = PCI_ACRN_XHCI_PID;
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xdev->excapoff = ACRN_XHCI_EXCAP1;
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xdev->excap_ptr = NULL;
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xdev->rtsregs.mfindex = 0;
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clock_gettime(CLOCK_MONOTONIC, &xdev->mf_prev_time);
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@ -4083,6 +4111,7 @@ pci_xhci_init(struct vmctx *ctx, struct pci_vdev *dev, char *opts)
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(XHCI_MAX_SLOTS+1) * 32);
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if (xdev->rtsoff & 0x1F)
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xdev->rtsoff = (xdev->rtsoff + 0x1F) & ~0x1F;
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xdev->rtsend = xdev->rtsoff + XHCI_RT_IR_BASE + sizeof(xdev->rtsregs);
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UPRINTF(LDBG, "dboff: 0x%x, rtsoff: 0x%x\r\n", xdev->dboff,
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xdev->rtsoff);
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@ -4092,28 +4121,24 @@ pci_xhci_init(struct vmctx *ctx, struct pci_vdev *dev, char *opts)
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pci_xhci_reset(xdev);
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/* xdev->excap_ptr should be assigned to global array in which
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* it need include two items at least and field start must be
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* ended by EXCAP_GROUP_END at last item.
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*/
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excap = xdev->excap_ptr;
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if (!excap) {
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error = -1;
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goto done;
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if (excap == NULL) {
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xdev->regsend = xdev->rtsend;
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xdev->excapoff = ACRN_XHCI_EXCAP1;
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} else {
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xdev->excapoff = excap->start;
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while (excap && excap->start != EXCAP_GROUP_END) {
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xdev->regsend = excap->end;
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excap++;
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}
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}
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xdev->excapoff = excap->start;
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do {
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xdev->regsend = excap->end;
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excap++;
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} while (excap && excap->start != EXCAP_GROUP_END);
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/*
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* Set extended capabilities pointer to be after regsend;
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* value of excap field is 32-bit offset.
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*/
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xdev->hccparams1 |= XHCI_SET_HCCP1_XECP(XHCI_EXCAP_PTR);
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xdev->hccparams1 |=
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XHCI_SET_HCCP1_XECP(XHCI_XECP_OFF_SHIFT(xdev->excapoff));
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pci_set_cfgdata16(dev, PCIR_DEVICE, xdev->pid);
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pci_set_cfgdata16(dev, PCIR_VENDOR, xdev->vid);
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@ -214,9 +214,13 @@
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/* RW - doorbell stream ID */
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#define XHCI_DB_SID_SET(x) (((x) & 0xFFFF) << 16)
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/* XHCI runtime register IR base */
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#define XHCI_RT_IR_BASE 0x20
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/* XHCI legacy support */
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#define XHCI_XECP_ID(x) ((x) & 0xFF)
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#define XHCI_XECP_NEXT(x) (((x) >> 8) & 0xFF)
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#define XHCI_XECP_OFF_SHIFT(x) ((x) >> 2)
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#define XHCI_XECP_BIOS_SEM 0x0002
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#define XHCI_XECP_OS_SEM 0x0003
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@ -229,6 +233,10 @@
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#define XHCI_ID_USB_LOCAL_MEM 0x0006
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#define XHCI_ID_DRD_INTEL 0x00C0
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/* ACRN xHCI excapability offset */
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#define ACRN_XHCI_EXCAP1 0x20
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#define ACRN_XHCI_EXCAP2 0x30
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/*
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* xHCI extended capability pointer in HCCPARAMS1.
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* The excap offset is calculated by left shift 2
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@ -240,15 +248,13 @@
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#define EXCAP_GROUP_END 0xFFFF
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#define EXCAP_GROUP_NULL NULL
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/* xHCI PCI Vendor IDs */
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#define XHCI_PCI_VENDOR_ID_INTEL 0x8086
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/* Intel xHCI IDs */
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#define PCI_INTEL_APL_XHCI_VID 0x8086
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#define PCI_INTEL_APL_XHCI_PID 0x5aa8
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/* xHCI PCI Device IDs */
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#define XHCI_PCI_DEVICE_ID_INTEL_APL 0x5aa8
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/* Default xHCI PCI VID/PID */
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#define XHCI_PCI_VENDOR_ID_DFLT XHCI_PCI_VENDOR_ID_INTEL
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#define XHCI_PCI_DEVICE_ID_DFLT 0x1e31
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/* ACRN xHCI iDs */
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#define PCI_ACRN_XHCI_VID 0x1234
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#define PCI_ACRN_XHCI_PID 0x1234
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/* Intel APL xHCI DRD Configuration registers */
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#define XHCI_DRD_MUX_CFG0 0x0000
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