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hv:Reshuffle console/uart code

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The current hierarchy :
  CONSOLE --> SERIAL -->UART DRIVER
This patch remove SERIAL layer, that is console will
call UART driver directly, change it to:
  CONSOLE  --> UART DRIVER
Remove some related data structures and registration and callback.
Cleanup vuart.c

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Mingqiang Chi 2018-07-27 16:23:09 +08:00 committed by lijinxia
parent b7436272e7
commit ae3004028b
12 changed files with 192 additions and 540 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
hypervisor/arch/x86/cpu.c
View File

@ -478,9 +478,6 @@ static void bsp_boot_post(void)
/* Perform any necessary BSP initialization */
init_bsp();
/* Initialize Serial */
serial_init();
/* Initialize console */
console_init();

161
hypervisor/debug/console.c
View File

@ -5,169 +5,52 @@
*/
#include <hypervisor.h>
#include "serial_internal.h"
#include "uart16550.h"
static spinlock_t lock;
static uint32_t serial_handle = SERIAL_INVALID_HANDLE;
struct hv_timer console_timer;
#define CONSOLE_KICK_TIMER_TIMEOUT 40 /* timeout is 40ms*/
uint32_t get_serial_handle(void)
{
return serial_handle;
}
static void print_char(char x)
{
(void)serial_puts(serial_handle, &x, 1);
if (x == '\n') {
(void)serial_puts(serial_handle, "\r", 1);
}
}
void console_init(void)
{
spinlock_init(&lock);
serial_handle = serial_open("STDIO");
uart16550_init();
}
int console_putc(int ch)
void console_putc(const char *ch)
{
int res = -1;
spinlock_obtain(&lock);
if (serial_handle != SERIAL_INVALID_HANDLE) {
print_char(ch);
res = 0;
}
spinlock_release(&lock);
return res;
(void)uart16550_puts(ch, 1);
}
int console_puts(const char *s_arg)
int console_write(const char *s, size_t len)
{
const char *s = s_arg;
int res = -1;
const char *p;
spinlock_obtain(&lock);
if (serial_handle != SERIAL_INVALID_HANDLE) {
res = 0;
while ((*s) != 0) {
/* start output at the beginning of the string search
* for end of string or '\n'
*/
p = s;
while ((*p != 0) && *p != '\n') {
++p;
}
/* write all characters up to p */
(void)serial_puts(serial_handle, s, p - s);
res += p - s;
if (*p == '\n') {
print_char('\n');
++p;
res += 2;
}
/* continue at position p */
s = p;
}
}
spinlock_release(&lock);
return res;
return uart16550_puts(s, len);
}
int console_write(const char *s_arg, size_t len)
char console_getc(void)
{
const char *s = s_arg;
int res = -1;
const char *e;
const char *p;
spinlock_obtain(&lock);
if (serial_handle != SERIAL_INVALID_HANDLE) {
/* calculate pointer to the end of the string */
e = s + len;
res = 0;
/* process all characters */
while (s != e) {
/* search for '\n' or the end of the string */
p = s;
while ((p != e) && (*p != '\n')) {
++p;
}
/* write all characters processed so far */
(void)serial_puts(serial_handle, s, p - s);
res += p - s;
/* write '\n' if end of string is not reached */
if (p != e) {
print_char('\n');
++p;
res += 2;
}
/* continue at next position */
s = p;
}
}
spinlock_release(&lock);
return res;
}
static void console_read(void)
{
spinlock_obtain(&lock);
if (serial_handle != SERIAL_INVALID_HANDLE) {
/* Get all the data available in the RX FIFO */
(void)serial_get_rx_data(serial_handle);
}
spinlock_release(&lock);
return uart16550_getc();
}
static void console_handler(void)
{
/* Dump the RX FIFO to a circular buffer */
console_read();
struct vuart *vu;
/* serial Console Rx operation */
vuart_console_rx_chars(serial_handle);
/* serial Console Tx operation */
vuart_console_tx_chars();
shell_kick_session();
vu = vuart_console_active();
if (vu != NULL) {
/* serial Console Rx operation */
vuart_console_rx_chars(vu);
/* serial Console Tx operation */
vuart_console_tx_chars(vu);
} else {
shell_kick_session();
}
}
static int console_timer_callback(__unused void *data)
{
/* Kick HV-Shell and Uart-Console tasks */
console_handler();
return 0;
}
@ -175,12 +58,6 @@ void console_setup_timer(void)
{
uint64_t period_in_cycle, fire_tsc;
if (serial_handle == SERIAL_INVALID_HANDLE) {
pr_err("%s: no uart, not need setup console timer",
__func__);
return;
}
period_in_cycle = CYCLES_PER_MS * CONSOLE_KICK_TIMER_TIMEOUT;
fire_tsc = rdtsc() + period_in_cycle;
initialize_timer(&console_timer,

4
hypervisor/debug/printf.c
View File

@ -23,10 +23,10 @@ static int charout(int cmd, const char *s_arg, uint32_t sz_arg, void *hnd)
*nchars += (s - p);
} else {
/* fill mode */
/* fill mode */
*nchars += sz;
while (sz != 0U) {
(void)console_putc(*s);
console_putc(s);
sz--;
}
}

41
hypervisor/debug/shell_internal.c
View File

@ -7,7 +7,6 @@
#include <hypervisor.h>
#include <reboot.h>
#include "shell_internal.h"
#include "serial_internal.h"
#define TEMP_STR_SIZE 60
#define MAX_STR_SIZE 256
@ -350,27 +349,13 @@ int shell_process_cmd(struct shell *p_shell, char *p_input_line)
return status;
}
int shell_init_serial(struct shell *p_shell)
void shell_init_serial(struct shell *p_shell)
{
int status = 0;
uint32_t serial_handle = get_serial_handle();
if (serial_handle != SERIAL_INVALID_HANDLE) {
p_shell->session_io.io_session_info =
(void *)(uint64_t)serial_handle;
status = shell_set_name(p_shell, "Serial");
} else {
status = NO_SERIAL_SHELL;
pr_err("Error: Unable to get a valid serial port handle");
}
shell_set_name(p_shell, "Serial");
/* Zero fill the input buffer */
(void)memset((void *)p_shell->input_line[p_shell->input_line_active], 0,
SHELL_CMD_MAX_LEN + 1U);
return status;
}
#define SHELL_ROWS 10
@ -1122,30 +1107,20 @@ int shell_trigger_crash(struct shell *p_shell, int argc, char **argv)
return 0;
}
int shell_terminate_serial(struct shell *p_shell)
void shell_terminate_serial(__unused struct shell *p_shell)
{
/* Shell shouldn't own the serial port handle anymore. */
p_shell->session_io.io_session_info = NULL;
return 0;
}
void shell_puts_serial(struct shell *p_shell, char *string_ptr)
void shell_puts_serial(__unused struct shell *p_shell, const char *string_ptr)
{
uint32_t serial_handle =
(uint32_t)(uint64_t)p_shell->session_io.io_session_info;
/* Output the string */
(void)serial_puts(serial_handle, string_ptr,
strnlen_s(string_ptr, SHELL_STRING_MAX_LEN));
(void)console_write(string_ptr, strnlen_s(string_ptr,
SHELL_STRING_MAX_LEN));
}
uint8_t shell_getc_serial(struct shell *p_shell)
char shell_getc_serial(__unused struct shell *p_shell)
{
uint32_t serial_handle =
(uint32_t)(uint64_t)p_shell->session_io.io_session_info;
return serial_getc(serial_handle);
return console_getc();
}
void shell_special_serial(struct shell *p_shell, uint8_t ch)

19
hypervisor/debug/shell_internal.h
View File

@ -13,11 +13,10 @@ struct shell;
/* Structure to hold the details about shell input and output */
struct shell_io {
void *io_session_info;
int (*io_init)(struct shell *);
int (*io_deinit)(struct shell *);
void (*io_puts)(struct shell *, char *);
uint8_t (*io_getc)(struct shell *);
void (*io_init)(struct shell *);
void (*io_deinit)(struct shell *);
void (*io_puts)(struct shell *, const char *);
char (*io_getc)(struct shell *);
void (*io_special)(struct shell *, uint8_t);
bool io_echo_on;
};
@ -159,15 +158,15 @@ int shell_set_loglevel(struct shell *p_shell, int argc, char **argv);
int shell_cpuid(struct shell *p_shell, int argc, char **argv);
struct shell_cmd *shell_find_cmd(struct shell *p_shell, const char *cmd);
int shell_process_cmd(struct shell *p_shell, char *p_input_line);
int shell_terminate_serial(struct shell *p_shell);
int shell_init_serial(struct shell *p_shell);
void shell_puts_serial(struct shell *p_shell, char *string_ptr);
uint8_t shell_getc_serial(struct shell *p_shell);
void shell_terminate_serial(struct shell *p_shell);
void shell_init_serial(struct shell *p_shell);
void shell_puts_serial(struct shell *p_shell, const char *string_ptr);
char shell_getc_serial(struct shell *p_shell);
void shell_special_serial(struct shell *p_shell, uint8_t ch);
void kick_shell(struct shell *p_shell);
void shell_puts(struct shell *p_shell, const char *str_ptr);
int shell_set_name(struct shell *p_shell, const char *name);
void shell_set_name(struct shell *p_shell, const char *name);
int shell_trigger_crash(struct shell *p_shell, int argc, char **argv);
#endif /* SHELL_INTER_H */

26
hypervisor/debug/shell_public.c
View File

@ -160,26 +160,18 @@ void shell_puts(struct shell *p_shell, const char *str_ptr)
{
/* Transmit data using this shell session's 'puts' function */
p_shell->session_io.io_puts(p_shell, str_ptr);
}
int shell_set_name(struct shell *p_shell, const char *name)
/**
* @pre p_shell != NULL
* @pre name != NULL
*/
void shell_set_name(struct shell *p_shell, const char *name)
{
int status;
if ((p_shell != NULL) && (name != NULL)) {
(void)strncpy_s((void *) p_shell->name, SHELL_NAME_MAX_LEN,
(void *) name, SHELL_NAME_MAX_LEN - 1);
/* Ensure null terminated string */
p_shell->name[SHELL_NAME_MAX_LEN - 1] = 0;
status = 0;
} else {
status = -EINVAL;
}
return status;
(void)strncpy_s((void *) p_shell->name, SHELL_NAME_MAX_LEN,
(void *) name, SHELL_NAME_MAX_LEN - 1);
/* Ensure null terminated string */
p_shell->name[SHELL_NAME_MAX_LEN - 1] = 0;
}
void shell_kick_session(void)

281
hypervisor/debug/uart16550.c
View File

@ -6,13 +6,6 @@
#include <hypervisor.h>
#include "uart16550.h"
#include "serial_internal.h"
/* Mapping of 16c550 write-only registers to appropriate structure members */
#define THR_IDX RBR_IDX
#define IIR_IDX FCR_IDX
#define DLL_IDX RBR_IDX
#define DLM_IDX IER_IDX
#if defined(CONFIG_SERIAL_PIO_BASE)
static int serial_port_mapped = 1;
@ -31,35 +24,10 @@ static int uart_enabled;
typedef uint32_t uart_reg_t;
enum UART_REG_IDX{
RBR_IDX, /* 0 */
IER_IDX, /* 1 */
FCR_IDX, /* 2 */
LCR_IDX, /* 3 */
MCR_IDX, /* 4 */
ISR_IDX, /* 5 */
MSR_IDX, /* 6 */
SPR_IDX, /* 7 */
MDR1_IDX, /* 8 */
REG9_IDX, /* 9 */
REGA_IDX, /* A */
REGB_IDX, /* B */
REGC_IDX, /* C */
REGD_IDX, /* D */
REGE_IDX, /* E */
UASR_IDX, /* F */
SCR_IDX, /* 10*/
SSR_IDX, /* 11*/
REG12_IDX, /* 12*/
OSC_12M_SEL_IDX, /* 13*/
};
static uint64_t uart_base_address;
/* CPU oscillator clock */
#define CPU_OSC_CLOCK 1843200 /* 1.8432 MHz */
/* UART hardware definitions */
#define UART_CLOCK_RATE CPU_OSC_CLOCK
#define UART_BUFFER_SIZE 2048
static spinlock_t uart_rx_lock;
static spinlock_t uart_tx_lock;
static inline uint32_t uart16550_read_reg(uint64_t base, uint32_t reg_idx)
{
@ -80,12 +48,8 @@ static inline void uart16550_write_reg(uint64_t base,
}
}
static void uart16550_enable(__unused struct tgt_uart *tgt_uart)
{
}
static void uart16550_calc_baud_div(__unused struct tgt_uart *tgt_uart,
uint32_t ref_freq, uint32_t *baud_div_ptr, uint32_t baud_rate_arg)
static void uart16550_calc_baud_div(uint32_t ref_freq,
uint32_t *baud_div_ptr, uint32_t baud_rate_arg)
{
uint32_t baud_rate = baud_rate_arg;
uint32_t baud_multiplier = baud_rate < BAUD_460800 ? 16 : 13;
@ -96,223 +60,108 @@ static void uart16550_calc_baud_div(__unused struct tgt_uart *tgt_uart,
*baud_div_ptr = ref_freq / (baud_multiplier * baud_rate);
}
static void uart16550_set_baud_rate(struct tgt_uart *tgt_uart,
uint32_t baud_rate)
static void uart16550_set_baud_rate(uint32_t baud_rate)
{
uint32_t baud_div, duart_clock = CPU_OSC_CLOCK;
uint32_t baud_div, duart_clock = UART_CLOCK_RATE;
uart_reg_t temp_reg;
/* Calculate baud divisor */
uart16550_calc_baud_div(
tgt_uart, duart_clock, &baud_div, baud_rate);
uart16550_calc_baud_div(duart_clock, &baud_div, baud_rate);
/* Enable DLL and DLM registers for setting the Divisor */
temp_reg = uart16550_read_reg(tgt_uart->base_address, LCR_IDX);
temp_reg = uart16550_read_reg(uart_base_address, UART16550_LCR);
temp_reg |= LCR_DLAB;
uart16550_write_reg(tgt_uart->base_address, temp_reg, LCR_IDX);
uart16550_write_reg(uart_base_address, temp_reg, UART16550_LCR);
/* Write the appropriate divisor value */
uart16550_write_reg(tgt_uart->base_address,
((baud_div >> 8) & 0xFFU), DLM_IDX);
uart16550_write_reg(tgt_uart->base_address,
(baud_div & 0xFFU), DLL_IDX);
uart16550_write_reg(uart_base_address,
((baud_div >> 8) & 0xFFU), UART16550_DLM);
uart16550_write_reg(uart_base_address,
(baud_div & 0xFFU), UART16550_DLL);
/* Disable DLL and DLM registers */
temp_reg &= ~LCR_DLAB;
uart16550_write_reg(tgt_uart->base_address, temp_reg, LCR_IDX);
uart16550_write_reg(uart_base_address, temp_reg, UART16550_LCR);
}
static int uart16550_init(struct tgt_uart *tgt_uart)
void uart16550_init(void)
{
int status = 0;
if (uart_enabled == 0) {
/*uart will not be used */
status = -ENODEV;
} else {
if (strcmp(tgt_uart->uart_id, "STDIO") == 0) {
atomic_store32(&tgt_uart->open_count, 0U);
} else {
/* set open count to 1 to prevent open */
atomic_store32(&tgt_uart->open_count, 1U);
status = -EINVAL;
}
if (uart_base_address == 0) {
uart_base_address = UART_BASE_ADDRESS;
}
spinlock_init(&uart_rx_lock);
spinlock_init(&uart_tx_lock);
/* Enable TX and RX FIFOs */
uart16550_write_reg(uart_base_address,
FCR_FIFOE | FCR_RFR | FCR_TFR, UART16550_FCR);
return status;
/* Set-up data bits / parity / stop bits. */
uart16550_write_reg(uart_base_address,
(LCR_WL8 | LCR_NB_STOP_BITS_1 | LCR_PARITY_NONE),
UART16550_LCR);
/* Disable interrupts (we use polling) */
uart16550_write_reg(uart_base_address,
UART_IER_DISABLE_ALL, UART16550_IER);
/* Set baud rate */
uart16550_set_baud_rate(BAUD_115200);
/* Data terminal ready + Request to send */
uart16550_write_reg(uart_base_address,
MCR_RTS | MCR_DTR, UART16550_MCR);
}
static int uart16550_open(struct tgt_uart *tgt_uart,
struct uart_config *config)
char uart16550_getc(void)
{
uint32_t temp32;
int status = 0;
char ret = -1;
if (strcmp(tgt_uart->uart_id, "STDIO") == 0) {
if (atomic_cmpxchg32(&tgt_uart->open_count, 0U, 1U) != 0U) {
return -EBUSY;
}
spinlock_obtain(&uart_rx_lock);
/* Call UART setup function */
/* Enable TX and RX FIFOs */
uart16550_write_reg(tgt_uart->base_address,
FCR_FIFOE | FCR_RFR | FCR_TFR, FCR_IDX);
/* Set parity value */
if (config->parity_bits == PARITY_ODD) {
/* Odd parity */
temp32 = LCR_PARITY_ODD;
} else if (config->parity_bits == PARITY_EVEN) {
/* Even parity */
temp32 = LCR_PARITY_EVEN;
} else {
/* No parity */
temp32 = LCR_PARITY_NONE;
}
/* Set Data length */
if (config->data_bits == DATA_7) {
/* Set bits for 7 data bits */
temp32 |= LCR_WL7;
} else {
/* Set bits for 8 data bits */
temp32 |= LCR_WL8;
}
/* Check for 1 stop bit */
if (config->stop_bits == STOP_1) {
/* Set bits for 1 stop bit */
temp32 |= LCR_NB_STOP_BITS_1;
} else {
/* Set bits for 2 stop bits */
temp32 |= LCR_NB_STOP_BITS_2;
}
/* Set-up data bits / parity / stop bits. */
uart16550_write_reg(tgt_uart->base_address,
temp32, LCR_IDX);
/* Disable interrupts (we use polling) */
uart16550_write_reg(tgt_uart->base_address,
UART_IER_DISABLE_ALL, IER_IDX);
/* Set baud rate */
uart16550_set_baud_rate(tgt_uart, config->baud_rate);
/* Data terminal ready + Request to send */
uart16550_write_reg(tgt_uart->base_address,
MCR_RTS | MCR_DTR, MCR_IDX);
/* Enable the UART hardware */
uart16550_enable(tgt_uart);
} else {
status = -ENODEV;
}
return status;
}
static uint32_t uart16550_get_rx_err(uint32_t rx_data)
{
uint32_t rx_status = SD_RX_NO_ERROR;
/* Check for RX overrun error */
if ((rx_data & LSR_OE) != 0U) {
rx_status |= SD_RX_OVERRUN_ERROR;
}
/* Check for RX parity error */
if ((rx_data & LSR_PE) != 0U) {
rx_status |= SD_RX_PARITY_ERROR;
}
/* Check for RX frame error */
if ((rx_data & LSR_FE) != 0U) {
rx_status |= SD_RX_FRAME_ERROR;
}
/* Return the rx status */
return rx_status;
}
static void uart16550_close(struct tgt_uart *tgt_uart)
{
if (tgt_uart != NULL) {
if (atomic_cmpxchg32(&tgt_uart->open_count, 1U, 0U) == 1U) {
/* TODO: Add logic to disable the UART */
}
}
}
static void uart16550_read(struct tgt_uart *tgt_uart, void *buffer,
uint32_t *bytes_read)
{
/* If a character has been received, read it */
if ((uart16550_read_reg(tgt_uart->base_address, ISR_IDX) & LSR_DR)
if ((uart16550_read_reg(uart_base_address, UART16550_LSR) & LSR_DR)
== LSR_DR) {
/* Read a character */
*(uint8_t *)buffer =
uart16550_read_reg(tgt_uart->base_address, RBR_IDX);
ret = uart16550_read_reg(uart_base_address, UART16550_RBR);
/* Read 1 byte */
*bytes_read = 1U;
} else {
*bytes_read = 0U;
}
spinlock_release(&uart_rx_lock);
return ret;
}
static void uart16550_write(struct tgt_uart *tgt_uart,
const void *buffer, uint32_t *bytes_written)
static void uart16550_putc(const char *buf)
{
uint32_t reg;
/* Ensure there are no further Transmit buffer write requests */
do {
} while ((uart16550_read_reg(tgt_uart->base_address,
ISR_IDX) & LSR_THRE) == 0U);
reg = uart16550_read_reg(uart_base_address, UART16550_LSR);
} while ((reg & LSR_THRE) == 0U || (reg & LSR_TEMT) == 0U);
/* Transmit the character. */
uart16550_write_reg(tgt_uart->base_address,
*(uint8_t *)buffer, THR_IDX);
if (bytes_written != NULL) {
*bytes_written = 1;
}
uart16550_write_reg(uart_base_address, *buf, UART16550_THR);
}
static bool uart16550_tx_is_busy(struct tgt_uart *tgt_uart)
int uart16550_puts(const char *buf, uint32_t len)
{
return ((uart16550_read_reg(tgt_uart->base_address, ISR_IDX) &
(LSR_TEMT)) == 0) ? true : false;
}
static bool uart16550_rx_data_is_avail(struct tgt_uart *tgt_uart,
uint32_t *lsr_reg)
{
*(uart_reg_t *)lsr_reg =
uart16550_read_reg(tgt_uart->base_address, ISR_IDX);
return ((*(uart_reg_t *)lsr_reg & LSR_DR) == LSR_DR) ? true : false;
}
struct tgt_uart Tgt_Uarts[SERIAL_MAX_DEVS] = {
{
.uart_id = "STDIO",
.base_address = UART_BASE_ADDRESS,
.clock_frequency = UART_CLOCK_RATE,
.buffer_size = UART_BUFFER_SIZE,
.init = uart16550_init,
.open = uart16550_open,
.close = uart16550_close,
.read = uart16550_read,
.write = uart16550_write,
.tx_is_busy = uart16550_tx_is_busy,
.rx_data_is_avail = uart16550_rx_data_is_avail,
.get_rx_err = uart16550_get_rx_err,
uint32_t i;
spinlock_obtain(&uart_tx_lock);
for (i = 0U; i < len; i++) {
/* Transmit character */
uart16550_putc(buf);
if (*buf == '\n') {
/* Append '\r', no need change the len */
uart16550_putc("\r");
}
buf++;
}
};
spinlock_release(&uart_tx_lock);
return (int)len;
}
void uart16550_set_property(int enabled, int port_mapped, uint64_t base_addr)
{
uart_enabled = enabled;
serial_port_mapped = port_mapped;
Tgt_Uarts[0].base_address = base_addr;
uart_base_address = base_addr;
}

41
hypervisor/debug/uart16550.h
View File

@ -8,34 +8,30 @@
#define UART16550_H
/* Register / bit definitions for 16c550 uart */
#define UART16550_RBR 0x00U
/*receive buffer register | base+00h, dlab=0b r*/
#define UART16550_THR 0x00U
#define UART16550_RBR 0x00U
/*transmit holding register | base+00h, dlab=0b w*/
#define UART16550_DLL 0x00U
#define UART16550_THR 0x00U
/*divisor least significant byte | base+00h, dlab=1b rw*/
#define UART16550_IER 0x01U
#define UART16550_DLL 0x00U
/*interrupt enable register | base+01h, dlab=0b rw*/
#define UART16550_DLM 0x01U
#define UART16550_IER 0x01U
/*divisor most significant byte | base+01h, dlab=1b rw*/
#define UART16550_IIR 0x02U
#define UART16550_DLM 0x01U
/*interrupt identification register | base+02h, dlab=0b r*/
#define UART16550_FCR 0x02U
#define UART16550_IIR 0x02U
/*fifo control register | base+02h, dlab=0b w*/
#define UART16550_LCR 0x03U
#define UART16550_FCR 0x02U
/*line control register | base+03h, dlab=xb rw*/
#define UART16550_MCR 0x04U
#define UART16550_LCR 0x03U
/*modem control register, only uart0 | base+04h, dlab=xb rw*/
#define UART16550_LSR 0x05U
#define UART16550_MCR 0x04U
/*line status register | base+05h, dlab=xb r*/
#define UART16550_MSR 0x06U
#define UART16550_LSR 0x05U
/*modem status register, only uart0 | base+06h, dlab=xb r*/
#define UART16550_SCR 0x07U
#define UART16550_MSR 0x06U
/*scratch pad register | base+07h, dlab=xb rw*/
#define UART16550_MDR1 0x08U
#define UARTML7213_BRCSR 0x0eU
/*baud rate reference clock select register dlab xb*/
#define UARTML7213_SRST 0x0fU /*Soft Reset Register dlab xb*/
#define UART16550_SCR 0x07U
/* value definitions for IIR */
#define IIR_FIFO_MASK 0xc0U /* set if FIFOs are enabled */
@ -103,4 +99,17 @@
#define UART_IER_DISABLE_ALL 0x00000000U
#define BAUD_9600 9600
#define BAUD_115200 115200
#define BAUD_460800 460800
/* CPU oscillator clock */
#define CPU_OSC_CLOCK 1843200 /* 1.8432 MHz */
/* UART hardware definitions */
#define UART_CLOCK_RATE CPU_OSC_CLOCK
void uart16550_init(void);
char uart16550_getc(void);
int uart16550_puts(const char *buf, uint32_t len);
#endif /* !UART16550_H */

118
hypervisor/debug/vuart.c
View File

@ -31,14 +31,11 @@
#include <hypervisor.h>
#include "uart16550.h"
#include "serial_internal.h"
#define COM1_BASE 0x3F8
#define COM1_IRQ 4
#define DEFAULT_RCLK 1843200
#define DEFAULT_BAUD 9600
#define RX_SIZE 256
#define TX_SIZE 65536
#define RX_FIFO_SIZE 256
#define TX_FIFO_SIZE 65536
#define vuart_lock_init(vu) spinlock_init(&((vu)->lock))
#define vuart_lock(vu) spinlock_obtain(&((vu)->lock))
@ -99,7 +96,7 @@ static int fifo_numchars(struct fifo *fifo)
*
* Return an interrupt reason if one is available.
*/
static uint8_t uart_intr_reason(struct vuart *vu)
static uint8_t vuart_intr_reason(struct vuart *vu)
{
if ((vu->lsr & LSR_OE) != 0 && (vu->ier & IER_ELSI) != 0) {
return IIR_RLS;
@ -112,30 +109,15 @@ static uint8_t uart_intr_reason(struct vuart *vu)
}
}
static void uart_init(struct vuart *vu)
{
uint16_t divisor;
divisor = DEFAULT_RCLK / DEFAULT_BAUD / 16;
vu->dll = divisor;
vu->dlh = divisor >> 16;
vu->active = false;
vu->base = COM1_BASE;
fifo_init(&vu->rxfifo, RX_SIZE);
fifo_init(&vu->txfifo, TX_SIZE);
vuart_lock_init(vu);
}
/*
* Toggle the COM port's intr pin depending on whether or not we have an
* interrupt condition to report to the processor.
*/
static void uart_toggle_intr(struct vuart *vu)
static void vuart_toggle_intr(struct vuart *vu)
{
uint8_t intr_reason;
intr_reason = uart_intr_reason(vu);
intr_reason = vuart_intr_reason(vu);
if (intr_reason != IIR_NOPEND) {
if (vu->vm->vpic != NULL) {
@ -151,7 +133,7 @@ static void uart_toggle_intr(struct vuart *vu)
}
}
static void uart_write(__unused struct vm_io_handler *hdlr,
static void vuart_write(__unused struct vm_io_handler *hdlr,
struct vm *vm, uint16_t offset_arg,
__unused size_t width, uint32_t value)
{
@ -227,11 +209,11 @@ static void uart_write(__unused struct vm_io_handler *hdlr,
}
done:
uart_toggle_intr(vu);
vuart_toggle_intr(vu);
vuart_unlock(vu);
}
static uint32_t uart_read(__unused struct vm_io_handler *hdlr,
static uint32_t vuart_read(__unused struct vm_io_handler *hdlr,
struct vm *vm, uint16_t offset_arg,
__unused size_t width)
{
@ -265,7 +247,7 @@ static uint32_t uart_read(__unused struct vm_io_handler *hdlr,
break;
case UART16550_IIR:
iir = ((vu->fcr & FCR_FIFOE) != 0) ? IIR_FIFO_MASK : 0;
intr_reason = uart_intr_reason(vu);
intr_reason = vuart_intr_reason(vu);
/*
* Deal with side effects of reading the IIR register
*/
@ -306,7 +288,7 @@ static uint32_t uart_read(__unused struct vm_io_handler *hdlr,
break;
}
done:
uart_toggle_intr(vu);
vuart_toggle_intr(vu);
vuart_unlock(vu);
return reg;
}
@ -315,22 +297,18 @@ static void vuart_register_io_handler(struct vm *vm)
{
struct vm_io_range range = {
.flags = IO_ATTR_RW,
.base = 0x3f8,
.base = COM1_BASE,
.len = 8U
};
register_io_emulation_handler(vm, &range, uart_read, uart_write);
register_io_emulation_handler(vm, &range, vuart_read, vuart_write);
}
void vuart_console_tx_chars(void)
/**
* @pre vu != NULL
*/
void vuart_console_tx_chars(struct vuart *vu)
{
struct vuart *vu;
vu = vuart_console_active();
if (vu == NULL) {
return;
}
vuart_lock(vu);
while (fifo_numchars(&vu->txfifo) > 0) {
printf("%c", fifo_getchar(&vu->txfifo));
@ -338,46 +316,27 @@ void vuart_console_tx_chars(void)
vuart_unlock(vu);
}
void vuart_console_rx_chars(uint32_t serial_handle)
/**
* @pre vu != NULL
* @pre vu->active == true
*/
void vuart_console_rx_chars(struct vuart *vu)
{
struct vuart *vu;
uint32_t vbuf_len;
char buffer[100];
uint32_t buf_idx = 0;
if (serial_handle == SERIAL_INVALID_HANDLE) {
pr_err("%s: invalid serial handle 0x%llx\n",
__func__, serial_handle);
return;
}
vu = vuart_console_active();
if (vu == NULL) {
return;
}
char ch = -1;
vuart_lock(vu);
/* Get data from serial */
vbuf_len = serial_gets(serial_handle, buffer, 100);
if (vbuf_len != 0U) {
while (buf_idx < vbuf_len) {
if (buffer[buf_idx] == GUEST_CONSOLE_TO_HV_SWITCH_KEY) {
/* Switch the console */
shell_switch_console();
break;
}
buf_idx++;
}
if (vu->active != false) {
buf_idx = 0;
while (buf_idx < vbuf_len) {
fifo_putchar(&vu->rxfifo, buffer[buf_idx]);
buf_idx++;
}
/* Get data from physical uart */
ch = uart16550_getc();
uart_toggle_intr(vu);
}
if (ch == GUEST_CONSOLE_TO_HV_SWITCH_KEY) {
/* Switch the console */
shell_switch_console();
}
if (ch != -1) {
fifo_putchar(&vu->rxfifo, ch);
vuart_toggle_intr(vu);
}
vuart_unlock(vu);
}
@ -398,11 +357,22 @@ struct vuart *vuart_console_active(void)
void *vuart_init(struct vm *vm)
{
struct vuart *vu;
uint16_t divisor;
vu = calloc(1, sizeof(struct vuart));
ASSERT(vu != NULL, "");
uart_init(vu);
/* Set baud rate*/
divisor = UART_CLOCK_RATE / BAUD_9600 / 16;
vu->dll = divisor;
vu->dlh = divisor >> 16;
vu->active = false;
vu->base = COM1_BASE;
vu->vm = vm;
fifo_init(&vu->rxfifo, RX_FIFO_SIZE);
fifo_init(&vu->txfifo, TX_FIFO_SIZE);
vuart_lock_init(vu);
vuart_register_io_handler(vm);
return vu;

26
hypervisor/include/debug/console.h
View File

@ -16,16 +16,6 @@ extern struct hv_timer console_timer;
void console_init(void);
/** Writes a NUL terminated string to the console.
*
* @param str A pointer to the NUL terminated string to write.
*
* @return The number of characters written or -1 if an error occurred
* and no character was written.
*/
int console_puts(const char *s_arg);
/** Writes a given number of characters to the console.
*
* @param str A pointer to character array to write.
@ -45,7 +35,9 @@ int console_write(const char *s_arg, size_t len);
* occurred before any character was written.
*/
int console_putc(int ch);
void console_putc(const char *ch);
char console_getc(void);
int console_gets(char *buffer, uint32_t length);
void console_setup_timer(void);
@ -65,20 +57,16 @@ static inline void resume_console(void)
static inline void console_init(void)
{
}
static inline int console_puts(__unused const char *str)
{
return 0;
}
static inline int console_write(__unused const char *str,
__unused size_t len)
{
return 0;
}
static inline int console_putc(__unused int ch)
{
return 0;
}
static inline void console_putc(__unused const char *ch) { }
static inline int console_getc(void) { return 0; }
static inline int console_gets(char *buffer, uint32_t length) { return 0; }
static inline void console_setup_timer(void) {}
static inline uint32_t get_serial_handle(void) { return 0; }

11
hypervisor/include/debug/vuart.h
View File

@ -63,8 +63,8 @@ struct vuart {
#ifdef HV_DEBUG
void *vuart_init(struct vm *vm);
struct vuart *vuart_console_active(void);
void vuart_console_tx_chars(void);
void vuart_console_rx_chars(uint32_t serial_handle);
void vuart_console_tx_chars(struct vuart *vu);
void vuart_console_rx_chars(struct vuart *vu);
#else
static inline void *vuart_init(__unused struct vm *vm)
{
@ -74,11 +74,8 @@ static inline struct vuart *vuart_console_active(void)
{
return NULL;
}
static inline void vuart_console_tx_chars(void) {}
static inline void vuart_console_rx_chars(
__unused uint32_t serial_handle)
{
}
static inline void vuart_console_tx_chars(__unused struct vuart *vu) {}
static inline void vuart_console_rx_chars(__unused struct vuart *vu) {}
#endif /*HV_DEBUG*/
#endif

1
hypervisor/include/hv_debug.h
View File

@ -8,7 +8,6 @@
#define HV_DEBUG_H
#include <logmsg.h>
#include <serial.h>
#include <vuart.h>
#include <console.h>
#include <dump.h>