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HV: Removed unused member variable of iommu_domain and related code

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hv: vtd: removed is_host (always false) and is_tt_ept (always true) member
variables of struct iommu_domain and related codes since the values are
always determined.

Tracked-On: #4535
Signed-off-by: Qian Wang <qian1.wang@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Qian Wang 2020-03-25 15:03:08 +08:00 committed by wenlingz
parent c4531e3bc0
commit b55f414a9d
2 changed files with 6 additions and 34 deletions
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38
hypervisor/arch/x86/vtd.c
View File

@ -1054,7 +1054,7 @@ static int32_t iommu_attach_device(struct iommu_domain *domain, uint8_t bus, uin
struct dmar_entry *context;
struct dmar_entry *root_entry;
struct dmar_entry *context_entry;
uint64_t hi_64;
uint64_t hi_64 = 0UL;
uint64_t lo_64 = 0UL;
int32_t ret = 0;
/* source id */
@ -1119,30 +1119,11 @@ static int32_t iommu_attach_device(struct iommu_domain *domain, uint8_t bus, uin
ret = -EBUSY;
} else {
/* setup context entry for the devfun */
hi_64 = 0UL;
lo_64 = 0UL;
if (domain->is_host) {
if (iommu_ecap_pt(dmar_unit->ecap) != 0U) {
/* When the Translation-type (T) field indicates
* pass-through processing (10b), AW field must be
* programmed to indicate the largest AGAW value
* supported by hardware.
*/
hi_64 = dmar_set_bitslice(hi_64,
CTX_ENTRY_UPPER_AW_MASK, CTX_ENTRY_UPPER_AW_POS, dmar_unit->cap_msagaw);
lo_64 = dmar_set_bitslice(lo_64,
CTX_ENTRY_LOWER_TT_MASK, CTX_ENTRY_LOWER_TT_POS, DMAR_CTX_TT_PASSTHROUGH);
} else {
pr_err("dmaru[%d] doesn't support trans passthrough", dmar_unit->index);
ret = -ENODEV;
}
} else {
/* TODO: add Device TLB support */
hi_64 = dmar_set_bitslice(hi_64,
CTX_ENTRY_UPPER_AW_MASK, CTX_ENTRY_UPPER_AW_POS, (uint64_t)width_to_agaw(domain->addr_width));
lo_64 = dmar_set_bitslice(lo_64,
CTX_ENTRY_LOWER_TT_MASK, CTX_ENTRY_LOWER_TT_POS, DMAR_CTX_TT_UNTRANSLATED);
}
/* TODO: add Device TLB support */
hi_64 = dmar_set_bitslice(hi_64,
CTX_ENTRY_UPPER_AW_MASK, CTX_ENTRY_UPPER_AW_POS, (uint64_t)width_to_agaw(domain->addr_width));
lo_64 = dmar_set_bitslice(lo_64,
CTX_ENTRY_LOWER_TT_MASK, CTX_ENTRY_LOWER_TT_POS, DMAR_CTX_TT_UNTRANSLATED);
if (ret == 0) {
hi_64 = dmar_set_bitslice(hi_64,
@ -1258,11 +1239,9 @@ struct iommu_domain *create_iommu_domain(uint16_t vm_id, uint64_t translation_ta
*/
domain = &iommu_domains[vmid_to_domainid(vm_id)];
domain->is_host = false;
domain->vm_id = vm_id;
domain->trans_table_ptr = translation_table;
domain->addr_width = addr_width;
domain->is_tt_ept = true;
#ifdef CONFIG_IOMMU_ENFORCE_SNP
domain->iommu_snoop = true;
@ -1287,11 +1266,6 @@ struct iommu_domain *create_iommu_domain(uint16_t vm_id, uint64_t translation_ta
*/
void destroy_iommu_domain(struct iommu_domain *domain)
{
/* currently only support ept */
if (!domain->is_tt_ept) {
ASSERT(false, "translation_table is not EPT!");
}
/* TODO: check if any device assigned to this domain */
(void)memset(domain, 0U, sizeof(*domain));
}

2
hypervisor/include/arch/x86/vtd.h
View File

@ -53,8 +53,6 @@ enum acpi_dmar_scope_type {
};
struct iommu_domain {
bool is_host;
bool is_tt_ept; /* if reuse EPT of the domain */
uint16_t vm_id;
uint32_t addr_width; /* address width of the domain */
uint64_t trans_table_ptr;