mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-06-05 13:42:07 +00:00
HV: separate e820 related code as e820.c/h
1. e820 is modulized as separated files. 2. move boot_regs into multiboot.h as it's related with multiboot info header Tracked-On: #1842 Signed-off-by: Minggui Cao <minggui.cao@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
parent
c5d827ab1f
commit
b69d24b1d4
@ -136,6 +136,7 @@ C_SRCS += arch/x86/lapic.c
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C_SRCS += arch/x86/cpu.c
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C_SRCS += arch/x86/cpuid.c
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C_SRCS += arch/x86/mmu.c
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C_SRCS += arch/x86/e820.c
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C_SRCS += arch/x86/pagetable.c
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C_SRCS += arch/x86/page.c
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C_SRCS += arch/x86/notify.c
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@ -9,6 +9,7 @@
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#include <schedule.h>
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#include <version.h>
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#include <trampoline.h>
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#include <e820.h>
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spinlock_t trampoline_spinlock = {
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.head = 0U,
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229
hypervisor/arch/x86/e820.c
Normal file
229
hypervisor/arch/x86/e820.c
Normal file
@ -0,0 +1,229 @@
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/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <hypervisor.h>
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#include <reloc.h>
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#include <multiboot.h>
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#include <e820.h>
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/* for VM0 e820 */
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uint32_t e820_entries;
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struct e820_entry e820[E820_MAX_ENTRIES];
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struct e820_mem_params e820_mem;
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#define ACRN_DBG_E820 6U
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void obtain_e820_mem_info(void)
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{
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uint32_t i;
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struct e820_entry *entry;
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e820_mem.mem_bottom = UINT64_MAX;
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e820_mem.mem_top = 0x0UL;
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e820_mem.total_mem_size = 0UL;
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e820_mem.max_ram_blk_base = 0UL;
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e820_mem.max_ram_blk_size = 0UL;
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for (i = 0U; i < e820_entries; i++) {
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entry = &e820[i];
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if (e820_mem.mem_bottom > entry->baseaddr) {
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e820_mem.mem_bottom = entry->baseaddr;
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}
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if ((entry->baseaddr + entry->length) > e820_mem.mem_top) {
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e820_mem.mem_top = entry->baseaddr + entry->length;
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}
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if (entry->type == E820_TYPE_RAM) {
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e820_mem.total_mem_size += entry->length;
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if (entry->baseaddr == UOS_DEFAULT_START_ADDR) {
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e820_mem.max_ram_blk_base = entry->baseaddr;
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e820_mem.max_ram_blk_size = entry->length;
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}
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}
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}
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}
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void rebuild_vm0_e820(void)
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{
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uint32_t i;
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uint64_t entry_start;
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uint64_t entry_end;
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uint64_t hv_start_pa = get_hv_image_base();
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uint64_t hv_end_pa = hv_start_pa + CONFIG_HV_RAM_SIZE;
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struct e820_entry *entry, new_entry = {0};
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/* hypervisor mem need be filter out from e820 table
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* it's hv itself + other hv reserved mem like vgt etc
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*/
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for (i = 0U; i < e820_entries; i++) {
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entry = &e820[i];
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entry_start = entry->baseaddr;
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entry_end = entry->baseaddr + entry->length;
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/* No need handle in these cases*/
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if ((entry->type != E820_TYPE_RAM) || (entry_end <= hv_start_pa) || (entry_start >= hv_end_pa)) {
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continue;
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}
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/* filter out hv mem and adjust length of this entry*/
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if ((entry_start < hv_start_pa) && (entry_end <= hv_end_pa)) {
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entry->length = hv_start_pa - entry_start;
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continue;
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}
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/* filter out hv mem and need to create a new entry*/
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if ((entry_start < hv_start_pa) && (entry_end > hv_end_pa)) {
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entry->length = hv_start_pa - entry_start;
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new_entry.baseaddr = hv_end_pa;
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new_entry.length = entry_end - hv_end_pa;
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new_entry.type = E820_TYPE_RAM;
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continue;
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}
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/* This entry is within the range of hv mem
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* change to E820_TYPE_RESERVED
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*/
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if ((entry_start >= hv_start_pa) && (entry_end <= hv_end_pa)) {
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entry->type = E820_TYPE_RESERVED;
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continue;
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}
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if ((entry_start >= hv_start_pa) && (entry_start < hv_end_pa) && (entry_end > hv_end_pa)) {
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entry->baseaddr = hv_end_pa;
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entry->length = entry_end - hv_end_pa;
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continue;
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}
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}
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if (new_entry.length > 0UL) {
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e820_entries++;
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ASSERT(e820_entries <= E820_MAX_ENTRIES, "e820 entry overflow");
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entry = &e820[e820_entries - 1];
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entry->baseaddr = new_entry.baseaddr;
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entry->length = new_entry.length;
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entry->type = new_entry.type;
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}
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e820_mem.total_mem_size -= CONFIG_HV_RAM_SIZE;
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}
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uint64_t e820_alloc_low_memory(uint32_t size_arg)
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{
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uint32_t i;
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uint32_t size = size_arg;
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struct e820_entry *entry, *new_entry;
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/* We want memory in page boundary and integral multiple of pages */
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size = (((size + PAGE_SIZE) - 1U) >> PAGE_SHIFT) << PAGE_SHIFT;
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for (i = 0U; i < e820_entries; i++) {
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entry = &e820[i];
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uint64_t start, end, length;
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start = round_page_up(entry->baseaddr);
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end = round_page_down(entry->baseaddr + entry->length);
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length = end - start;
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length = (end > start) ? (end - start) : 0;
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/* Search for available low memory */
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if ((entry->type != E820_TYPE_RAM) || (length < size) || ((start + size) > MEM_1M)) {
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continue;
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}
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/* found exact size of e820 entry */
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if (length == size) {
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entry->type = E820_TYPE_RESERVED;
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e820_mem.total_mem_size -= size;
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return start;
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}
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/*
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* found entry with available memory larger than requested
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* allocate memory from the end of this entry at page boundary
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*/
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new_entry = &e820[e820_entries];
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new_entry->type = E820_TYPE_RESERVED;
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new_entry->baseaddr = end - size;
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new_entry->length = (entry->baseaddr + entry->length) - new_entry->baseaddr;
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/* Shrink the existing entry and total available memory */
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entry->length -= new_entry->length;
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e820_mem.total_mem_size -= new_entry->length;
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e820_entries++;
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return new_entry->baseaddr;
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}
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pr_fatal("Can't allocate memory under 1M from E820\n");
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return ACRN_INVALID_HPA;
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}
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void init_e820(void)
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{
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uint32_t i;
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if (boot_regs[0] == MULTIBOOT_INFO_MAGIC) {
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struct multiboot_info *mbi = (struct multiboot_info *)(hpa2hva((uint64_t)boot_regs[1]));
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pr_info("Multiboot info detected\n");
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if ((mbi->mi_flags & MULTIBOOT_INFO_HAS_MMAP) != 0U) {
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struct multiboot_mmap *mmap = (struct multiboot_mmap *)hpa2hva((uint64_t)mbi->mi_mmap_addr);
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e820_entries = mbi->mi_mmap_length / sizeof(struct multiboot_mmap);
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if (e820_entries > E820_MAX_ENTRIES) {
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pr_err("Too many E820 entries %d\n", e820_entries);
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e820_entries = E820_MAX_ENTRIES;
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}
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dev_dbg(ACRN_DBG_E820, "mmap length 0x%x addr 0x%x entries %d\n",
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mbi->mi_mmap_length, mbi->mi_mmap_addr, e820_entries);
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for (i = 0U; i < e820_entries; i++) {
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e820[i].baseaddr = mmap[i].baseaddr;
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e820[i].length = mmap[i].length;
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e820[i].type = mmap[i].type;
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dev_dbg(ACRN_DBG_E820, "mmap table: %d type: 0x%x\n", i, mmap[i].type);
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dev_dbg(ACRN_DBG_E820, "Base: 0x%016llx length: 0x%016llx",
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mmap[i].baseaddr, mmap[i].length);
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}
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}
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} else {
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panic("no multiboot info found");
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}
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}
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#ifdef CONFIG_PARTITION_MODE
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uint32_t create_e820_table(struct e820_entry *param_e820)
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{
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uint32_t i;
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for (i = 0U; i < NUM_E820_ENTRIES; i++) {
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param_e820[i].baseaddr = e820_default_entries[i].baseaddr;
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param_e820[i].length = e820_default_entries[i].length;
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param_e820[i].type = e820_default_entries[i].type;
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}
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return NUM_E820_ENTRIES;
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}
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#else
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uint32_t create_e820_table(struct e820_entry *param_e820)
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{
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uint32_t i;
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ASSERT(e820_entries > 0U, "e820 should be inited");
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for (i = 0U; i < e820_entries; i++) {
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param_e820[i].baseaddr = e820[i].baseaddr;
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param_e820[i].length = e820[i].length;
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param_e820[i].type = e820[i].type;
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}
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return e820_entries;
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}
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#endif
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@ -8,14 +8,10 @@
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#include <bsp_extern.h>
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#include <multiboot.h>
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#include <reloc.h>
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#include <e820.h>
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#define ACRN_DBG_GUEST 6U
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/* for VM0 e820 */
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uint32_t e820_entries;
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struct e820_entry e820[E820_MAX_ENTRIES];
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struct e820_mem_params e820_mem;
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struct page_walk_info {
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uint64_t top_entry; /* Top level paging structure entry */
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uint32_t level;
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@ -455,148 +451,6 @@ int copy_to_gva(struct acrn_vcpu *vcpu, void *h_ptr, uint64_t gva,
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return copy_gva(vcpu, h_ptr, gva, size, err_code, fault_addr, 0);
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}
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void init_e820(void)
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{
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uint32_t i;
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if (boot_regs[0] == MULTIBOOT_INFO_MAGIC) {
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struct multiboot_info *mbi = (struct multiboot_info *)
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(hpa2hva((uint64_t)boot_regs[1]));
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pr_info("Multiboot info detected\n");
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if ((mbi->mi_flags & MULTIBOOT_INFO_HAS_MMAP) != 0U) {
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struct multiboot_mmap *mmap =
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(struct multiboot_mmap *)
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hpa2hva((uint64_t)mbi->mi_mmap_addr);
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e820_entries = mbi->mi_mmap_length / sizeof(struct multiboot_mmap);
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if (e820_entries > E820_MAX_ENTRIES) {
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pr_err("Too many E820 entries %d\n",
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e820_entries);
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e820_entries = E820_MAX_ENTRIES;
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}
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dev_dbg(ACRN_DBG_GUEST,
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"mmap length 0x%x addr 0x%x entries %d\n",
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mbi->mi_mmap_length, mbi->mi_mmap_addr,
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e820_entries);
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for (i = 0U; i < e820_entries; i++) {
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e820[i].baseaddr = mmap[i].baseaddr;
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e820[i].length = mmap[i].length;
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e820[i].type = mmap[i].type;
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dev_dbg(ACRN_DBG_GUEST,
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"mmap table: %d type: 0x%x\n",
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i, mmap[i].type);
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dev_dbg(ACRN_DBG_GUEST,
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"Base: 0x%016llx length: 0x%016llx",
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mmap[i].baseaddr, mmap[i].length);
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}
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}
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} else {
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ASSERT(false, "no multiboot info found");
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}
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}
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void obtain_e820_mem_info(void)
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{
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uint32_t i;
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struct e820_entry *entry;
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e820_mem.mem_bottom = UINT64_MAX;
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e820_mem.mem_top = 0x0UL;
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e820_mem.total_mem_size = 0UL;
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e820_mem.max_ram_blk_base = 0UL;
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e820_mem.max_ram_blk_size = 0UL;
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for (i = 0U; i < e820_entries; i++) {
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entry = &e820[i];
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if (e820_mem.mem_bottom > entry->baseaddr) {
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e820_mem.mem_bottom = entry->baseaddr;
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}
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if ((entry->baseaddr + entry->length)
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> e820_mem.mem_top) {
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e820_mem.mem_top = entry->baseaddr
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+ entry->length;
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}
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if (entry->type == E820_TYPE_RAM) {
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e820_mem.total_mem_size += entry->length;
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if (entry->baseaddr == UOS_DEFAULT_START_ADDR) {
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e820_mem.max_ram_blk_base =
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entry->baseaddr;
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e820_mem.max_ram_blk_size = entry->length;
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}
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}
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}
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}
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static void rebuild_vm0_e820(void)
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{
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uint32_t i;
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uint64_t entry_start;
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uint64_t entry_end;
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uint64_t hv_start_pa = get_hv_image_base();
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uint64_t hv_end_pa = hv_start_pa + CONFIG_HV_RAM_SIZE;
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struct e820_entry *entry, new_entry = {0};
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/* hypervisor mem need be filter out from e820 table
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* it's hv itself + other hv reserved mem like vgt etc
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*/
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for (i = 0U; i < e820_entries; i++) {
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entry = &e820[i];
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entry_start = entry->baseaddr;
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entry_end = entry->baseaddr + entry->length;
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/* No need handle in these cases*/
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if ((entry->type != E820_TYPE_RAM) || (entry_end <= hv_start_pa)
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|| (entry_start >= hv_end_pa)) {
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continue;
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}
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/* filter out hv mem and adjust length of this entry*/
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if ((entry_start < hv_start_pa) && (entry_end <= hv_end_pa)) {
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entry->length = hv_start_pa - entry_start;
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continue;
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}
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/* filter out hv mem and need to create a new entry*/
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if ((entry_start < hv_start_pa) && (entry_end > hv_end_pa)) {
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entry->length = hv_start_pa - entry_start;
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new_entry.baseaddr = hv_end_pa;
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new_entry.length = entry_end - hv_end_pa;
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new_entry.type = E820_TYPE_RAM;
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continue;
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}
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/* This entry is within the range of hv mem
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* change to E820_TYPE_RESERVED
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*/
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if ((entry_start >= hv_start_pa) && (entry_end <= hv_end_pa)) {
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entry->type = E820_TYPE_RESERVED;
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continue;
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}
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if ((entry_start >= hv_start_pa) && (entry_start < hv_end_pa)
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&& (entry_end > hv_end_pa)) {
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entry->baseaddr = hv_end_pa;
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entry->length = entry_end - hv_end_pa;
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continue;
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}
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}
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if (new_entry.length > 0UL) {
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e820_entries++;
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ASSERT(e820_entries <= E820_MAX_ENTRIES,
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"e820 entry overflow");
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entry = &e820[e820_entries - 1];
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entry->baseaddr = new_entry.baseaddr;
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entry->length = new_entry.length;
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entry->type = new_entry.type;
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}
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e820_mem.total_mem_size -= CONFIG_HV_RAM_SIZE;
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}
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/**
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* @param[inout] vm pointer to a vm descriptor
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*
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@ -655,57 +509,3 @@ int prepare_vm0_memmap_and_e820(struct acrn_vm *vm)
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ept_mr_del(vm, pml4_page, hv_hpa, CONFIG_HV_RAM_SIZE);
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return 0;
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}
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uint64_t e820_alloc_low_memory(uint32_t size_arg)
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{
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uint32_t i;
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uint32_t size = size_arg;
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struct e820_entry *entry, *new_entry;
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/* We want memory in page boundary and integral multiple of pages */
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size = (((size + PAGE_SIZE) - 1U) >> PAGE_SHIFT) << PAGE_SHIFT;
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for (i = 0U; i < e820_entries; i++) {
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entry = &e820[i];
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uint64_t start, end, length;
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start = round_page_up(entry->baseaddr);
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end = round_page_down(entry->baseaddr + entry->length);
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length = end - start;
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length = (end > start) ? (end - start) : 0;
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/* Search for available low memory */
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if ((entry->type != E820_TYPE_RAM)
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|| (length < size)
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|| ((start + size) > MEM_1M)) {
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continue;
|
||||
}
|
||||
|
||||
/* found exact size of e820 entry */
|
||||
if (length == size) {
|
||||
entry->type = E820_TYPE_RESERVED;
|
||||
e820_mem.total_mem_size -= size;
|
||||
return start;
|
||||
}
|
||||
|
||||
/*
|
||||
* found entry with available memory larger than requested
|
||||
* alocate memory from the end of this entry at page boundary
|
||||
*/
|
||||
new_entry = &e820[e820_entries];
|
||||
new_entry->type = E820_TYPE_RESERVED;
|
||||
new_entry->baseaddr = end - size;
|
||||
new_entry->length = (entry->baseaddr +
|
||||
entry->length) - new_entry->baseaddr;
|
||||
|
||||
/* Shrink the existing entry and total available memory */
|
||||
entry->length -= new_entry->length;
|
||||
e820_mem.total_mem_size -= new_entry->length;
|
||||
e820_entries++;
|
||||
|
||||
return new_entry->baseaddr;
|
||||
}
|
||||
|
||||
pr_fatal("Can't allocate memory under 1M from E820\n");
|
||||
return ACRN_INVALID_HPA;
|
||||
}
|
||||
|
@ -7,6 +7,7 @@
|
||||
#include <hypervisor.h>
|
||||
#include <bsp_extern.h>
|
||||
#include <multiboot.h>
|
||||
#include <e820.h>
|
||||
#include <vtd.h>
|
||||
|
||||
/* Local variables */
|
||||
|
@ -29,6 +29,7 @@
|
||||
|
||||
#include <hypervisor.h>
|
||||
#include <reloc.h>
|
||||
#include <e820.h>
|
||||
|
||||
static void *ppt_mmu_pml4_addr;
|
||||
static uint8_t sanitized_page[PAGE_SIZE] __aligned(PAGE_SIZE);
|
||||
|
@ -7,6 +7,7 @@
|
||||
#include <reloc.h>
|
||||
#include <trampoline.h>
|
||||
#include <vm0_boot.h>
|
||||
#include <e820.h>
|
||||
|
||||
uint64_t trampoline_start16_paddr;
|
||||
|
||||
|
@ -7,37 +7,7 @@
|
||||
#include <hypervisor.h>
|
||||
#include <zeropage.h>
|
||||
#include <boot_context.h>
|
||||
|
||||
#ifdef CONFIG_PARTITION_MODE
|
||||
static uint32_t create_e820_table(struct e820_entry *param_e820)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0U; i < NUM_E820_ENTRIES; i++) {
|
||||
param_e820[i].baseaddr = e820_default_entries[i].baseaddr;
|
||||
param_e820[i].length = e820_default_entries[i].length;
|
||||
param_e820[i].type = e820_default_entries[i].type;
|
||||
}
|
||||
|
||||
return NUM_E820_ENTRIES;
|
||||
}
|
||||
#else
|
||||
static uint32_t create_e820_table(struct e820_entry *param_e820)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
ASSERT(e820_entries > 0U,
|
||||
"e820 should be inited");
|
||||
|
||||
for (i = 0U; i < e820_entries; i++) {
|
||||
param_e820[i].baseaddr = e820[i].baseaddr;
|
||||
param_e820[i].length = e820[i].length;
|
||||
param_e820[i].type = e820[i].type;
|
||||
}
|
||||
|
||||
return e820_entries;
|
||||
}
|
||||
#endif
|
||||
#include <e820.h>
|
||||
|
||||
static void prepare_bsp_gdt(struct acrn_vm *vm)
|
||||
{
|
||||
|
35
hypervisor/include/arch/x86/e820.h
Normal file
35
hypervisor/include/arch/x86/e820.h
Normal file
@ -0,0 +1,35 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
struct e820_mem_params {
|
||||
uint64_t mem_bottom;
|
||||
uint64_t mem_top;
|
||||
uint64_t total_mem_size;
|
||||
uint64_t max_ram_blk_base; /* used for the start address of UOS */
|
||||
uint64_t max_ram_blk_size;
|
||||
};
|
||||
|
||||
void init_e820(void);
|
||||
void obtain_e820_mem_info(void);
|
||||
void rebuild_vm0_e820(void);
|
||||
uint64_t e820_alloc_low_memory(uint32_t size_arg);
|
||||
|
||||
extern uint32_t e820_entries;
|
||||
extern struct e820_entry e820[E820_MAX_ENTRIES];
|
||||
extern struct e820_mem_params e820_mem;
|
||||
|
||||
uint32_t create_e820_table(struct e820_entry *param_e820);
|
||||
|
||||
#ifdef CONFIG_PARTITION_MODE
|
||||
/*
|
||||
* Default e820 mem map:
|
||||
*
|
||||
* Assumption is every VM launched by ACRN in partition mode uses 2G of RAM.
|
||||
* there is reserved memory of 64K for MPtable and PCI hole of 512MB
|
||||
*/
|
||||
#define NUM_E820_ENTRIES 5U
|
||||
extern const struct e820_entry e820_default_entries[NUM_E820_ENTRIES];
|
||||
#endif
|
@ -70,17 +70,7 @@
|
||||
#define LDTR_AR (0x0082U) /* LDT, type must be 2, refer to SDM Vol3 26.3.1.2 */
|
||||
#define TR_AR (0x008bU) /* TSS (busy), refer to SDM Vol3 26.3.1.2 */
|
||||
|
||||
struct e820_mem_params {
|
||||
uint64_t mem_bottom;
|
||||
uint64_t mem_top;
|
||||
uint64_t total_mem_size;
|
||||
uint64_t max_ram_blk_base; /* used for the start address of UOS */
|
||||
uint64_t max_ram_blk_size;
|
||||
};
|
||||
|
||||
int prepare_vm0_memmap_and_e820(struct acrn_vm *vm);
|
||||
uint64_t e820_alloc_low_memory(uint32_t size_arg);
|
||||
|
||||
/* Definition for a mem map lookup */
|
||||
struct vm_lu_mem_map {
|
||||
struct list_head list; /* EPT mem map lookup list*/
|
||||
@ -107,25 +97,6 @@ int gva2gpa(struct acrn_vcpu *vcpu, uint64_t gva, uint64_t *gpa, uint32_t *err_c
|
||||
|
||||
enum vm_paging_mode get_vcpu_paging_mode(struct acrn_vcpu *vcpu);
|
||||
|
||||
void init_e820(void);
|
||||
void obtain_e820_mem_info(void);
|
||||
extern uint32_t e820_entries;
|
||||
extern struct e820_entry e820[E820_MAX_ENTRIES];
|
||||
|
||||
#ifdef CONFIG_PARTITION_MODE
|
||||
/*
|
||||
* Default e820 mem map:
|
||||
*
|
||||
* Assumption is every VM launched by ACRN in partition mode uses 2G of RAM.
|
||||
* there is reserved memory of 64K for MPtable and PCI hole of 512MB
|
||||
*/
|
||||
#define NUM_E820_ENTRIES 5U
|
||||
extern const struct e820_entry e820_default_entries[NUM_E820_ENTRIES];
|
||||
#endif
|
||||
|
||||
extern uint32_t boot_regs[2];
|
||||
extern struct e820_mem_params e820_mem;
|
||||
|
||||
int rdmsr_vmexit_handler(struct acrn_vcpu *vcpu);
|
||||
int wrmsr_vmexit_handler(struct acrn_vcpu *vcpu);
|
||||
void init_msr_emulation(struct acrn_vcpu *vcpu);
|
||||
|
@ -80,4 +80,7 @@ struct multiboot_module {
|
||||
|
||||
int parse_hv_cmdline(void);
|
||||
int init_vm_boot_info(struct acrn_vm *vm);
|
||||
|
||||
/* boot_regs store the multiboot header address */
|
||||
extern uint32_t boot_regs[2];
|
||||
#endif
|
||||
|
@ -5,6 +5,7 @@
|
||||
*/
|
||||
|
||||
#include <hypervisor.h>
|
||||
#include <e820.h>
|
||||
|
||||
#define NUM_USER_VMS 2U
|
||||
|
||||
|
@ -5,6 +5,7 @@
|
||||
*/
|
||||
|
||||
#include <hypervisor.h>
|
||||
#include <e820.h>
|
||||
|
||||
#define NUM_USER_VMS 2U
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user