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Fix: do not need to hide IO 0x3f8 for SOS on EHL

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when HW platform like EHL use mmio type serial, do not need to hide
serial IO port for SOS

Tracked-On: #5498
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
This commit is contained in:
Tao Yuhong 2020-11-11 11:42:26 -05:00 committed by wenlingz
parent 6f447ba626
commit bcbd0dcd81
1 changed files with 3 additions and 1 deletions
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4
hypervisor/arch/x86/guest/vm.c
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@ -420,7 +420,6 @@ int32_t create_vm(uint16_t vm_id, uint64_t pcpu_bitmap, struct acrn_vm_config *v
struct acrn_vm *vm = NULL; struct acrn_vm *vm = NULL;
int32_t status = 0; int32_t status = 0;
uint16_t pcpu_id; uint16_t pcpu_id;
struct vm_io_range vu_range = {};
/* Allocate memory for virtual machine */ /* Allocate memory for virtual machine */
vm = &vm_array[vm_id]; vm = &vm_array[vm_id];
@ -494,7 +493,9 @@ int32_t create_vm(uint16_t vm_id, uint64_t pcpu_bitmap, struct acrn_vm_config *v
enable_iommu(); enable_iommu();
/* Create virtual uart;*/ /* Create virtual uart;*/
#ifdef CONFIG_SERIAL_PIO_BASE
if (is_sos_vm(vm)) { if (is_sos_vm(vm)) {
struct vm_io_range vu_range = {};
/* Legacy vuart[0] will take CONFIG_SERIAL_PIO_BASE, as SOS_COM1_BASE /* Legacy vuart[0] will take CONFIG_SERIAL_PIO_BASE, as SOS_COM1_BASE
* If has no legacy vuart[0], SOS will access to CONFIG_SERIAL_PIO_BASE, * If has no legacy vuart[0], SOS will access to CONFIG_SERIAL_PIO_BASE,
* SOS need to trap for CONFIG_SERIAL_PIO_BASE too, without legacy vuart[0]. * SOS need to trap for CONFIG_SERIAL_PIO_BASE too, without legacy vuart[0].
@ -504,6 +505,7 @@ int32_t create_vm(uint16_t vm_id, uint64_t pcpu_bitmap, struct acrn_vm_config *v
vu_range.len = 8U; vu_range.len = 8U;
register_pio_emulation_handler(vm, UART_PIO_IDX0, &vu_range, NULL, NULL); register_pio_emulation_handler(vm, UART_PIO_IDX0, &vu_range, NULL, NULL);
} }
#endif
init_legacy_vuarts(vm, vm_config->vuart); init_legacy_vuarts(vm, vm_config->vuart);
register_reset_port_handler(vm); register_reset_port_handler(vm);