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acrn-config: keep align with vcpu_affinity for vm config

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The pcpu sharing for vm already enabled in master branch, acrn-config
tool for generating scenario config souce file should keep align with master branch.

1. Add 'vcpu_affinity' tag and its vaule in config xml.
2. Parse the 'vcpu_affinity' tag of value from config xml for generating vcpu_affinity.

v1-v2:
    1). apl-up2-n3350 has two PCPUs, set appropriate value for vcpu_affinity.

Tracked-On: #3798
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This commit is contained in:
Wei Liu
2019-10-11 13:58:17 +08:00
committed by ACRN System Integration
parent db909edda5
commit c442f3f4d1
31 changed files with 261 additions and 57 deletions
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9
misc/acrn-config/xmls/config-xmls/apl-up2/sdc2.xml
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@@ -48,6 +48,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>1</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@@ -72,6 +75,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>2</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>
@@ -96,6 +102,9 @@
<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
<guest_flag>0</guest_flag>
</guest_flags>
<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
<pcpu_id>3</pcpu_id>
</vcpu_affinity>
<clos desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">0</clos>
<epc_section desc="epc section">
<base desc="SGX EPC section base, must be page aligned">0</base>