mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-06-03 04:39:50 +00:00
refine: remove redundant data type definition
remove data defination of mmio_addr_t, vaddr_t, paddr_t, and ioport_t. Signed-off-by: Zheng, Gen <gen.zheng@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com> Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
This commit is contained in:
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f80c706d8d
commit
c92da5295b
@ -617,7 +617,7 @@ static void start_cpus()
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/* Broadcast IPIs to all other CPUs */
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send_startup_ipi(INTR_CPU_STARTUP_ALL_EX_SELF,
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-1U, ((paddr_t) cpu_secondary_reset));
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-1U, ((uint64_t) cpu_secondary_reset));
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/* Wait until global count is equal to expected CPU up count or
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* configured time-out has expired
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@ -778,7 +778,7 @@ static int vpic_master_handler(struct vm *vm, bool in, int port, int bytes,
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}
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static uint32_t vpic_master_io_read(__unused struct vm_io_handler *hdlr,
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struct vm *vm, ioport_t addr, size_t width)
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struct vm *vm, uint16_t addr, size_t width)
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{
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uint32_t val = 0;
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@ -789,7 +789,7 @@ static uint32_t vpic_master_io_read(__unused struct vm_io_handler *hdlr,
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}
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static void vpic_master_io_write(__unused struct vm_io_handler *hdlr,
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struct vm *vm, ioport_t addr, size_t width, uint32_t v)
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struct vm *vm, uint16_t addr, size_t width, uint32_t v)
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{
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uint32_t val = v;
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@ -817,7 +817,7 @@ static int vpic_slave_handler(struct vm *vm, bool in, int port, int bytes,
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}
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static uint32_t vpic_slave_io_read(__unused struct vm_io_handler *hdlr,
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struct vm *vm, ioport_t addr, size_t width)
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struct vm *vm, uint16_t addr, size_t width)
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{
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uint32_t val = 0;
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@ -828,7 +828,7 @@ static uint32_t vpic_slave_io_read(__unused struct vm_io_handler *hdlr,
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}
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static void vpic_slave_io_write(__unused struct vm_io_handler *hdlr,
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struct vm *vm, ioport_t addr, size_t width, uint32_t v)
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struct vm *vm, uint16_t addr, size_t width, uint32_t v)
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{
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uint32_t val = v;
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@ -879,7 +879,7 @@ static int vpic_elc_handler(struct vm *vm, bool in, int port, int bytes,
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}
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static uint32_t vpic_elc_io_read(__unused struct vm_io_handler *hdlr,
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struct vm *vm, ioport_t addr, size_t width)
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struct vm *vm, uint16_t addr, size_t width)
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{
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uint32_t val = 0;
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@ -889,7 +889,7 @@ static uint32_t vpic_elc_io_read(__unused struct vm_io_handler *hdlr,
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}
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static void vpic_elc_io_write(__unused struct vm_io_handler *hdlr,
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struct vm *vm, ioport_t addr, size_t width, uint32_t v)
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struct vm *vm, uint16_t addr, size_t width, uint32_t v)
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{
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uint32_t val = v;
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@ -158,10 +158,9 @@ union lapic_base_msr {
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struct lapic_info {
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int init_status;
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struct {
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paddr_t paddr;
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vaddr_t vaddr;
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uint64_t paddr;
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void *vaddr;
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} xapic;
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};
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static struct lapic_info lapic_info;
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@ -171,7 +170,7 @@ static inline uint32_t read_lapic_reg32(uint32_t offset)
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if (offset < 0x20 || offset > 0x3ff)
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return 0;
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return mmio_read_long(lapic_info.xapic.vaddr + offset);
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return mmio_read_long((uint64_t)lapic_info.xapic.vaddr + offset);
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}
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inline void write_lapic_reg32(uint32_t offset, uint32_t value)
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@ -179,7 +178,7 @@ inline void write_lapic_reg32(uint32_t offset, uint32_t value)
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if (offset < 0x20 || offset > 0x3ff)
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return;
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mmio_write_long(value, lapic_info.xapic.vaddr + offset);
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mmio_write_long(value, (uint64_t)lapic_info.xapic.vaddr + offset);
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}
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static void clear_lapic_isr(void)
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@ -205,7 +204,7 @@ static void map_lapic(void)
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/* At some point we may need to translate this paddr to a vaddr. 1:1
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* mapping for now.
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*/
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lapic_info.xapic.vaddr = lapic_info.xapic.paddr;
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lapic_info.xapic.vaddr = (void *)lapic_info.xapic.paddr;
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}
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int early_init_lapic(void)
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@ -324,7 +323,7 @@ uint32_t get_cur_lapic_id(void)
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int
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send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,
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uint32_t cpu_startup_dest, paddr_t cpu_startup_start_address)
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uint32_t cpu_startup_dest, uint64_t cpu_startup_start_address)
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{
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union apic_icr icr;
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uint8_t shorthand;
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@ -372,7 +371,7 @@ send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,
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icr.value_32.lo_32 = 0;
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icr.bits.shorthand = shorthand;
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icr.bits.delivery_mode = INTR_LAPIC_ICR_STARTUP;
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icr.bits.vector = ((paddr_t) cpu_startup_start_address) >> 12;
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icr.bits.vector = ((uint64_t) cpu_startup_start_address) >> 12;
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write_lapic_reg32(LAPIC_INT_COMMAND_REGISTER_0, icr.value_32.lo_32);
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wait_for_delivery();
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@ -208,14 +208,14 @@ static void deny_guest_io_access(struct vm *vm, uint32_t address, uint32_t nbyte
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static uint32_t
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default_io_read(__unused struct vm_io_handler *hdlr, __unused struct vm *vm,
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ioport_t address, size_t width)
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uint16_t address, size_t width)
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{
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uint32_t v = io_read(address, width);
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return v;
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}
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static void default_io_write(__unused struct vm_io_handler *hdlr,
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__unused struct vm *vm, ioport_t addr,
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__unused struct vm *vm, uint16_t addr,
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size_t width, uint32_t v)
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{
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io_write(v, addr, width);
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@ -82,7 +82,7 @@ static uint64_t map_ioapic(
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/* At some point we may need to translate this paddr to a vaddr.
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* 1:1 mapping for now.
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*/
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return (vaddr_t) ioapic_paddr;
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return ioapic_paddr;
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}
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static inline uint32_t
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@ -38,8 +38,6 @@
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#define _MULTIBOOT_H
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#include <stdint.h>
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//typedef uintptr_t uint32_t;
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typedef uintptr_t vaddr_t;
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struct multiboot_info;
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extern struct multiboot_info mbi;
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@ -90,7 +90,7 @@ int sipi_from_efi_boot_service_exit(uint32_t dest, uint32_t mode, uint32_t vec)
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if (mode == APIC_DELMODE_STARTUP) {
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uint32_t cpu_id = cpu_find_logical_id(dest);
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send_startup_ipi(INTR_CPU_STARTUP_USE_DEST,
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cpu_id, (paddr_t)(vec<<12));
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cpu_id, (uint64_t)(vec<<12));
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efi_wake_up_ap_bitmap |= 1 << dest;
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}
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@ -108,7 +108,7 @@ void efi_deferred_wakeup_pcpu(int cpu_id)
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expected_up = up_count + 1;
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send_startup_ipi(INTR_CPU_STARTUP_USE_DEST,
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cpu_id, (paddr_t)cpu_secondary_reset);
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cpu_id, (uint64_t)cpu_secondary_reset);
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timeout = CPU_UP_TIMEOUT * 1000;
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@ -171,7 +171,7 @@ void console_dump_bytes(const void *p, unsigned int len)
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/* dump all bytes */
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while (x < e) {
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/* write the address of the first byte in the row */
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printf("%08x: ", (vaddr_t) x);
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printf("%08x: ", (uint64_t) x);
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/* print one row (16 bytes) as hexadecimal values */
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for (i = 0; i < 16; i++)
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printf("%02x ", x[i]);
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@ -153,7 +153,7 @@ struct uart_config {
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*/
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struct tgt_uart {
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char uart_id[SERIAL_ID_MAX_LENGTH];
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mmio_addr_t base_address;
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uint64_t base_address;
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uint32_t clock_frequency;
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uint32_t buffer_size;
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unsigned int open_count;
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@ -88,26 +88,22 @@ enum UART_REG_IDX{
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#define UART_CLOCK_RATE CPU_OSC_CLOCK
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#define UART_BUFFER_SIZE 2048
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static inline uint32_t uart16550_read_reg(uint32_t base, uint32_t reg_idx)
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static inline uint32_t uart16550_read_reg(uint64_t base, uint32_t reg_idx)
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{
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if (serial_port_mapped) {
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return io_read_byte((ioport_t)
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((uint8_t *)(uint64_t)base + reg_idx));
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return io_read_byte((uint16_t)base + reg_idx);
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} else {
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return mmio_read_long((mmio_addr_t)
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((uint32_t *)(uint64_t)base + reg_idx));
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return mmio_read_long((uint64_t)((uint32_t*)base + reg_idx));
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}
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}
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static inline void uart16550_write_reg(uint32_t base,
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static inline void uart16550_write_reg(uint64_t base,
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uint32_t val, uint32_t reg_idx)
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{
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if (serial_port_mapped) {
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io_write_byte(val, (ioport_t)
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((uint8_t *)(uint64_t)base + reg_idx));
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io_write_byte(val, (uint16_t)base + reg_idx);
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} else {
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mmio_write_long(val, (mmio_addr_t)
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((uint32_t *)(uint64_t)base + reg_idx));
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mmio_write_long(val, (uint64_t)((uint32_t*)base + reg_idx));
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}
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}
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@ -153,7 +153,7 @@ static void uart_toggle_intr(struct vuart *vu)
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}
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static void uart_write(__unused struct vm_io_handler *hdlr,
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struct vm *vm, ioport_t offset,
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struct vm *vm, uint16_t offset,
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__unused size_t width, uint32_t value)
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{
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struct vuart *vu = vm_vuart(vm);
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@ -231,7 +231,7 @@ done:
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}
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static uint32_t uart_read(__unused struct vm_io_handler *hdlr,
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struct vm *vm, ioport_t offset,
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struct vm *vm, uint16_t offset,
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__unused size_t width)
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{
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char iir, intr_reason, reg;
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@ -83,7 +83,7 @@ static inline uint32_t io_read_long(uint16_t port)
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return value;
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}
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static inline void io_write(uint32_t v, ioport_t addr, size_t sz)
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static inline void io_write(uint32_t v, uint16_t addr, size_t sz)
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{
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if (sz == 1)
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io_write_byte(v, addr);
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@ -93,7 +93,7 @@ static inline void io_write(uint32_t v, ioport_t addr, size_t sz)
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io_write_long(v, addr);
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}
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static inline uint32_t io_read(ioport_t addr, size_t sz)
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static inline uint32_t io_read(uint16_t addr, size_t sz)
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{
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if (sz == 1)
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return io_read_byte(addr);
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@ -108,17 +108,17 @@ struct vcpu;
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typedef
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uint32_t (*io_read_fn_t)(struct vm_io_handler *, struct vm *,
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ioport_t, size_t);
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uint16_t, size_t);
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typedef
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void (*io_write_fn_t)(struct vm_io_handler *, struct vm *,
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ioport_t, size_t, uint32_t);
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uint16_t, size_t, uint32_t);
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/* Describes a single IO handler description entry. */
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struct vm_io_handler_desc {
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/** The base address of the IO range for this description. */
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ioport_t addr;
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uint16_t addr;
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/** The number of bytes covered by this description. */
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size_t len;
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@ -180,7 +180,7 @@ int dm_emulate_pio_post(struct vcpu *vcpu);
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* @param value The 32 bit value to write.
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* @param addr The memory address to write to.
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*/
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static inline void mmio_write_long(uint32_t value, mmio_addr_t addr)
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static inline void mmio_write_long(uint32_t value, uint64_t addr)
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{
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*((uint32_t *)addr) = value;
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}
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@ -190,7 +190,7 @@ static inline void mmio_write_long(uint32_t value, mmio_addr_t addr)
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* @param value The 16 bit value to write.
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* @param addr The memory address to write to.
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*/
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static inline void mmio_write_word(uint32_t value, mmio_addr_t addr)
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static inline void mmio_write_word(uint32_t value, uint64_t addr)
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{
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*((uint16_t *)addr) = value;
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}
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@ -200,7 +200,7 @@ static inline void mmio_write_word(uint32_t value, mmio_addr_t addr)
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* @param value The 8 bit value to write.
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* @param addr The memory address to write to.
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*/
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static inline void mmio_write_byte(uint32_t value, mmio_addr_t addr)
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static inline void mmio_write_byte(uint32_t value, uint64_t addr)
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{
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*((uint8_t *)addr) = value;
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}
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@ -211,7 +211,7 @@ static inline void mmio_write_byte(uint32_t value, mmio_addr_t addr)
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*
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* @return The 32 bit value read from the given address.
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*/
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static inline uint32_t mmio_read_long(mmio_addr_t addr)
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static inline uint32_t mmio_read_long(uint64_t addr)
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{
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return *((uint32_t *)addr);
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}
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@ -222,7 +222,7 @@ static inline uint32_t mmio_read_long(mmio_addr_t addr)
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*
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* @return The 16 bit value read from the given address.
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*/
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static inline uint16_t mmio_read_word(mmio_addr_t addr)
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static inline uint16_t mmio_read_word(uint64_t addr)
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{
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return *((uint16_t *)addr);
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}
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@ -233,7 +233,7 @@ static inline uint16_t mmio_read_word(mmio_addr_t addr)
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*
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* @return The 8 bit value read from the given address.
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*/
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static inline uint8_t mmio_read_byte(mmio_addr_t addr)
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static inline uint8_t mmio_read_byte(uint64_t addr)
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{
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return *((uint8_t *)addr);
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}
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@ -245,7 +245,7 @@ static inline uint8_t mmio_read_byte(mmio_addr_t addr)
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* location.
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* @param addr The memory address to read from/write to.
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*/
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static inline void mmio_or_long(uint32_t mask, mmio_addr_t addr)
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static inline void mmio_or_long(uint32_t mask, uint64_t addr)
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{
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*((uint32_t *)addr) |= mask;
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}
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@ -257,7 +257,7 @@ static inline void mmio_or_long(uint32_t mask, mmio_addr_t addr)
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* location.
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* @param addr The memory address to read from/write to.
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*/
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static inline void mmio_or_word(uint32_t mask, mmio_addr_t addr)
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static inline void mmio_or_word(uint32_t mask, uint64_t addr)
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{
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*((uint16_t *)addr) |= mask;
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}
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@ -269,7 +269,7 @@ static inline void mmio_or_word(uint32_t mask, mmio_addr_t addr)
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* location.
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* @param addr The memory address to read from/write to.
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*/
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static inline void mmio_or_byte(uint32_t mask, mmio_addr_t addr)
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static inline void mmio_or_byte(uint32_t mask, uint64_t addr)
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{
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*((uint8_t *)addr) |= mask;
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}
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@ -281,7 +281,7 @@ static inline void mmio_or_byte(uint32_t mask, mmio_addr_t addr)
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* location.
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* @param addr The memory address to read from/write to.
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*/
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static inline void mmio_and_long(uint32_t mask, mmio_addr_t addr)
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static inline void mmio_and_long(uint32_t mask, uint64_t addr)
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{
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*((uint32_t *)addr) &= ~mask;
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}
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@ -293,7 +293,7 @@ static inline void mmio_and_long(uint32_t mask, mmio_addr_t addr)
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* location.
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* @param addr The memory address to read from/write to.
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*/
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static inline void mmio_and_word(uint32_t mask, mmio_addr_t addr)
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static inline void mmio_and_word(uint32_t mask, uint64_t addr)
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{
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*((uint16_t *)addr) &= ~mask;
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}
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@ -305,7 +305,7 @@ static inline void mmio_and_word(uint32_t mask, mmio_addr_t addr)
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* location.
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* @param addr The memory address to read from/write to.
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*/
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static inline void mmio_and_byte(uint32_t mask, mmio_addr_t addr)
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static inline void mmio_and_byte(uint32_t mask, uint64_t addr)
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{
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*((uint8_t *)addr) &= ~mask;
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}
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@ -323,7 +323,7 @@ static inline void mmio_and_byte(uint32_t mask, mmio_addr_t addr)
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* mask are cleared at the memory address.
|
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* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void mmio_rmw_long(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
static inline void mmio_rmw_long(uint32_t set, uint32_t clear, uint64_t addr)
|
||||
{
|
||||
*((uint32_t *)addr) =
|
||||
(*((uint32_t *)addr) & ~clear) | set;
|
||||
@ -342,7 +342,7 @@ static inline void mmio_rmw_long(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
* mask are cleared at the memory address.
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void mmio_rmw_word(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
static inline void mmio_rmw_word(uint32_t set, uint32_t clear, uint64_t addr)
|
||||
{
|
||||
*((uint16_t *)addr) =
|
||||
(*((uint16_t *)addr) & ~clear) | set;
|
||||
@ -361,7 +361,7 @@ static inline void mmio_rmw_word(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
* mask are cleared at the memory address.
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void mmio_rmw_byte(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
static inline void mmio_rmw_byte(uint32_t set, uint32_t clear, uint64_t addr)
|
||||
{
|
||||
*((uint8_t *)addr) = (*((uint8_t *)addr) & ~clear) | set;
|
||||
}
|
||||
@ -371,7 +371,7 @@ static inline void mmio_rmw_byte(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
* @param value The 32 bit value to write.
|
||||
* @param addr The memory address to write to.
|
||||
*/
|
||||
static inline void __mmio_write_long(uint32_t value, mmio_addr_t addr)
|
||||
static inline void __mmio_write_long(uint32_t value, uint64_t addr)
|
||||
{
|
||||
*((uint32_t *)addr) = value;
|
||||
}
|
||||
@ -381,7 +381,7 @@ static inline void __mmio_write_long(uint32_t value, mmio_addr_t addr)
|
||||
* @param value The 16 bit value to write.
|
||||
* @param addr The memory address to write to.
|
||||
*/
|
||||
static inline void __mmio_write_word(uint32_t value, mmio_addr_t addr)
|
||||
static inline void __mmio_write_word(uint32_t value, uint64_t addr)
|
||||
{
|
||||
*((uint16_t *)addr) = value;
|
||||
}
|
||||
@ -391,7 +391,7 @@ static inline void __mmio_write_word(uint32_t value, mmio_addr_t addr)
|
||||
* @param value The 8 bit value to write.
|
||||
* @param addr The memory address to write to.
|
||||
*/
|
||||
static inline void __mmio_write_byte(uint32_t value, mmio_addr_t addr)
|
||||
static inline void __mmio_write_byte(uint32_t value, uint64_t addr)
|
||||
{
|
||||
*((uint8_t *)addr) = value;
|
||||
}
|
||||
@ -402,7 +402,7 @@ static inline void __mmio_write_byte(uint32_t value, mmio_addr_t addr)
|
||||
*
|
||||
* @return The 32 bit value read from the given address.
|
||||
*/
|
||||
static inline uint32_t __mmio_read_long(mmio_addr_t addr)
|
||||
static inline uint32_t __mmio_read_long(uint64_t addr)
|
||||
{
|
||||
return *((uint32_t *)addr);
|
||||
}
|
||||
@ -413,7 +413,7 @@ static inline uint32_t __mmio_read_long(mmio_addr_t addr)
|
||||
*
|
||||
* @return The 16 bit value read from the given address.
|
||||
*/
|
||||
static inline uint16_t __mmio_read_word(mmio_addr_t addr)
|
||||
static inline uint16_t __mmio_read_word(uint64_t addr)
|
||||
{
|
||||
return *((uint16_t *)addr);
|
||||
}
|
||||
@ -424,7 +424,7 @@ static inline uint16_t __mmio_read_word(mmio_addr_t addr)
|
||||
*
|
||||
* @return The 32 16 value read from the given address.
|
||||
*/
|
||||
static inline uint8_t __mmio_read_byte(mmio_addr_t addr)
|
||||
static inline uint8_t __mmio_read_byte(uint64_t addr)
|
||||
{
|
||||
return *((uint8_t *)addr);
|
||||
}
|
||||
@ -436,7 +436,7 @@ static inline uint8_t __mmio_read_byte(mmio_addr_t addr)
|
||||
* location.
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void __mmio_or_long(uint32_t mask, mmio_addr_t addr)
|
||||
static inline void __mmio_or_long(uint32_t mask, uint64_t addr)
|
||||
{
|
||||
*((uint32_t *)addr) |= mask;
|
||||
}
|
||||
@ -448,7 +448,7 @@ static inline void __mmio_or_long(uint32_t mask, mmio_addr_t addr)
|
||||
* location.
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void __mmio_or_word(uint32_t mask, mmio_addr_t addr)
|
||||
static inline void __mmio_or_word(uint32_t mask, uint64_t addr)
|
||||
{
|
||||
*((uint16_t *)addr) |= mask;
|
||||
}
|
||||
@ -460,7 +460,7 @@ static inline void __mmio_or_word(uint32_t mask, mmio_addr_t addr)
|
||||
* location.
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void __mmio_or_byte(uint32_t mask, mmio_addr_t addr)
|
||||
static inline void __mmio_or_byte(uint32_t mask, uint64_t addr)
|
||||
{
|
||||
*((uint8_t *)addr) |= mask;
|
||||
}
|
||||
@ -472,7 +472,7 @@ static inline void __mmio_or_byte(uint32_t mask, mmio_addr_t addr)
|
||||
* location.
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void __mmio_and_long(uint32_t mask, mmio_addr_t addr)
|
||||
static inline void __mmio_and_long(uint32_t mask, uint64_t addr)
|
||||
{
|
||||
*((uint32_t *)addr) &= ~mask;
|
||||
}
|
||||
@ -484,7 +484,7 @@ static inline void __mmio_and_long(uint32_t mask, mmio_addr_t addr)
|
||||
* location.
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void __mmio_and_word(uint32_t mask, mmio_addr_t addr)
|
||||
static inline void __mmio_and_word(uint32_t mask, uint64_t addr)
|
||||
{
|
||||
*((uint16_t *)addr) &= ~mask;
|
||||
}
|
||||
@ -496,7 +496,7 @@ static inline void __mmio_and_word(uint32_t mask, mmio_addr_t addr)
|
||||
* location.
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void __mmio_and_byte(uint32_t mask, mmio_addr_t addr)
|
||||
static inline void __mmio_and_byte(uint32_t mask, uint64_t addr)
|
||||
{
|
||||
*((uint8_t *)addr) &= ~mask;
|
||||
}
|
||||
@ -516,7 +516,7 @@ static inline void __mmio_and_byte(uint32_t mask, mmio_addr_t addr)
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void
|
||||
__mmio_rmw_long(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
__mmio_rmw_long(uint32_t set, uint32_t clear, uint64_t addr)
|
||||
{
|
||||
*((uint32_t *)addr) =
|
||||
(*((uint32_t *)addr) & ~clear) | set;
|
||||
@ -537,7 +537,7 @@ __mmio_rmw_long(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void
|
||||
__mmio_rmw_word(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
__mmio_rmw_word(uint32_t set, uint32_t clear, uint64_t addr)
|
||||
{
|
||||
*((uint16_t *)addr) =
|
||||
(*((uint16_t *)addr) & ~clear) | set;
|
||||
@ -558,7 +558,7 @@ __mmio_rmw_word(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
* @param addr The memory address to read from/write to.
|
||||
*/
|
||||
static inline void
|
||||
__mmio_rmw_byte(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
__mmio_rmw_byte(uint32_t set, uint32_t clear, uint64_t addr)
|
||||
{
|
||||
*((uint8_t *)addr) = (*((uint8_t *)addr) & ~clear) | set;
|
||||
}
|
||||
@ -570,7 +570,7 @@ __mmio_rmw_byte(uint32_t set, uint32_t clear, mmio_addr_t addr)
|
||||
* @param mask The mask to apply to the value read.
|
||||
* @param value The 32 bit value to write.
|
||||
*/
|
||||
static inline void setl(mmio_addr_t addr, uint32_t mask, uint32_t value)
|
||||
static inline void setl(uint64_t addr, uint32_t mask, uint32_t value)
|
||||
{
|
||||
mmio_write_long((mmio_read_long(addr) & ~mask) | value, addr);
|
||||
}
|
||||
@ -582,7 +582,7 @@ static inline void setl(mmio_addr_t addr, uint32_t mask, uint32_t value)
|
||||
* @param mask The mask to apply to the value read.
|
||||
* @param value The 16 bit value to write.
|
||||
*/
|
||||
static inline void setw(mmio_addr_t addr, uint32_t mask, uint32_t value)
|
||||
static inline void setw(uint64_t addr, uint32_t mask, uint32_t value)
|
||||
{
|
||||
mmio_write_word((mmio_read_word(addr) & ~mask) | value, addr);
|
||||
}
|
||||
@ -594,7 +594,7 @@ static inline void setw(mmio_addr_t addr, uint32_t mask, uint32_t value)
|
||||
* @param mask The mask to apply to the value read.
|
||||
* @param value The 8 bit value to write.
|
||||
*/
|
||||
static inline void setb(mmio_addr_t addr, uint32_t mask, uint32_t value)
|
||||
static inline void setb(uint64_t addr, uint32_t mask, uint32_t value)
|
||||
{
|
||||
mmio_write_byte((mmio_read_byte(addr) & ~mask) | value, addr);
|
||||
}
|
||||
|
@ -187,7 +187,7 @@ int send_lapic_eoi(void);
|
||||
uint32_t get_cur_lapic_id(void);
|
||||
int send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,
|
||||
uint32_t cpu_startup_dest,
|
||||
paddr_t cpu_startup_start_address);
|
||||
uint64_t cpu_startup_start_address);
|
||||
/* API to send an IPI to a single guest */
|
||||
void send_single_ipi(uint32_t pcpu_id, uint32_t vector);
|
||||
|
||||
|
@ -58,10 +58,6 @@ typedef unsigned int uint32_t;
|
||||
typedef unsigned long uint64_t;
|
||||
typedef signed long int64_t;
|
||||
typedef unsigned int size_t;
|
||||
typedef unsigned long mmio_addr_t;
|
||||
typedef unsigned long vaddr_t;
|
||||
typedef unsigned long paddr_t;
|
||||
typedef unsigned long ioport_t;
|
||||
typedef __builtin_va_list va_list;
|
||||
|
||||
typedef uint8_t bool;
|
||||
|
Loading…
Reference in New Issue
Block a user