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hv: nested: setup emulated VMX MSRs

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We emulated these MSRs:

- MSR_IA32_VMX_PINBASED_CTLS
- MSR_IA32_VMX_PROCBASED_CTLS
- MSR_IA32_VMX_PROCBASED_CTLS2
- MSR_IA32_VMX_EXIT_CTLS
- MSR_IA32_VMX_ENTRY_CTLS
- MSR_IA32_VMX_BASIC: emulate VMCS revision ID, etc.
- MSR_IA32_VMX_MISC

For the following MSRs, we pass through the physical value to L1 guests:

- MSR_IA32_VMX_EPT_VPID_CAP
- MSR_IA32_VMX_VMCS_ENUM
- MSR_IA32_VMX_CR0_FIXED0
- MSR_IA32_VMX_CR0_FIXED1
- MSR_IA32_VMX_CR4_FIXED0
- MSR_IA32_VMX_CR4_FIXED1

Tracked-On: #5923
Signed-off-by: Zide Chen <zide.chen@intel.com>
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Zide Chen
2021-05-12 20:51:55 -07:00
committed by wenlingz
parent 4930992118
commit c9982e8c7e
3 changed files with 192 additions and 7 deletions
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15
hypervisor/include/arch/x86/asm/guest/nested.h
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@@ -8,6 +8,15 @@
#include <lib/errno.h>
/* helper data structure to make VMX capability MSR manipulation easier */
union value_64 {
uint64_t full;
struct {
uint32_t lo_32;
uint32_t hi_32;
} u;
};
/*
* Following MSRs are supported if nested virtualization is enabled
* - If CONFIG_NVMX_ENABLED is set, these MSRs are included in emulated_guest_msrs[]
@@ -36,6 +45,12 @@
MSR_IA32_VMX_VMFUNC, \
MSR_IA32_VMX_PROCBASED_CTLS3
/*
* This VMCS12 revision id is chosen arbitrarily.
* The emulated MSR_IA32_VMX_BASIC returns this ID in bits 30:0.
*/
#define VMCS12_REVISION_ID 0x15407E12U
#ifdef CONFIG_NVMX_ENABLED
bool is_vmx_msr(uint32_t msr);
void init_vmx_msrs(struct acrn_vcpu *vcpu);

5
hypervisor/include/arch/x86/asm/vmx.h
View File

@@ -314,10 +314,15 @@
#define VMX_PROCBASED_CTLS2_INVPCID (1U<<12U)
#define VMX_PROCBASED_CTLS2_VM_FUNCS (1U<<13U)
#define VMX_PROCBASED_CTLS2_VMCS_SHADW (1U<<14U)
#define VMX_PROCBASED_CTLS2_ENCLS_EXIT (1U<<15U)
#define VMX_PROCBASED_CTLS2_RDSEED (1U<<16U)
#define VMX_PROCBASED_CTLS2_PML (1U<<17U)
#define VMX_PROCBASED_CTLS2_EPT_VE (1U<<18U)
#define VMX_PROCBASED_CTLS2_XSVE_XRSTR (1U<<20U)
#define VMX_PROCBASED_CTLS2_PT_USE_GPA (1U<<22U)
#define VMX_PROCBASED_CTLS2_TSC_SCALING (1U<<25U)
#define VMX_PROCBASED_CTLS2_UWAIT_PAUSE (1U<<26U)
#define VMX_PROCBASED_CTLS2_ENCLV_EXIT (1U<<28U)
#define VMX_PROCBASED_CTLS3_LOADIWKEY (1U<<0U)
/* MSR_IA32_VMX_EPT_VPID_CAP: EPT and VPID capability bits */