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hv: uart: enable early boot uart

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Enable uart as early as possible to make things easier for debugging.
After this we could use printf to output information to the uart. As for
pr_xxx APIs, they start to work when init_logmsg is called.

Tracked-On: #2987
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
This commit is contained in:
Li, Fei1
2019-07-24 17:50:27 +08:00
committed by ACRN System Integration
parent 3945bc4c40
commit cc47dbe769
6 changed files with 26 additions and 9 deletions
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2
hypervisor/debug/console.c
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@@ -24,7 +24,7 @@ uint16_t console_vmid = ACRN_INVALID_VMID;
void console_init(void)
{
uart16550_init();
uart16550_init(false);
}
void console_putc(const char *ch)

11
hypervisor/debug/uart16550.c
View File

@@ -131,12 +131,17 @@ static void uart16550_set_baud_rate(uint32_t baud_rate)
uart16550_write_reg(uart, temp_reg, UART16550_LCR);
}
void uart16550_init(void)
void uart16550_init(bool eraly_boot)
{
if (!uart.enabled) {
return;
}
if (!eraly_boot && !uart.serial_port_mapped) {
hv_access_memory_region_update((uint64_t)uart.mmio_base_vaddr, PDE_SIZE);
return;
}
/* if configure serial PCI BDF, get its base MMIO address */
if (!uart.serial_port_mapped) {
serial_pci_bdf.value = get_pci_bdf_value(pci_bdf_info);
@@ -144,10 +149,6 @@ void uart16550_init(void)
hpa2hva(pci_pdev_read_cfg(serial_pci_bdf, pci_bar_offset(0), 4U) & PCIM_BAR_MEM_BASE);
}
if (!uart.serial_port_mapped) {
hv_access_memory_region_update((uint64_t)uart.mmio_base_vaddr, PDE_SIZE);
}
spinlock_init(&uart.rx_lock);
spinlock_init(&uart.tx_lock);
/* Enable TX and RX FIFOs */