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HV:treewide:Cleanup the type for parameters of bitmap

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operations

For reducing sign conversion in hypervisor:
Update parameters of bitmap operations as unsigned type;
Update the input of related caller as unsigned type when the
caller's input parameter is const variable or the variable is
only used by bitmap operations.

V1-->V2:
        (1) Explicit casting for the first parameter
            of all bitmap operations;
        (2) Remove mask operation for explicit casting
            of all bitmap operations, since masking is
            useless. Otherwise, this trucation is dangerous.
V2-->V3:
        (1) Explicit casting for all bitmap operations parameter;
        (2) Masking bit offset with 6-bit;
        (3) Add few comments about bit offset.
V3-->V4:
        add '\' for some statement of bitmap macro

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Xiangyang Wu 2018-06-30 00:17:34 +08:00 committed by lijinxia
parent 25eae47836
commit cc50165018
7 changed files with 40 additions and 26 deletions
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2
hypervisor/arch/x86/cpu.c
View File

@ -541,7 +541,7 @@ static void bsp_boot_post(void)
start_cpus();
/* Trigger event to allow secondary CPUs to continue */
__bitmap_set(0, &pcpu_sync);
__bitmap_set(0U, &pcpu_sync);
ASSERT(get_cpu_id() == CPU_BOOT_ID, "");

2
hypervisor/arch/x86/guest/vcpu.c
View File

@ -387,7 +387,7 @@ int prepare_vcpu(struct vm *vm, uint16_t pcpu_id)
return ret;
}
void request_vcpu_pre_work(struct vcpu *vcpu, int pre_work_id)
void request_vcpu_pre_work(struct vcpu *vcpu, uint16_t pre_work_id)
{
bitmap_set(pre_work_id, &vcpu->pending_pre_work);
}

2
hypervisor/include/arch/x86/cpu.h
View File

@ -130,7 +130,7 @@
#define CPU_MHZ_TO_KHZ 1000
/* Boot CPU ID */
#define CPU_BOOT_ID 0
#define CPU_BOOT_ID 0U
/* CPU states defined */
#define CPU_STATE_RESET 0

2
hypervisor/include/arch/x86/guest/vcpu.h
View File

@ -287,7 +287,7 @@ void resume_vcpu(struct vcpu *vcpu);
void schedule_vcpu(struct vcpu *vcpu);
int prepare_vcpu(struct vm *vm, uint16_t pcpu_id);
void request_vcpu_pre_work(struct vcpu *vcpu, int pre_work_id);
void request_vcpu_pre_work(struct vcpu *vcpu, uint16_t pre_work_id);
#endif

2
hypervisor/include/arch/x86/softirq.h
View File

@ -13,7 +13,7 @@
#define SOFTIRQ_MASK ((1UL<<SOFTIRQ_MAX)-1)
/* used for atomic value for prevent recursive */
#define SOFTIRQ_ATOMIC 63
#define SOFTIRQ_ATOMIC 63U
void enable_softirq(uint16_t cpu_id);
void disable_softirq(uint16_t cpu_id);

4
hypervisor/include/common/schedule.h
View File

@ -7,8 +7,8 @@
#ifndef _HV_CORE_SCHEDULE_
#define _HV_CORE_SCHEDULE_
#define NEED_RESCHEDULE (1)
#define NEED_OFFLINE (2)
#define NEED_RESCHEDULE (1U)
#define NEED_OFFLINE (2U)
struct sched_context {
spinlock_t runqueue_lock;

52
hypervisor/include/lib/bits.h
View File

@ -143,13 +143,16 @@ static inline int clz64(unsigned long value)
/*
* (*addr) |= (1UL<<nr);
* Note:Input parameter nr shall be less than 64.
* If nr>=64, it will be truncated.
*/
#define build_bitmap_set(name, lock, nr, addr) \
static inline void name(int nr, volatile unsigned long *addr) \
static inline void name(uint16_t nr, volatile uint64_t *addr) \
{ \
asm volatile(lock "orq %1,%0" \
nr = nr & 0x3fU; \
asm volatile(lock "orq %q1,%0" \
: "+m" (*addr) \
: "r" (1UL<<nr) \
: "r" ((1UL<<(uint64_t)nr)) \
: "cc", "memory"); \
}
build_bitmap_set(__bitmap_set, "", nr, addr)
@ -157,13 +160,16 @@ build_bitmap_set(bitmap_set, BUS_LOCK, nr, addr)
/*
* (*addr) &= ~(1UL<<nr);
* Note:Input parameter nr shall be less than 64.
* If nr>=64, it will be truncated.
*/
#define build_bitmap_clear(name, lock, nr, addr) \
static inline void name(int nr, volatile unsigned long *addr) \
static inline void name(uint16_t nr, volatile uint64_t *addr) \
{ \
asm volatile(lock "andq %1,%0" \
nr = nr & 0x3fU; \
asm volatile(lock "andq %q1,%0" \
: "+m" (*addr) \
: "r" (~(1UL<<nr)) \
: "r" ((~(1UL<<(uint64_t)nr))) \
: "cc", "memory"); \
}
build_bitmap_clear(__bitmap_clear, "", nr, addr)
@ -171,14 +177,16 @@ build_bitmap_clear(bitmap_clear, BUS_LOCK, nr, addr)
/*
* return !!((*addr) & (1UL<<nr));
* Note:Input parameter nr shall be less than 64. If nr>=64, it will
* be truncated.
*/
static inline bool bitmap_test(int nr, volatile unsigned long *addr)
static inline bool bitmap_test(uint16_t nr, volatile uint64_t *addr)
{
int32_t ret;
asm volatile("btq %2,%1\n\tsbbl %0, %0"
int32_t ret=0;
nr = nr & 0x3fU;
asm volatile("btq %q2,%1\n\tsbbl %0, %0"
: "=r" (ret), "=m" (*addr)
: "r" ((long)(nr & 0x3f))
: "r" ((uint64_t)nr)
: "cc", "memory");
return (ret != 0);
}
@ -187,14 +195,17 @@ static inline bool bitmap_test(int nr, volatile unsigned long *addr)
* bool ret = (*addr) & (1UL<<nr);
* (*addr) |= (1UL<<nr);
* return ret;
* Note:Input parameter nr shall be less than 64. If nr>=64, it
* will be truncated.
*/
#define build_bitmap_testandset(name, lock, nr, addr) \
static inline bool name(int nr, volatile unsigned long *addr) \
static inline bool name(uint16_t nr, volatile uint64_t *addr) \
{ \
int32_t ret; \
asm volatile(lock "btsq %2,%1\n\tsbbl %0,%0" \
int32_t ret=0; \
nr = nr & 0x3fU; \
asm volatile(lock "btsq %q2,%1\n\tsbbl %0,%0" \
: "=r" (ret), "=m" (*addr) \
: "r" ((long)(nr & 0x3f)) \
: "r" ((uint64_t)nr) \
: "cc", "memory"); \
return (ret != 0); \
}
@ -205,14 +216,17 @@ build_bitmap_testandset(bitmap_test_and_set, BUS_LOCK, nr, addr)
* bool ret = (*addr) & (1UL<<nr);
* (*addr) &= ~(1UL<<nr);
* return ret;
* Note:Input parameter nr shall be less than 64. If nr>=64,
* it will be truncated.
*/
#define build_bitmap_testandclear(name, lock, nr, addr) \
static inline bool name(int nr, volatile unsigned long *addr) \
static inline bool name(uint16_t nr, volatile uint64_t *addr) \
{ \
int32_t ret; \
asm volatile(lock "btrq %2,%1\n\tsbbl %0,%0" \
int32_t ret=0; \
nr = nr & 0x3fU; \
asm volatile(lock "btrq %q2,%1\n\tsbbl %0,%0" \
: "=r" (ret), "=m" (*addr) \
: "r" ((long)(nr & 0x3f)) \
: "r" ((uint64_t)nr) \
: "cc", "memory"); \
return (ret != 0); \
}