config_tools/target: generate Software SRAM related info

This patch parsees physical RTCT entries and dump information about pseudo
RAM into the board XML files. A macro named PRE_RTVM_SW_SRAM_BASE_GPA is
added to the generated misc_cfg.h according to recent design changes.

This patch still writes the board XML file manually, following the
convention of the current framework. Using XML-based approach requires a
complete refinement of the current generation process as the root
`acrn-config` node has its own text among adjacent children.

Tracked-On: #5649
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This commit is contained in:
Junjie Mao
2021-01-27 13:02:26 +08:00
committed by wenlingz
parent ba02583f2d
commit daf495bfc8
4 changed files with 86 additions and 0 deletions

View File

@@ -4,6 +4,7 @@
#
import common
import lxml.etree
import board_cfg_lib
import scenario_cfg_lib
@@ -181,6 +182,15 @@ def pt_intx_num_vm0_gen(config):
print("", file=config)
def swsram_base_gpa_gen(config):
board_etree = lxml.etree.parse(common.BOARD_INFO_FILE)
bases = board_etree.xpath("//RTCT/SoftwareSRAM/base")
if bases:
min_base = min(map(lambda x: int(x.text, 16), bases))
print("#define PRE_RTVM_SW_SRAM_BASE_GPA\t{}UL".format(hex(min_base)), file=config)
print("", file=config)
def generate_file(config):
"""
Start to generate board.c
@@ -388,6 +398,8 @@ def generate_file(config):
pt_intx_num_vm0_gen(config)
swsram_base_gpa_gen(config)
print("{}".format(MISC_CFG_END), file=config)
return err_dic