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hv: remove CONFIG_HV_RAM_SIZE

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It's difficult to configure CONFIG_HV_RAM_SIZE properly at once. This patch
not only remove CONFIG_HV_RAM_SIZE, but also we use ld linker script to
dynamically get the size of HV RAM size.

Tracked-On: #6663
Signed-off-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Fei Li 2021-10-12 16:23:33 +08:00 committed by wenlingz
parent 7c2c3ad636
commit df7ffab441
8 changed files with 19 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
hypervisor/arch/x86/cpu.c
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@ -472,7 +472,7 @@ void cpu_dead(void)
vmx_off();
stac();
flush_cache_range((void *)get_hv_image_base(), CONFIG_HV_RAM_SIZE);
flush_cache_range((void *)get_hv_image_base(), get_hv_ram_size());
clac();
/* Set state to show CPU is dead */

2
hypervisor/arch/x86/guest/ve820.c
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@ -139,7 +139,7 @@ void create_sos_vm_e820(struct acrn_vm *vm)
{
uint16_t vm_id, i;
uint64_t hv_start_pa = hva2hpa((void *)(get_hv_image_base()));
uint64_t hv_end_pa = hv_start_pa + CONFIG_HV_RAM_SIZE;
uint64_t hv_end_pa = hv_start_pa + get_hv_ram_size();
uint32_t entries_count = get_e820_entries_count();
struct acrn_vm_config *sos_vm_config = get_vm_config(vm->vm_id);

2
hypervisor/arch/x86/guest/vm.c
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@ -434,7 +434,7 @@ static void prepare_sos_vm_memmap(struct acrn_vm *vm)
* will cause EPT violation if sos accesses hv memory
*/
hv_hpa = hva2hpa((void *)(get_hv_image_base()));
ept_del_mr(vm, pml4_page, hv_hpa, CONFIG_HV_RAM_SIZE);
ept_del_mr(vm, pml4_page, hv_hpa, get_hv_ram_size());
/* unmap prelaunch VM memory */
for (vm_id = 0U; vm_id < CONFIG_MAX_VM_NUM; vm_id++) {
vm_config = get_vm_config(vm_id);

9
hypervisor/arch/x86/mmu.c
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@ -40,6 +40,7 @@
#include <logmsg.h>
#include <misc_cfg.h>
static uint32_t hv_ram_size;
static void *ppt_mmu_pml4_addr;
static uint8_t sanitized_page[PAGE_SIZE] __aligned(PAGE_SIZE);
@ -151,6 +152,11 @@ void invept(const void *eptp)
}
}
uint32_t get_hv_ram_size(void)
{
return hv_ram_size;
}
void enable_paging(void)
{
uint64_t tmp64 = 0UL;
@ -249,6 +255,7 @@ void init_paging(void)
const struct abi_mmap *p_mmap = abi->mmap_entry;
pr_dbg("HV MMU Initialization");
hv_ram_size = (uint32_t)(uint64_t)&ld_ram_size;
init_sanitized_page((uint64_t *)sanitized_page, hva2hpa_early(sanitized_page));
@ -295,7 +302,7 @@ void init_paging(void)
*/
hv_hva = get_hv_image_base();
pgtable_modify_or_del_map((uint64_t *)ppt_mmu_pml4_addr, hv_hva & PDE_MASK,
CONFIG_HV_RAM_SIZE + (((hv_hva & (PDE_SIZE - 1UL)) != 0UL) ? PDE_SIZE : 0UL),
hv_ram_size + (((hv_hva & (PDE_SIZE - 1UL)) != 0UL) ? PDE_SIZE : 0UL),
PAGE_CACHE_WB, PAGE_CACHE_MASK | PAGE_USER, &ppt_pgtable, MR_MODIFY);
/*

7
hypervisor/bsp/ld/link_ram.ld.in
View File

@ -6,7 +6,7 @@ MEMORY
lowram : ORIGIN = 0, LENGTH = CONFIG_LOW_RAM_SIZE
/* 32 MBytes of RAM for HV */
ram : ORIGIN = CONFIG_HV_RAM_START, LENGTH = CONFIG_HV_RAM_SIZE
ram : ORIGIN = CONFIG_HV_RAM_START, LENGTH = 0x80000000 - CONFIG_HV_RAM_START
}
SECTIONS
@ -98,6 +98,7 @@ SECTIONS
ld_bss_end = . ;
} > ram
_ld_ram_size = LENGTH(ram) ;
_ld_ram_end = _ld_ram_size + _ld_ram_start ;
. = ALIGN(0x200000) ;
_ld_ram_end = . ;
ld_ram_size = _ld_ram_end - _ld_ram_start ;
}

2
hypervisor/common/hypercall.c
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@ -760,7 +760,7 @@ static int32_t write_protect_page(struct acrn_vm *vm,const struct wp_data *wp)
base_paddr = hva2hpa((void *)(get_hv_image_base()));
if (((hpa <= base_paddr) && ((hpa + PAGE_SIZE) > base_paddr)) ||
((hpa >= base_paddr) &&
(hpa < (base_paddr + CONFIG_HV_RAM_SIZE)))) {
(hpa < (base_paddr + get_hv_ram_size())))) {
pr_err("%s: overlap the HV memory region.", __func__);
} else {
prot_set = (wp->set != 0U) ? 0UL : EPT_WR;

1
hypervisor/include/arch/x86/asm/boot/ld_sym.h
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@ -14,5 +14,6 @@ extern uint8_t ld_entry_end;
extern const uint8_t ld_trampoline_load;
extern uint8_t ld_trampoline_start;
extern uint8_t ld_trampoline_end;
extern uint8_t ld_ram_size;
#endif /* LD_SYM_H */

2
hypervisor/include/arch/x86/asm/mmu.h
View File

@ -183,6 +183,8 @@ void flush_vpid_global(void);
*/
void invept(const void *eptp);
uint32_t get_hv_ram_size(void);
/* get PDPT address from CR3 vaule in PAE mode */
static inline uint64_t get_pae_pdpt_addr(uint64_t cr3)
{