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https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-08-07 11:14:53 +00:00
HV: fix expression is not boolean
MISRA-C standard requires the type of result of expression in if/while pattern shall be boolean. Tracked-On: #861 Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
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5cbda22d29
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@ -249,7 +249,7 @@ static bool rt_vm_pm1a_io_write(struct acrn_vm *vm, uint16_t addr, size_t width,
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if (width != 2U) {
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pr_dbg("Invalid address (0x%x) or width (0x%x)", addr, width);
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} else {
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if (((v & VIRTUAL_PM1A_SLP_EN) && (((v & VIRTUAL_PM1A_SLP_TYP) >> 10U) == 5U)) != 0U) {
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if ((((v & VIRTUAL_PM1A_SLP_EN) != 0U) && (((v & VIRTUAL_PM1A_SLP_TYP) >> 10U) == 5U)) != 0U) {
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vm->state = VM_POWERING_OFF;
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}
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}
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@ -41,7 +41,7 @@ inline uint64_t vcpu_get_rip(struct acrn_vcpu *vcpu)
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struct run_context *ctx =
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&vcpu->arch.contexts[vcpu->arch.cur_context].run_ctx;
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if (bitmap_test(CPU_REG_RIP, &vcpu->reg_updated) == 0 &&
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if (!bitmap_test(CPU_REG_RIP, &vcpu->reg_updated) &&
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bitmap_test_and_set_lock(CPU_REG_RIP, &vcpu->reg_cached) == 0)
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ctx->rip = exec_vmread(VMX_GUEST_RIP);
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return ctx->rip;
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@ -75,9 +75,10 @@ inline uint64_t vcpu_get_efer(struct acrn_vcpu *vcpu)
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struct run_context *ctx =
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&vcpu->arch.contexts[vcpu->arch.cur_context].run_ctx;
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if (bitmap_test(CPU_REG_EFER, &vcpu->reg_updated) == 0 &&
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bitmap_test_and_set_lock(CPU_REG_EFER, &vcpu->reg_cached) == 0)
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if (!bitmap_test(CPU_REG_EFER, &vcpu->reg_updated) &&
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!bitmap_test_and_set_lock(CPU_REG_EFER, &vcpu->reg_cached)) {
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ctx->ia32_efer = exec_vmread64(VMX_GUEST_IA32_EFER_FULL);
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}
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return ctx->ia32_efer;
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}
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@ -93,10 +94,11 @@ inline uint64_t vcpu_get_rflags(struct acrn_vcpu *vcpu)
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struct run_context *ctx =
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&vcpu->arch.contexts[vcpu->arch.cur_context].run_ctx;
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if (bitmap_test(CPU_REG_RFLAGS, &vcpu->reg_updated) == 0 &&
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bitmap_test_and_set_lock(CPU_REG_RFLAGS,
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&vcpu->reg_cached) == 0 && vcpu->launched)
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if (!bitmap_test(CPU_REG_RFLAGS, &vcpu->reg_updated) &&
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!bitmap_test_and_set_lock(CPU_REG_RFLAGS,
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&vcpu->reg_cached) && vcpu->launched) {
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ctx->rflags = exec_vmread(VMX_GUEST_RFLAGS);
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}
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return ctx->rflags;
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}
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@ -186,14 +188,14 @@ struct acrn_vcpu *get_ever_run_vcpu(uint16_t pcpu_id)
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static void set_vcpu_mode(struct acrn_vcpu *vcpu, uint32_t cs_attr, uint64_t ia32_efer,
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uint64_t cr0)
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{
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if (ia32_efer & MSR_IA32_EFER_LMA_BIT) {
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if (cs_attr & 0x2000U) {
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if ((ia32_efer & MSR_IA32_EFER_LMA_BIT) != 0UL) {
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if ((cs_attr & 0x2000U) != 0U) {
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/* CS.L = 1 */
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vcpu->arch.cpu_mode = CPU_MODE_64BIT;
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} else {
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vcpu->arch.cpu_mode = CPU_MODE_COMPATIBILITY;
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}
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} else if (cr0 & CR0_PE) {
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} else if ((cr0 & CR0_PE) != 0UL) {
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vcpu->arch.cpu_mode = CPU_MODE_PROTECTED;
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} else {
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vcpu->arch.cpu_mode = CPU_MODE_REAL;
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@ -216,7 +218,7 @@ void set_vcpu_regs(struct acrn_vcpu *vcpu, struct acrn_vcpu_regs *vcpu_regs)
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* If the set_vcpu_regs is used not only for vcpu state
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* initialization, this part of code needs be revised.
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*/
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if (vcpu_regs->cr0 & CR0_PE) {
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if ((vcpu_regs->cr0 & CR0_PE) != 0UL) {
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attr = PROTECTED_MODE_DATA_SEG_AR;
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limit = PROTECTED_MODE_SEG_LIMIT;
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} else {
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@ -451,7 +453,7 @@ int32_t run_vcpu(struct acrn_vcpu *vcpu)
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pr_info("VM %d Starting VCPU %hu",
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vcpu->vm->vm_id, vcpu->vcpu_id);
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if (vcpu->arch.vpid)
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if (vcpu->arch.vpid != 0U)
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exec_vmwrite16(VMX_VPID, vcpu->arch.vpid);
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/*
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@ -518,10 +520,11 @@ int32_t run_vcpu(struct acrn_vcpu *vcpu)
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if (status != 0) {
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/* refer to 64-ia32 spec section 24.9.1 volume#3 */
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if (vcpu->arch.exit_reason & VMX_VMENTRY_FAIL)
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if ((vcpu->arch.exit_reason & VMX_VMENTRY_FAIL) != 0U) {
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pr_fatal("vmentry fail reason=%lx", vcpu->arch.exit_reason);
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else
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} else {
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pr_fatal("vmexit fail err_inst=%x", exec_vmread32(VMX_INSTR_ERROR));
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}
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ASSERT(status == 0, "vm fail");
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}
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@ -20,14 +20,13 @@ int32_t parse_hv_cmdline(void)
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struct multiboot_info *mbi = NULL;
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if (boot_regs[0] != MULTIBOOT_INFO_MAGIC) {
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ASSERT(0, "no multiboot info found");
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return -EINVAL;
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}
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mbi = (struct multiboot_info *)(hpa2hva((uint64_t)boot_regs[1]));
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dev_dbg(ACRN_DBG_PARSE, "Multiboot detected, flag=0x%x", mbi->mi_flags);
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if (!(mbi->mi_flags & MULTIBOOT_INFO_HAS_CMDLINE)) {
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if ((mbi->mi_flags & MULTIBOOT_INFO_HAS_CMDLINE) == 0U) {
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dev_dbg(ACRN_DBG_PARSE, "no hv cmdline!");
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return -EINVAL;
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}
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@ -40,7 +39,7 @@ int32_t parse_hv_cmdline(void)
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start++;
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end = start + 1;
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while (*end != ' ' && *end)
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while ((*end != ' ') && ((*end) != '\0'))
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end++;
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if (!handle_dbg_cmd(start, end - start)) {
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@ -48,7 +47,7 @@ int32_t parse_hv_cmdline(void)
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}
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start = end + 1;
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} while (*end && *start);
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} while (((*end) != '\0') && ((*start) != '\0'));
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return 0;
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}
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@ -100,7 +100,7 @@ struct acrn_vuart *vuart_console_active(void)
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}
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}
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return (vu && vu->active) ? vu : NULL;
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return ((vu != NULL) && vu->active) ? vu : NULL;
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}
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static void console_timer_callback(__unused void *data)
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@ -346,7 +346,7 @@ static bool vuart_write(struct acrn_vm *vm, uint16_t offset_arg,
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offset -= vu->port_base;
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target_vu = vu->target_vu;
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if (!(vu->mcr & MCR_LOOPBACK) &&
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if (((vu->mcr & MCR_LOOPBACK) == 0U) &&
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(offset == UART16550_THR) && (target_vu != NULL)) {
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send_to_target(target_vu, value_u8);
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} else {
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