HV: fix expression is not boolean

MISRA-C standard requires the type of result of expression in if/while pattern shall be boolean.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
This commit is contained in:
Huihuang Shi 2019-06-19 16:20:10 +08:00 committed by wenlingz
parent 5cbda22d29
commit e3ee9cf20e
5 changed files with 22 additions and 20 deletions

View File

@ -249,7 +249,7 @@ static bool rt_vm_pm1a_io_write(struct acrn_vm *vm, uint16_t addr, size_t width,
if (width != 2U) {
pr_dbg("Invalid address (0x%x) or width (0x%x)", addr, width);
} else {
if (((v & VIRTUAL_PM1A_SLP_EN) && (((v & VIRTUAL_PM1A_SLP_TYP) >> 10U) == 5U)) != 0U) {
if ((((v & VIRTUAL_PM1A_SLP_EN) != 0U) && (((v & VIRTUAL_PM1A_SLP_TYP) >> 10U) == 5U)) != 0U) {
vm->state = VM_POWERING_OFF;
}
}

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@ -41,7 +41,7 @@ inline uint64_t vcpu_get_rip(struct acrn_vcpu *vcpu)
struct run_context *ctx =
&vcpu->arch.contexts[vcpu->arch.cur_context].run_ctx;
if (bitmap_test(CPU_REG_RIP, &vcpu->reg_updated) == 0 &&
if (!bitmap_test(CPU_REG_RIP, &vcpu->reg_updated) &&
bitmap_test_and_set_lock(CPU_REG_RIP, &vcpu->reg_cached) == 0)
ctx->rip = exec_vmread(VMX_GUEST_RIP);
return ctx->rip;
@ -75,9 +75,10 @@ inline uint64_t vcpu_get_efer(struct acrn_vcpu *vcpu)
struct run_context *ctx =
&vcpu->arch.contexts[vcpu->arch.cur_context].run_ctx;
if (bitmap_test(CPU_REG_EFER, &vcpu->reg_updated) == 0 &&
bitmap_test_and_set_lock(CPU_REG_EFER, &vcpu->reg_cached) == 0)
if (!bitmap_test(CPU_REG_EFER, &vcpu->reg_updated) &&
!bitmap_test_and_set_lock(CPU_REG_EFER, &vcpu->reg_cached)) {
ctx->ia32_efer = exec_vmread64(VMX_GUEST_IA32_EFER_FULL);
}
return ctx->ia32_efer;
}
@ -93,10 +94,11 @@ inline uint64_t vcpu_get_rflags(struct acrn_vcpu *vcpu)
struct run_context *ctx =
&vcpu->arch.contexts[vcpu->arch.cur_context].run_ctx;
if (bitmap_test(CPU_REG_RFLAGS, &vcpu->reg_updated) == 0 &&
bitmap_test_and_set_lock(CPU_REG_RFLAGS,
&vcpu->reg_cached) == 0 && vcpu->launched)
if (!bitmap_test(CPU_REG_RFLAGS, &vcpu->reg_updated) &&
!bitmap_test_and_set_lock(CPU_REG_RFLAGS,
&vcpu->reg_cached) && vcpu->launched) {
ctx->rflags = exec_vmread(VMX_GUEST_RFLAGS);
}
return ctx->rflags;
}
@ -186,14 +188,14 @@ struct acrn_vcpu *get_ever_run_vcpu(uint16_t pcpu_id)
static void set_vcpu_mode(struct acrn_vcpu *vcpu, uint32_t cs_attr, uint64_t ia32_efer,
uint64_t cr0)
{
if (ia32_efer & MSR_IA32_EFER_LMA_BIT) {
if (cs_attr & 0x2000U) {
if ((ia32_efer & MSR_IA32_EFER_LMA_BIT) != 0UL) {
if ((cs_attr & 0x2000U) != 0U) {
/* CS.L = 1 */
vcpu->arch.cpu_mode = CPU_MODE_64BIT;
} else {
vcpu->arch.cpu_mode = CPU_MODE_COMPATIBILITY;
}
} else if (cr0 & CR0_PE) {
} else if ((cr0 & CR0_PE) != 0UL) {
vcpu->arch.cpu_mode = CPU_MODE_PROTECTED;
} else {
vcpu->arch.cpu_mode = CPU_MODE_REAL;
@ -216,7 +218,7 @@ void set_vcpu_regs(struct acrn_vcpu *vcpu, struct acrn_vcpu_regs *vcpu_regs)
* If the set_vcpu_regs is used not only for vcpu state
* initialization, this part of code needs be revised.
*/
if (vcpu_regs->cr0 & CR0_PE) {
if ((vcpu_regs->cr0 & CR0_PE) != 0UL) {
attr = PROTECTED_MODE_DATA_SEG_AR;
limit = PROTECTED_MODE_SEG_LIMIT;
} else {
@ -451,7 +453,7 @@ int32_t run_vcpu(struct acrn_vcpu *vcpu)
pr_info("VM %d Starting VCPU %hu",
vcpu->vm->vm_id, vcpu->vcpu_id);
if (vcpu->arch.vpid)
if (vcpu->arch.vpid != 0U)
exec_vmwrite16(VMX_VPID, vcpu->arch.vpid);
/*
@ -518,10 +520,11 @@ int32_t run_vcpu(struct acrn_vcpu *vcpu)
if (status != 0) {
/* refer to 64-ia32 spec section 24.9.1 volume#3 */
if (vcpu->arch.exit_reason & VMX_VMENTRY_FAIL)
if ((vcpu->arch.exit_reason & VMX_VMENTRY_FAIL) != 0U) {
pr_fatal("vmentry fail reason=%lx", vcpu->arch.exit_reason);
else
} else {
pr_fatal("vmexit fail err_inst=%x", exec_vmread32(VMX_INSTR_ERROR));
}
ASSERT(status == 0, "vm fail");
}

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@ -20,14 +20,13 @@ int32_t parse_hv_cmdline(void)
struct multiboot_info *mbi = NULL;
if (boot_regs[0] != MULTIBOOT_INFO_MAGIC) {
ASSERT(0, "no multiboot info found");
return -EINVAL;
}
mbi = (struct multiboot_info *)(hpa2hva((uint64_t)boot_regs[1]));
dev_dbg(ACRN_DBG_PARSE, "Multiboot detected, flag=0x%x", mbi->mi_flags);
if (!(mbi->mi_flags & MULTIBOOT_INFO_HAS_CMDLINE)) {
if ((mbi->mi_flags & MULTIBOOT_INFO_HAS_CMDLINE) == 0U) {
dev_dbg(ACRN_DBG_PARSE, "no hv cmdline!");
return -EINVAL;
}
@ -40,7 +39,7 @@ int32_t parse_hv_cmdline(void)
start++;
end = start + 1;
while (*end != ' ' && *end)
while ((*end != ' ') && ((*end) != '\0'))
end++;
if (!handle_dbg_cmd(start, end - start)) {
@ -48,7 +47,7 @@ int32_t parse_hv_cmdline(void)
}
start = end + 1;
} while (*end && *start);
} while (((*end) != '\0') && ((*start) != '\0'));
return 0;
}

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@ -100,7 +100,7 @@ struct acrn_vuart *vuart_console_active(void)
}
}
return (vu && vu->active) ? vu : NULL;
return ((vu != NULL) && vu->active) ? vu : NULL;
}
static void console_timer_callback(__unused void *data)

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@ -346,7 +346,7 @@ static bool vuart_write(struct acrn_vm *vm, uint16_t offset_arg,
offset -= vu->port_base;
target_vu = vu->target_vu;
if (!(vu->mcr & MCR_LOOPBACK) &&
if (((vu->mcr & MCR_LOOPBACK) == 0U) &&
(offset == UART16550_THR) && (target_vu != NULL)) {
send_to_target(target_vu, value_u8);
} else {