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hv: ptcm: enable ptcm by default

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Enable PTCM by default if the platform support it. We could check it by whether
the PTCM ACPI Table is exist. Besides to parse the PTCM ACPI Table and call
PTCM command interface to init pSRAM on all CPU cores, we need to ignore
WBINVD to flush the cache of th pSRAM.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
This commit is contained in:
Li Fei1 2020-09-14 23:02:43 +08:00 committed by wenlingz
parent 7125c522ef
commit f94ad6aef7
3 changed files with 73 additions and 34 deletions
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9
hypervisor/arch/x86/Kconfig
View File

@ -276,6 +276,15 @@ config CDP_ENABLED
prioritization of code and data fetches to the L2 or L3 cache in a
software configurable manner, depending on hardware support.
config PTCM_ENABLED
bool "Enable PTCM (Platform Tuning Configuration Manager)"
depends on !CDP_ENABLED
default y
help
PCTM supports RTVM to make use of pSRAM to improve the performance
of RT APPs. pSRAM is a block of cache, which is separated and protected by
CAT and other methods. PTCM and CDP cannot be co-existing.
config GPU_SBDF
hex "Segment, Bus, Device, and function of the GPU"
depends on ACPI_PARSE_ENABLED

30
hypervisor/arch/x86/guest/ept.c
View File

@ -15,6 +15,7 @@
#include <vtd.h>
#include <logmsg.h>
#include <trace.h>
#include <ptct.h>
#define DBG_LEVEL_EPT 6U
@ -170,14 +171,39 @@ void ept_del_mr(struct acrn_vm *vm, uint64_t *pml4_page, uint64_t gpa, uint64_t
*/
void ept_flush_leaf_page(uint64_t *pge, uint64_t size)
{
uint64_t hpa = INVALID_HPA;
uint64_t hpa = INVALID_HPA, hpa_end;
void *hva = NULL;
uint64_t flush_size = size;
if ((*pge & EPT_MT_MASK) != EPT_UNCACHED) {
hpa = (*pge & (~(size - 1UL)));
hpa_end = hpa + size;
if (hpa < psram_area_bottom) {
if (hpa_end > psram_area_top) {
flush_size = psram_area_bottom - hpa;
hva = hpa2hva(hpa);
stac();
flush_address_space(hva, flush_size);
clac();
flush_size = hpa_end - psram_area_top;
hpa = psram_area_top;
} else if (hpa_end > psram_area_bottom) {
flush_size = psram_area_bottom - hpa;
}
} else if (hpa < psram_area_top) {
if (hpa_end <= psram_area_top) {
flush_size = 0UL;
} else {
hpa = psram_area_top;
flush_size = hpa_end - psram_area_top;
}
}
hva = hpa2hva(hpa);
stac();
flush_address_space(hva, size);
flush_address_space(hva, flush_size);
clac();
}
}

68
hypervisor/arch/x86/ptcm.c
View File

@ -8,8 +8,8 @@
#include <misc_cfg.h>
#include <ptcm.h>
uint64_t psram_area_bottom = PSRAM_BASE_HPA;
uint64_t psram_area_top = PSRAM_BASE_HPA;
uint64_t psram_area_bottom;
uint64_t psram_area_top;
#ifdef CONFIG_PTCM_ENABLED
@ -32,6 +32,8 @@ static void parse_ptct(void)
entry = &acpi_ptct->ptct_first_entry; //&acpi_ptct->ptct_entries[0];
pr_fatal("find PTCT base entry, in HPA %llx", entry);
psram_area_bottom = PSRAM_BASE_HPA;
while (((uint64_t)entry - (uint64_t)acpi_ptct) < acpi_ptct->header.length) {
switch (entry->type) {
case PTCT_ENTRY_TYPE_PTCM_BINARY:
@ -109,40 +111,42 @@ void init_psram(bool is_bsp)
uint32_t magic,version;
int ret;
if (is_bsp) {
parse_ptct();
pr_fatal("PTCT is parsed by BSP");
ptct_base_entry = (struct ptct_entry*)((uint64_t)get_acpi_tbl(ACPI_SIG_PTCT) + 0x24);
pr_fatal("ptct_base_entry is found by BSP at %llx", ptct_base_entry);
magic = ((uint32_t *)ptcm_binary.address)[0];
version = ((uint32_t *)ptcm_binary.address)[1];
ptcm_command_interface_offset =*(uint64_t *)(ptcm_binary.address + 0x8);
pr_fatal("ptcm_bin_address:%llx", ptcm_binary.address);
pr_fatal("ptcm_command_interface_offset is %llx", ptcm_command_interface_offset);
pr_fatal("magic:%x", magic);
pr_fatal("version:%x", version);
if (get_acpi_tbl(ACPI_SIG_PTCT) != NULL) {
if (is_bsp) {
parse_ptct();
pr_fatal("PTCT is parsed by BSP");
ptct_base_entry = (struct ptct_entry*)((uint64_t)get_acpi_tbl(ACPI_SIG_PTCT) + 0x24);
pr_fatal("ptct_base_entry is found by BSP at %llx", ptct_base_entry);
magic = ((uint32_t *)ptcm_binary.address)[0];
version = ((uint32_t *)ptcm_binary.address)[1];
ptcm_command_interface_offset =*(uint64_t *)(ptcm_binary.address + 0x8);
pr_fatal("ptcm_bin_address:%llx", ptcm_binary.address);
pr_fatal("ptcm_command_interface_offset is %llx", ptcm_command_interface_offset);
pr_fatal("magic:%x", magic);
pr_fatal("version:%x", version);
ptcm_command_interface = (ptcm_command_abi)(ptcm_binary.address + ptcm_command_interface_offset);
pr_fatal("ptcm_command_interface is found at %llx",ptcm_command_interface);
} else {
//all AP should wait until BSP finishes parsing PTCT and finding the command interface.
while (!ptcm_command_interface) {
continue;
ptcm_command_interface = (ptcm_command_abi)(ptcm_binary.address + ptcm_command_interface_offset);
pr_fatal("ptcm_command_interface is found at %llx",ptcm_command_interface);
} else {
//all AP should wait until BSP finishes parsing PTCT and finding the command interface.
while (!ptcm_command_interface) {
continue;
}
}
}
ret = ptcm_command_interface(PTCM_CMD_INIT_PSRAM, (void *)ptct_base_entry);
pr_fatal("PTCM initialization for core %d with return code %d!!!!!!!!!!!!!", get_pcpu_id(), ret);
/* TODO: to handle the return errno gracefully */
ASSERT(ret == PTCM_STATUS_SUCCESS);
ret = ptcm_command_interface(PTCM_CMD_INIT_PSRAM, (void *)ptct_base_entry);
pr_fatal("PTCM initialization for core %d with return code %d!!!!!!!!!!!!!", get_pcpu_id(), ret);
/* TODO: to handle the return errno gracefully */
ASSERT(ret == PTCM_STATUS_SUCCESS);
/* wait until all cores finishes pSRAM initialization*/
if (is_bsp){
psram_is_initialized = true;
pr_fatal("BSP pSRAM has been initialized\n");
} else{
while (psram_is_initialized) {
continue;
/* wait until all cores finishes pSRAM initialization*/
if (is_bsp){
psram_is_initialized = true;
pr_fatal("BSP pSRAM has been initialized\n");
} else{
while (psram_is_initialized) {
continue;
}
}
}
}