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HV: treewide: fix violations of coding guideline C-FN-06
The coding guideline rule C-FN-06 requires that 'a parameter passed by value to a function shall not be modified directly'. This patch rewrites two functions which does modify its parameters today. This patch has no semantic impact. Tracked-On: #6776 Signed-off-by: Junjie Mao <junjie.mao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -871,6 +871,7 @@ static void set_guest_ia32_misc_enalbe(struct acrn_vcpu *vcpu, uint64_t v)
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{
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uint32_t eax, ebx = 0U, ecx = 0U, edx = 0U;
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bool update_vmsr = true;
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uint64_t effective_guest_msr = v;
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/* According to SDM Vol4 2.1 & Vol 3A 4.1.4,
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* EFER.NXE should be cleared if guest disable XD in IA32_MISC_ENABLE
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@ -895,14 +896,14 @@ static void set_guest_ia32_misc_enalbe(struct acrn_vcpu *vcpu, uint64_t v)
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update_vmsr = false;
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} else if (vcpu->vm->arch_vm.vm_mwait_cap) {
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/* guest cpuid.01H will be updated when guest executes 'cpuid' with leaf 01H */
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v &= ~MSR_IA32_MISC_ENABLE_MONITOR_ENA;
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effective_guest_msr &= ~MSR_IA32_MISC_ENABLE_MONITOR_ENA;
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} else {
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update_vmsr = false;
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}
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}
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if (update_vmsr) {
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vcpu_set_guest_msr(vcpu, MSR_IA32_MISC_ENABLE, v);
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vcpu_set_guest_msr(vcpu, MSR_IA32_MISC_ENABLE, effective_guest_msr);
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}
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}
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@ -494,8 +494,7 @@ static void write_cfg_header(struct pci_vdev *vdev,
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* even this PCI device has no INTx, so emulate INTx Line Register as writable.
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*/
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if (offset == PCIR_INTERRUPT_LINE) {
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val &= 0xfU;
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pci_vdev_write_vcfg(vdev, offset, bytes, val);
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pci_vdev_write_vcfg(vdev, offset, bytes, (val & 0xfU));
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}
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}
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