HV: treewide: fix violations of coding guideline C-FN-06

The coding guideline rule C-FN-06 requires that 'a parameter passed by
value to a function shall not be modified directly'. This patch rewrites
two functions which does modify its parameters today.

This patch has no semantic impact.

Tracked-On: #6776
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Junjie Mao 2021-10-29 10:42:27 +08:00 committed by wenlingz
parent d4055d6157
commit fba343bd05
2 changed files with 4 additions and 4 deletions

View File

@ -871,6 +871,7 @@ static void set_guest_ia32_misc_enalbe(struct acrn_vcpu *vcpu, uint64_t v)
{
uint32_t eax, ebx = 0U, ecx = 0U, edx = 0U;
bool update_vmsr = true;
uint64_t effective_guest_msr = v;
/* According to SDM Vol4 2.1 & Vol 3A 4.1.4,
* EFER.NXE should be cleared if guest disable XD in IA32_MISC_ENABLE
@ -895,14 +896,14 @@ static void set_guest_ia32_misc_enalbe(struct acrn_vcpu *vcpu, uint64_t v)
update_vmsr = false;
} else if (vcpu->vm->arch_vm.vm_mwait_cap) {
/* guest cpuid.01H will be updated when guest executes 'cpuid' with leaf 01H */
v &= ~MSR_IA32_MISC_ENABLE_MONITOR_ENA;
effective_guest_msr &= ~MSR_IA32_MISC_ENABLE_MONITOR_ENA;
} else {
update_vmsr = false;
}
}
if (update_vmsr) {
vcpu_set_guest_msr(vcpu, MSR_IA32_MISC_ENABLE, v);
vcpu_set_guest_msr(vcpu, MSR_IA32_MISC_ENABLE, effective_guest_msr);
}
}

View File

@ -494,8 +494,7 @@ static void write_cfg_header(struct pci_vdev *vdev,
* even this PCI device has no INTx, so emulate INTx Line Register as writable.
*/
if (offset == PCIR_INTERRUPT_LINE) {
val &= 0xfU;
pci_vdev_write_vcfg(vdev, offset, bytes, val);
pci_vdev_write_vcfg(vdev, offset, bytes, (val & 0xfU));
}
}