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HV:remove redundant field 'mmio' from 'struct emul_cnx'

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Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
This commit is contained in:
Yonghua Huang 2018-05-23 01:00:14 +08:00 committed by lijinxia
parent b2c2ca2ecd
commit fbaff2aa35
4 changed files with 17 additions and 51 deletions
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8
hypervisor/arch/x86/ept.c
View File

@ -326,7 +326,7 @@ int dm_emulate_mmio_post(struct vcpu *vcpu)
if (vcpu->mmio.read_write == HV_MEM_IO_READ) { if (vcpu->mmio.read_write == HV_MEM_IO_READ) {
vcpu->mmio.value = vcpu->req.reqs.mmio_request.value; vcpu->mmio.value = vcpu->req.reqs.mmio_request.value;
/* Emulate instruction and update vcpu register set */ /* Emulate instruction and update vcpu register set */
ret = emulate_instruction(vcpu, &vcpu->mmio); ret = emulate_instruction(vcpu);
if (ret != 0) if (ret != 0)
goto out; goto out;
} }
@ -340,7 +340,7 @@ static int dm_emulate_mmio_pre(struct vcpu *vcpu, uint64_t exit_qual)
int status; int status;
if (vcpu->mmio.read_write == HV_MEM_IO_WRITE) { if (vcpu->mmio.read_write == HV_MEM_IO_WRITE) {
status = emulate_instruction(vcpu, &vcpu->mmio); status = emulate_instruction(vcpu);
if (status != 0) if (status != 0)
return status; return status;
vcpu->req.reqs.mmio_request.value = vcpu->mmio.value; vcpu->req.reqs.mmio_request.value = vcpu->mmio.value;
@ -420,7 +420,7 @@ int ept_violation_vmexit_handler(struct vcpu *vcpu)
} }
if (mmio->read_write == HV_MEM_IO_WRITE) { if (mmio->read_write == HV_MEM_IO_WRITE) {
if (emulate_instruction(vcpu, mmio) != 0) if (emulate_instruction(vcpu) != 0)
goto out; goto out;
} }
@ -432,7 +432,7 @@ int ept_violation_vmexit_handler(struct vcpu *vcpu)
hv_emulate_mmio(vcpu, mmio, mmio_handler); hv_emulate_mmio(vcpu, mmio, mmio_handler);
if (mmio->read_write == HV_MEM_IO_READ) { if (mmio->read_write == HV_MEM_IO_READ) {
/* Emulate instruction and update vcpu register set */ /* Emulate instruction and update vcpu register set */
if (emulate_instruction(vcpu, mmio) != 0) if (emulate_instruction(vcpu) != 0)
goto out; goto out;
} }

2
hypervisor/arch/x86/guest/instr_emul.h
View File

@ -89,7 +89,7 @@ void vie_init(struct vie *vie, const char *inst_bytes, uint32_t inst_length);
int __decode_instruction(struct vcpu *vcpu, uint64_t gla, int __decode_instruction(struct vcpu *vcpu, uint64_t gla,
enum vm_cpu_mode cpu_mode, int csd, struct vie *vie); enum vm_cpu_mode cpu_mode, int csd, struct vie *vie);
int emulate_instruction(struct vcpu *vcpu, struct mem_io *mmio); int emulate_instruction(struct vcpu *vcpu);
uint8_t decode_instruction(struct vcpu *vcpu); uint8_t decode_instruction(struct vcpu *vcpu);
#endif /* _VMM_INSTRUCTION_EMUL_H_ */ #endif /* _VMM_INSTRUCTION_EMUL_H_ */

54
hypervisor/arch/x86/guest/instr_emul_wrapper.c
View File

@ -42,7 +42,6 @@ struct emul_cnx {
struct vie vie; struct vie vie;
struct vm_guest_paging paging; struct vm_guest_paging paging;
struct vcpu *vcpu; struct vcpu *vcpu;
struct mem_io *mmio;
}; };
static DEFINE_CPU_DATA(struct emul_cnx, g_inst_ctxt); static DEFINE_CPU_DATA(struct emul_cnx, g_inst_ctxt);
@ -334,38 +333,20 @@ static void get_guest_paging_info(struct vcpu *vcpu, struct emul_cnx *emul_cnx)
static int mmio_read(struct vcpu *vcpu, __unused uint64_t gpa, uint64_t *rval, static int mmio_read(struct vcpu *vcpu, __unused uint64_t gpa, uint64_t *rval,
__unused int size, __unused void *arg) __unused int size, __unused void *arg)
{ {
struct emul_cnx *emul_cnx;
struct mem_io *mmio;
if (!vcpu) if (!vcpu)
return -EINVAL; return -EINVAL;
emul_cnx = &per_cpu(g_inst_ctxt, vcpu->pcpu_id); *rval = vcpu->mmio.value;
mmio = emul_cnx->mmio;
ASSERT(mmio != NULL, "invalid mmio when reading");
*rval = mmio->value;
return 0; return 0;
} }
static int mmio_write(struct vcpu *vcpu, __unused uint64_t gpa, uint64_t wval, static int mmio_write(struct vcpu *vcpu, __unused uint64_t gpa, uint64_t wval,
__unused int size, __unused void *arg) __unused int size, __unused void *arg)
{ {
struct emul_cnx *emul_cnx;
struct mem_io *mmio;
if (!vcpu) if (!vcpu)
return -EINVAL; return -EINVAL;
emul_cnx = &per_cpu(g_inst_ctxt, vcpu->pcpu_id); vcpu->mmio.value = wval;
mmio = emul_cnx->mmio;
ASSERT(mmio != NULL, "invalid mmio when writing");
mmio->value = wval;
return 0; return 0;
} }
@ -398,7 +379,6 @@ uint8_t decode_instruction(struct vcpu *vcpu)
guest_rip_hva = GPA2HVA(vcpu->vm, guest_rip_gpa); guest_rip_hva = GPA2HVA(vcpu->vm, guest_rip_gpa);
emul_cnx = &per_cpu(g_inst_ctxt, vcpu->pcpu_id); emul_cnx = &per_cpu(g_inst_ctxt, vcpu->pcpu_id);
emul_cnx->mmio = &vcpu->mmio;
emul_cnx->vcpu = vcpu; emul_cnx->vcpu = vcpu;
/* by now, HVA <-> HPA is 1:1 mapping, so use hpa is OK*/ /* by now, HVA <-> HPA is 1:1 mapping, so use hpa is OK*/
@ -409,8 +389,6 @@ uint8_t decode_instruction(struct vcpu *vcpu)
csar = exec_vmread(VMX_GUEST_CS_ATTR); csar = exec_vmread(VMX_GUEST_CS_ATTR);
cpu_mode = get_vmx_cpu_mode(); cpu_mode = get_vmx_cpu_mode();
vcpu->mmio.private_data = emul_cnx;
retval = __decode_instruction(vcpu, guest_rip_gva, retval = __decode_instruction(vcpu, guest_rip_gva,
cpu_mode, SEG_DESC_DEF32(csar), &emul_cnx->vie); cpu_mode, SEG_DESC_DEF32(csar), &emul_cnx->vie);
@ -423,32 +401,20 @@ uint8_t decode_instruction(struct vcpu *vcpu)
return emul_cnx->vie.opsize; return emul_cnx->vie.opsize;
} }
int emulate_instruction(struct vcpu *vcpu, struct mem_io *mmio) int emulate_instruction(struct vcpu *vcpu)
{ {
struct emul_cnx *emul_cnx = (struct emul_cnx *)(mmio->private_data); struct emul_cnx *emul_cnx;
struct vm_guest_paging *paging = &emul_cnx->paging; struct vm_guest_paging *paging;
int i, retval = 0; int retval = 0;
uint64_t gpa = mmio->paddr; uint64_t gpa = vcpu->mmio.paddr;
mem_region_read_t mread = mmio_read; mem_region_read_t mread = mmio_read;
mem_region_write_t mwrite = mmio_write; mem_region_write_t mwrite = mmio_write;
emul_cnx = &per_cpu(g_inst_ctxt, vcpu->pcpu_id);
paging = &emul_cnx->paging;
retval = vmm_emulate_instruction(vcpu, gpa, retval = vmm_emulate_instruction(vcpu, gpa,
&emul_cnx->vie, paging, mread, mwrite, &retval); &emul_cnx->vie, paging, mread, mwrite, &retval);
if (retval != 0) {
/* dump to instruction when emulation failed */
pr_err("emulate following instruction failed @ 0x%016llx:",
exec_vmread(VMX_GUEST_RIP));
for (i = 0; i < emul_cnx->vie.num_valid; i++) {
if (i >= VIE_INST_SIZE)
break;
if (i == 0)
pr_err("\n");
pr_err("%d=%02hhx ",
i, emul_cnx->vie.inst[i]);
}
}
return retval; return retval;
} }

4
hypervisor/arch/x86/guest/vlapic.c
View File

@ -2180,11 +2180,11 @@ int apic_access_vmexit_handler(struct vcpu *vcpu)
decode_instruction(vcpu); decode_instruction(vcpu);
if (access_type == 1) { if (access_type == 1) {
if (!emulate_instruction(vcpu, &vcpu->mmio)) if (!emulate_instruction(vcpu))
vlapic_write(vlapic, 1, offset, vcpu->mmio.value); vlapic_write(vlapic, 1, offset, vcpu->mmio.value);
} else if (access_type == 0) { } else if (access_type == 0) {
vlapic_read(vlapic, 1, offset, &vcpu->mmio.value); vlapic_read(vlapic, 1, offset, &vcpu->mmio.value);
emulate_instruction(vcpu, &vcpu->mmio); emulate_instruction(vcpu);
} }
TRACE_2L(TRC_VMEXIT_APICV_ACCESS, qual, (uint64_t)vlapic); TRACE_2L(TRC_VMEXIT_APICV_ACCESS, qual, (uint64_t)vlapic);