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hv: rename VECTOR_XXX and XXX_IRQ Macros

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1. Align the coding style for these MACROs
  2. Align the values of fixed VECTORs

Tracked-On: #4348
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
This commit is contained in:
Yonghua Huang 2020-01-09 20:48:43 +08:00 committed by wenlingz
parent b90862921e
commit fd4775d044
11 changed files with 35 additions and 35 deletions
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2
hypervisor/arch/x86/cpu.c
View File

@ -360,7 +360,7 @@ void make_pcpu_offline(uint16_t pcpu_id)
{
bitmap_set_lock(NEED_OFFLINE, &per_cpu(pcpu_flag, pcpu_id));
if (get_pcpu_id() != pcpu_id) {
send_single_ipi(pcpu_id, VECTOR_NOTIFY_VCPU);
send_single_ipi(pcpu_id, NOTIFY_VCPU_VECTOR);
}
}

2
hypervisor/arch/x86/guest/vlapic.c
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@ -609,7 +609,7 @@ static void vlapic_accept_intr(struct acrn_vlapic *vlapic, uint32_t vector, bool
*/
static void apicv_post_intr(uint16_t dest_pcpu_id)
{
send_single_ipi(dest_pcpu_id, VECTOR_POSTED_INTR);
send_single_ipi(dest_pcpu_id, POSTED_INTR_VECTOR);
}
/**

2
hypervisor/arch/x86/guest/vm.c
View File

@ -994,7 +994,7 @@ void make_shutdown_vm_request(uint16_t pcpu_id)
{
bitmap_set_lock(NEED_SHUTDOWN_VM, &per_cpu(pcpu_flag, pcpu_id));
if (get_pcpu_id() != pcpu_id) {
send_single_ipi(pcpu_id, VECTOR_NOTIFY_VCPU);
send_single_ipi(pcpu_id, NOTIFY_VCPU_VECTOR);
}
}

2
hypervisor/arch/x86/guest/vmcs.c
View File

@ -352,7 +352,7 @@ static void init_exec_ctrl(struct acrn_vcpu *vcpu)
exec_vmwrite64(VMX_EOI_EXIT3_FULL, 0UL);
exec_vmwrite16(VMX_GUEST_INTR_STATUS, 0U);
exec_vmwrite16(VMX_POSTED_INTR_VECTOR, VECTOR_POSTED_INTR);
exec_vmwrite16(VMX_POSTED_INTR_VECTOR, POSTED_INTR_VECTOR);
exec_vmwrite64(VMX_PIR_DESC_ADDR_FULL, apicv_get_pir_desc_paddr(vcpu));
}

8
hypervisor/arch/x86/irq.c
View File

@ -35,10 +35,10 @@ struct static_mapping_table {
};
static struct static_mapping_table irq_static_mappings[NR_STATIC_MAPPINGS] = {
{TIMER_IRQ, VECTOR_TIMER},
{NOTIFY_IRQ, VECTOR_NOTIFY_VCPU},
{POSTED_INTR_NOTIFY_IRQ, VECTOR_POSTED_INTR},
{PMI_IRQ, VECTOR_PMI},
{TIMER_IRQ, TIMER_VECTOR},
{NOTIFY_VCPU_IRQ, NOTIFY_VCPU_VECTOR},
{POSTED_INTR_IRQ, POSTED_INTR_VECTOR},
{PMI_IRQ, PMI_VECTOR},
};
/*

6
hypervisor/arch/x86/notify.c
View File

@ -58,7 +58,7 @@ void smp_call_function(uint64_t mask, smp_call_func_t func, void *data)
}
pcpu_id = ffs64(mask);
}
send_dest_ipi_mask((uint32_t)smp_call_mask, VECTOR_NOTIFY_VCPU);
send_dest_ipi_mask((uint32_t)smp_call_mask, NOTIFY_VCPU_VECTOR);
/* wait for current smp call complete */
wait_sync_change(&smp_call_mask, 0UL);
}
@ -72,7 +72,7 @@ static int32_t request_notification_irq(irq_action_t func, void *data)
retval = -EBUSY;
} else {
/* all cpu register the same notification vector */
retval = request_irq(NOTIFY_IRQ, func, data, IRQF_NONE);
retval = request_irq(NOTIFY_VCPU_IRQ, func, data, IRQF_NONE);
if (retval < 0) {
pr_err("Failed to add notify isr");
retval = -ENODEV;
@ -109,7 +109,7 @@ static void posted_intr_notification(__unused uint32_t irq, __unused void *data)
/*pre-conditon: be called only by BSP initialization proccess*/
void setup_posted_intr_notification(void)
{
if (request_irq(POSTED_INTR_NOTIFY_IRQ,
if (request_irq(POSTED_INTR_IRQ,
posted_intr_notification,
NULL, IRQF_NONE) < 0) {
pr_err("Failed to setup posted-intr notification");

2
hypervisor/arch/x86/timer.c
View File

@ -141,7 +141,7 @@ static void init_tsc_deadline_timer(void)
{
uint32_t val;
val = VECTOR_TIMER;
val = TIMER_VECTOR;
val |= APIC_LVTT_TM_TSCDLT; /* TSC deadline and unmask */
msr_write(MSR_IA32_EXT_APIC_LVT_TIMER, val);
cpu_memory_barrier();

4
hypervisor/common/schedule.c
View File

@ -133,7 +133,7 @@ void make_reschedule_request(uint16_t pcpu_id, uint16_t delmode)
if (get_pcpu_id() != pcpu_id) {
switch (delmode) {
case DEL_MODE_IPI:
send_single_ipi(pcpu_id, VECTOR_NOTIFY_VCPU);
send_single_ipi(pcpu_id, NOTIFY_VCPU_VECTOR);
break;
case DEL_MODE_NMI:
send_single_nmi(pcpu_id);
@ -236,7 +236,7 @@ void kick_thread(const struct thread_object *obj)
if (is_running(obj)) {
if (get_pcpu_id() != pcpu_id) {
if (obj->notify_mode == SCHED_NOTIFY_IPI) {
send_single_ipi(pcpu_id, VECTOR_NOTIFY_VCPU);
send_single_ipi(pcpu_id, NOTIFY_VCPU_VECTOR);
} else {
/* For lapic-pt vCPUs */
send_single_nmi(pcpu_id);

4
hypervisor/debug/profiling.c
View File

@ -620,7 +620,7 @@ static void profiling_pmi_handler(uint32_t irq, __unused void *data)
if ((get_cpu_var(profiling_info.vm_info).vmexit_reason
== VMX_EXIT_REASON_EXTERNAL_INTERRUPT) &&
((uint64_t)get_cpu_var(profiling_info.vm_info).external_vector
== VECTOR_PMI)) {
== PMI_VECTOR)) {
psample->csample.os_id
= get_cpu_var(profiling_info.vm_info).guest_vm_id;
(void)memset(psample->csample.task, 0U, 16);
@ -1435,7 +1435,7 @@ void profiling_setup(void)
per_cpu(profiling_info.s_state, cpu).nofrozen_pmi = 0U;
msr_write(MSR_IA32_EXT_APIC_LVT_PMI,
VECTOR_PMI | LVT_PERFCTR_BIT_MASK);
PMI_VECTOR | LVT_PERFCTR_BIT_MASK);
dev_dbg(DBG_LEVEL_PROFILING, "%s: exiting", __func__);
}

2
hypervisor/dm/io_req.c
View File

@ -10,7 +10,7 @@
#define DBG_LEVEL_IOREQ 6U
static uint32_t acrn_vhm_notification_vector = VECTOR_HYPERVISOR_CALLBACK_VHM;
static uint32_t acrn_vhm_notification_vector = HYPERVISOR_CALLBACK_VHM_VECTOR;
#define MMIO_DEFAULT_VALUE_SIZE_1 (0xFFUL)
#define MMIO_DEFAULT_VALUE_SIZE_2 (0xFFFFUL)
#define MMIO_DEFAULT_VALUE_SIZE_4 (0xFFFFFFFFUL)

36
hypervisor/include/arch/x86/irq.h
View File

@ -20,6 +20,15 @@
#define DBG_LEVEL_PTIRQ 6U
#define DBG_LEVEL_IRQ 6U
#define NR_MAX_VECTOR 0xFFU
#define VECTOR_INVALID (NR_MAX_VECTOR + 1U)
#define NR_IRQS 256U
#define IRQ_INVALID 0xffffffffU
#define NR_STATIC_MAPPINGS (4U)
#define HYPERVISOR_CALLBACK_VHM_VECTOR 0xF3U
/* vectors range for dynamic allocation, usually for devices */
#define VECTOR_DYNAMIC_START 0x20U
#define VECTOR_DYNAMIC_END 0xDFU
@ -28,30 +37,21 @@
#define VECTOR_FIXED_START 0xE0U
#define VECTOR_FIXED_END 0xFFU
#define VECTOR_TIMER 0xEFU
#define VECTOR_NOTIFY_VCPU 0xF0U
#define VECTOR_POSTED_INTR 0xF2U
#define VECTOR_VIRT_IRQ_VHM 0xF7U
#define VECTOR_SPURIOUS 0xFFU
#define VECTOR_HYPERVISOR_CALLBACK_VHM 0xF3U
#define VECTOR_PMI 0xF4U
#define TIMER_VECTOR (VECTOR_FIXED_START)
#define NOTIFY_VCPU_VECTOR (VECTOR_FIXED_START + 1U)
#define POSTED_INTR_VECTOR (VECTOR_FIXED_START + 2U)
#define PMI_VECTOR (VECTOR_FIXED_START + 3U)
#define TIMER_IRQ (NR_IRQS - 1U)
#define NOTIFY_VCPU_IRQ (NR_IRQS - 2U)
#define POSTED_INTR_IRQ (NR_IRQS - 3U)
#define PMI_IRQ (NR_IRQS - 4U)
/* the maximum number of msi entry is 2048 according to PCI
* local bus specification
*/
#define MAX_MSI_ENTRY 0x800U
#define NR_MAX_VECTOR 0xFFU
#define VECTOR_INVALID (NR_MAX_VECTOR + 1U)
#define NR_IRQS 256U
#define IRQ_INVALID 0xffffffffU
#define NR_STATIC_MAPPINGS (4U)
#define TIMER_IRQ (NR_IRQS - 1U)
#define NOTIFY_IRQ (NR_IRQS - 2U)
#define POSTED_INTR_NOTIFY_IRQ (NR_IRQS - 3U)
#define PMI_IRQ (NR_IRQS - 4U)
#define DEFAULT_DEST_MODE IOAPIC_RTE_DESTMODE_LOGICAL
#define DEFAULT_DELIVERY_MODE IOAPIC_RTE_DELMODE_LOPRI
#define ALL_CPUS_MASK (uint32_t) (((uint32_t)1U << (uint32_t) get_pcpu_nums()) - (uint32_t)1U)