Commit Graph

15 Commits

Author SHA1 Message Date
Yang, Yu-chu
0f16746c1e acrn-config: add sos pci_dev_num and pci_devs to vm_configurations.c
Add following to default output scenarios vm_configurations.c:
 - pci_dev_num
 - pci_devs = sos_pci_devs

Both was defineded in CONFIG_SOS_VM.

Tracked-On: #5426
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
2020-10-30 20:24:28 +08:00
Zide Chen
802065cf2f acrn-config: remove UEFI_OS_LOADER_NAME from all configurations
Tracked-On: #5197
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-10-21 15:09:26 +08:00
dongshen
29cbce07f6 acrn-config: fix hang issue for board EHL (hybrid_rt)
P2SB_BAR_ADDR related macros should only be defined in misc_cfg.h only when
p2sb is enabled in scenario xml.

Tracked-On: #5340
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-10-14 13:56:44 +08:00
dongshen
e8b25bbbdb acrn-config: update missing or outdated configuration source code
so that vm_configurations.h/vm_configurations.c are consistent for
same scenario

Upload configuration source code for:
Board               scenarios
whl-ipc-i5          industry, hybrid, hybrid_rt, logical_partiton
whl-ipc-i7          industry, hybrid, hybrid_rt, logical_partiton
ehl-crb-b           industry, hybrid, hybrid_rt, logical_partition
nuc7i7dnb           industry, hybrid, logical_partition

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-16 10:37:09 +08:00
Shuang Zheng
f9b9e3cae5 acrn-config: increase the length of DSDT table
increase the length of DSDT table to avoid memory overwrited by
subsequent ACPI tables.

Tracked-On: #5266

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-14 16:02:17 +08:00
Shuang Zheng
05393ef43f acrn-config: upload generated ASL code of ACPI tables for pre-launched VMs
generate ASL code of ACPI tables for pre-launched VMs on nuc7i7dnb,
whl-ipc-i5, whl-ipc-i7, ehl-crb-b boards

Tracked-On: #5266

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2020-09-10 13:50:19 +08:00
Victor Sun
810cf330e9 acrn-config: zephyr entry and load address update
After below commit in https://github.com/zephyrproject-rtos/zephyr

commit d0126a037d23484feebba00d2c0eac27e6393fef
Author: Zide Chen <zide.chen@intel.com>
Date:   Wed Feb 5 08:32:00 2020 -0800

    boards/x86/acrn: build it in x86_64 mode and switch to X2APIC

The zephyr image for acrn would be built in x86_64 mode by default, then the
load/entry address for pre-launched Zephyr image should be changed from
0x100000 to 0x8000 accordingly per below definition in zephyr .ld file:

zephyrproject_src/zephyr/include/arch/x86/intel64/linker.ld

SECTIONS
{
	/*
	 * The "locore" must be in the 64K of RAM, so that 16-bit code (with
	 * segment registers == 0x0000) and 32/64-bit code agree on addresses.
	 * ... there is no 16-bit code yet, but there will be when we add SMP.
	 */

	.locore 0x8000 : ALIGN(16)
	{
	_locore_start = .;

The commit in zephyrproject is merged before zephyr v2.2 release, so from v2.2
on, HV need this fix to boot Zephyr as pre-launched VM.

Tracked-On: #5259

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-09-02 11:04:20 +08:00
dongshen
01c66eb4b3 acrn-config: add support for P2SB bridge passthrough
This patch is to support direct assignment of P2SB bridge to one pre-launched
VM for EHL. User can configure this per-VM attribute in scenario xml:
    <mmio_resources desc="MMIO resources.">
         <p2sb>y</p2sb>
    </mmio_resources>

Set p2sb to y to passthru P2SB bridge to VM, and n otherwise.

Tracked-On: #5221
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-01 09:35:50 +08:00
Wei Liu
29ac258134 acrn-config: code refactoring for CAT/MBA
1.Modify clos_mask and mba_delay as a member of the union type.
2.Move HV_SUPPORTED_MAX_CLOS ,MAX_CACHE_CLOS_NUM_ENTRIES and
MAX_MBA_CLOS_NUM_ENTRIES to misc_cfg.h file.

Tracked-On: #5229
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-08-28 16:44:06 +08:00
Victor Sun
05a083c944 HV: comment SOS_VM as VMx in vm_configurations.h
Add a comment for SOS_VM to indicate its VM ID for better understanding;

Tracked-On: #5077

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-08-13 13:48:17 +08:00
Victor Sun
b9ad04d24d HV: add cpu affinity info for SOS VM
Previously the CPU affinity of SOS VM is initialized at runtime during
sanitize_vm_config() stage, follow the policy that all physical CPUs
except ocuppied by Pre-launched VMs are all belong to SOS_VM. Now change
the process that SOS CPU affinity should be initialized at build time
and has the assumption that its validity is guarenteed before runtime.

Tracked-On: #5077

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-08-04 09:05:29 +08:00
Victor Sun
38caecae56 HV: add whl-ipc-i7 configurations code in misc/vm_configs
Add whl-ipc-i7 configurations code in misc/vm_configs/ folder with new layout;

Tracked-On: #5077

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-07-24 16:16:06 +08:00
Victor Sun
b071cd6a67 HV: add whl-ipc-i5 configurations code in misc/vm_configs
Add whl-ipc-i5 configurations code in misc/vm_configs/ folder with new layout;

Tracked-On: #5077

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-07-24 16:16:06 +08:00
Victor Sun
c5bd227f5b HV: add formated nuc7i7dnb configurations code in misc/vm_configs
Add acrn-config tool formated nuc7i7dnb configurations code in misc/vm_configs/
folder with new layout;

Tracked-On: #5077

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-07-24 16:16:06 +08:00
Victor Sun
e792fa3d3c HV: nuc7i7dnb example of new VM configuratons layout
There are 3 kinds of configurations in ACRN hypervisor source code: hypervisor
overall setting, per-board setting and scenario specific per-VM setting.
Currently Kconfig act as hypervisor overall setting and its souce is located at
"hypervisor/arch/x86/configs/$(BOARD).config"; Per-board configs are located at
"hypervisor/arch/x86/configs/$(BOARD)" folder; scenario specific per-VM configs
are located at "hypervisor/scenarios/$(SCENARIO)" folder.

This layout brings issues that board configs and VM configs are coupled tightly.
The board specific Kconfig file and misc_cfg.h are shared by all scenarios, and
scenario specific pci_dev.c is shared by all boards. So the user have no way to
build hypervisor binary for different scenario on different board with one
source code repo.

The patch will setup a new VM configurations layout as below:

  misc/vm_configs
  ├── boards                         --> folder of supported boards
  │   ├── <board_1>                  --> scenario-irrelevant board configs
  │   │   ├── board.c                --> C file of board configs
  │   │   ├── board_info.h           --> H file of board info
  │   │   ├── pci_devices.h          --> pBDF of PCI devices
  │   │   └── platform_acpi_info.h   --> native ACPI info
  │   ├── <board_2>
  │   ├── <board_3>
  │   └── <board...>
  └── scenarios                      --> folder of supported scenarios
      ├── <scenario_1>               --> scenario specific VM configs
      │   ├── <board_1>              --> board specific VM configs for <scenario_1>
      │   │   ├── <board_1>.config   --> Kconfig for specific scenario on specific board
      │   │   ├── misc_cfg.h         --> H file of board specific VM configs
      │   │   ├── pci_dev.c          --> board specific VM pci devices list
      │   │   └── vbar_base.h        --> vBAR base info of VM PT pci devices
      │   ├── <board_2>
      │   ├── <board_3>
      │   ├── <board...>
      │   ├── vm_configurations.c    --> C file of scenario specific VM configs
      │   └── vm_configurations.h    --> H file of scenario specific VM configs
      ├── <scenario_2>
      ├── <scenario_3>
      └── <scenario...>

The new layout would decouple board configs and VM configs completely:

The boards folder stores kinds of supported boards info, each board folder
stores scenario-irrelevant board configs only, which could be totally got from
a physical platform and works for all scenarios;

The scenarios folder stores VM configs of kinds of working scenario. In each
scenario folder, besides the generic scenario specific VM configs, the board
specific VM configs would be put in a embedded board folder.

In new layout, all configs files will be removed out of hypervisor folder and
moved to a separate folder. This would make hypervisor LoC calculation more
precisely with below fomula:
	typical LoC = Loc(hypervisor) + Loc(one vm_configs)
which
	Loc(one vm_configs) = Loc(misc/vm_configs/boards/<board>)
		+ LoC(misc/vm_configs/scenarios/<scenario>/<board>)
		+ Loc(misc/vm_configs/scenarios/<scenario>/vm_configurations.c
		+ Loc(misc/vm_configs/scenarios/<scenario>/vm_configurations.h

Tracked-On: #5077

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-07-24 16:16:06 +08:00