Add a new field DRHD_MAX_DEVSCOPE_COUNT in board file representing
maximum devscope count in a DMAR structure for statically allocating
drhd_dev_scope array in hypervisor.
Tracked-On: #8494
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
PCIe extended capability with ID 0x1F is Precise Time Measurement. So
fix typo "TPM" which may confuse users.
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Tracked-On: #5915
Signed-off-by: Qiang Zhang <qiang4.zhang@intel.com>
Some motherboards exposes MCFG1/MCFG2 instead of one ACPI MCFG table,
thus no /sys/firmware/acpi/tables/MCFG exists but MCFG1 and MCFG2.
Read MCFG1 if MCFG doesn't exist.
The same issue report/fix is at https://github.com/intel/pcm/issues/74.
Tracked-On: #8514
Signed-off-by: Xin Zhang <xin.x.zhang@intel.com>
`modprobe msr` will be invoked if no /dev/cpu/#/msr is found.
If the "msr" module is built-in that check will pass and
no `modprobe msr` should be invoked.
fixes: aeab5a2 ("config_tools: update loading msr driver logic")
Tracked-On: #8410
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
If no TURBO_RATIO_LIMIT and TURBO_ACTIVATION_RATIO MSRs info
on target, board inspector will crash because of the IOError exception.
This patch captures the IOError exception to handle this error.
Tracked-On: #8380
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
If we use 5.15 kernel on rpl-p platform, some iomem info dumped with
non-ascii characters, then tool will raise a decode error.
So this patch filters non-ascii characters to handle this error.
Tracked-On: #8388
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Commit ce6500893 ("board_inspector: use executables found under system
paths") unintendedly changes how acpi.py invokes `rdmsr` and that impacts
the type of the execution results and causes incompatible method calls when
the results are parsed.
Convert the invocation back to shell-style.
Fixes: ce6500893 ("board_inspector: use executables found under system paths")
Tracked-On: #8315
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Board inspector does not support multiple PCI segment. Stop running and
throw out the message for user to disable VMD from BIOS setting.
Tracked-On: #8327
Signed-off-by: yuchuyang <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Board inspector may throw an error if a usb device is unplugged or
disconnected while extracting usb device information. Print out the
debug message and continue parsing.
Tracked-On: #8325
Signed-off-by: yuchuyang <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Using partial executable paths in the board inspector may cause unintended
results when another executable has the same name and is also detectable in
the search paths.
Introduce a wrapper module (`external_tools`) which locates executables
only under system paths such as /usr/bin and /usr/sbin and converts partial
executable paths to absolute ones before executing them via the subprocess
module. All invocations to `subprocess.run` or `subprocess.Popen`
throughout the board inspector are replaced with `external_tools.run`, with
the only exception being the invocation to the legacy board parser which
already uses an absolute path to the current Python interpreter.
Tracked-On: #8315
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
1. Generate success message when there is no critical error.
2. Generate note when there is error(s).
Tracked-On: #8297
Signed-off-by: yuchuyang <yu-chu.yang@intel.com>
Evaluating an XPATH on a tree results an empty list (rather than None) when
that tree does not contain any matching node. This patch fixes a branch
condition that does not check the XPATH evaluation result properly.
Tracked-On: #8168
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
While PCIe specification defines only type 0 and type 1 configuration space
headers, there can be cases where a PCI function has a different header
type. As an example, that device itself is under development or is a
special emulated device.
This patch makes the board inspector gracefully skips those PCIe functions
and continue scanning the rest in such cases, as the only impact of the
anomaly is the prevention of ACRN from passing through that PCIe function
to any VM. It is an overkill to crash the board inspector.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This method gets connected displays andis add them as child nodes to
a corresponding graphics card.
Tracked-On: #7970
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add 2 helplers:
1. get_realpath: this method returns the realpath of paramenter
if it's a valid path string
2. get_bdf_from_realpath: this method returns the bus, device, function
number if the parameter is a path to /sys/devices
Tracked-On: #7970
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This patch adds CPU frequency info extraction for board_inspector.
It is supposed to be used by ACRN CPU performance management.
Including those:
- Capabilities for HWP base regs, and turbo boost, by reading cpuids.
- Reporting all CPUID bits in LEAF 06H.
- Max none turbo ratio and max turbo ratio, by reading MSRs.
- HWP capabilities, by reading IA32_HWP_CAPABILITIES. Reading this
register requires HWP enabled in IA32_PM_ENABLE. (SDM Vol3 14.4.2:
Additional MSRs associated with HWP may only be accessed after HWP
is enabled)
- ACPI _PSD info, by reading sys nodes of Linux acpi-pstate driver.
This table describes frequency domains in which CPUs shares the same
frequency.
Tracked-On: #8168
Signed-off-by: Wu Zhou <wu.zhou@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Commit 2a8b80d0c ("config_tools: board_inspector: guess L3 CAT parameters
if not reported via CPUID") refactors the implementation of `--add-llc-cat`
option of the board inspector but does not update the referenced XML nodes
properly. This patch fixes a using-undefined-variable issue introduced by
that commit.
Tracked-On: #7948
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Added progress bar for board_inspector.py in all extractors and
some detailed step.
Added timeout mechanism for update-pciids command.
Tracked-On: #7973
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
On some platforms the L3 CAT capabilities are not reported via CPUID even
though they are present. The public real-time tuning guide suggests to try
accessing the MSRs directly to detect if L3 CAT is available or not.
This patch implements such guessing logic in the board inspector in order
to enable CAT for users with those kinds of platforms.
Tracked-On: #7948
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The MSR reading and writing routines today has the following issues:
1. The missing of /dev/cpu/*/msr is not properly captured as it is
reported via FileNotFoundError rather than IOError.
2. The wrmsr logic is not updated to use the tmpdevfs msr file.
This patch fixes the issues above which is a prerequisite of adding
additional MSR parsing classes.
Tracked-On: #7948
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In v3.0 the msrfield class has its initializer changed in a way that is
incompatible with the parameter names or the getter/setter. When introduced
from the BITS project, that class allows specifying an MSR field of
arbitrary length by being given the index of the most and least significant
bits.
This patch restores the original behavior of that msrfield class and moves
the use-case specific methods, namely is_vmx_cap_supported and
is_ctrl_setting_allowed, to a helper class.
Parsing of the VMX capability reporting MSRs in msr.py are updated
accordingly, and brief documentation of the MSR fields are added as well.
Tracked-On: #7948
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
As the last step to simplify the steps to enable software SRAM passthrough
to a pre-launched RT VM, this patch generates a virtual RTCT which only
contains a compatibility entry (to indicate that the format of the RTCT is
v2) and a couple of SSRAM or SSRAM waymask entries to report the software
SRAM blocks that pre-launched VM has access. That follows the practice how
ACRN device model generates virtual RTCT for post-launched VMs today.
In case RTCT v1 is used physically, this patch still generates a v2 RTCT
for the pre-launched VM but does not add an SSRAM waymask entry there
due to lack of information.
Tracked-On: #7947
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Today users still need to manually copy the RTCT binary file when they want
to passthrough software SRAM to a pre-launched RTVM, which is far from
being user friendly.
To get rid of that step, this patch extracts all information from the RTCT
table and format them in the board XML which is the only file users need to
copy from their target platform to build the hypervisor. The patch that
immediately follows will then use such information to generate vRTCT for
the pre-launched VM.
A side effect of this change is that more ranges, which represents those
reported by RTCT such as the CRL binary or the error log area, will be
added to the `memory` section of the board XML. The `id` attributes of
those range will be used to identify what that range is for. As a result,
getting RAM of the physical platform from the board XML requires additional
conditions on the `id` attributes to avoid counting non-RAM regions
unintendedly.
Tracked-On: #7947
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch refactors and fixes the following in the ACPI RTCT parser of the
board inspector.
1. Refactor to expose the RTCTSubtableSoftwareSRAM_v2 class directly as
it is a fixed-size entry. There is no need to create a dynamic class
which is mostly for variable-length entries.
2. Rename the "format" field in RTCT entry header to "format_or_version",
as that field actually means "version" in RTCT v2.
3. Properly parse the RTCT compatibility entry which is currently parsed
as an unknown entry with raw data.
Tracked-On: #7947
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Fixed the problem of exception handling of the
incoming type error in reading GSI number method
in 40-acpi-tables.py line 37 when dmesg command
line is too long.
Tracked-On: #7906
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
Use stderror to redirect error message to subprocess.DEVNULL
to hide it when the "update pciids" command is called.
Tracked-On: #7886
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
Modified the copyright year range in code, and corrected "int32_tel"
into "Intel" in two "hypervisor/include/debug/profiling.h" and
"hypervisor/include/debug/profiling_internal.h".
Tracked-On: #7559
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
One had escaped from the global cleaning that commit 8b16be918 did.
Tracked-On: #7254
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Changed default log level into "warning",
and fixed errors in warning log summary.
And further modified the log summary of checking
each message category.
Tracked-On: #7653
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
Support detecting connected usb devices in board_inspector and list them
in the usb mediator configuration menu.
Tracked-On: #7424
Signed-off-by: Calvin Zhang <calvinzhang.cool@gmail.com>
1.Temporarily store the log in the form of tempfile,
and the temporary file will be deleted after the summary log information is displayed.
2.Now, the logs will be printed when they generated as well.
Tracked-On: #6689
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
This patch is about the bug that VMs can't idle.
ACRN enables VM's C-state by extracting host's C-state table.
The C-state table has two types of interfaces: system-IO and mwait. VMs
just need one of them. ACRN can support both.
Currently we are telling users to use the system-IO type. That is, by
adding 'nomwait intel_idle.max_cstate=0' to host Linux's CMD line when
using board_inspector. (The reaseon we were using system-IO is that
mwait was buggy on Apollo Lake.)
But recent tests show that system-IO is somehow buggy. Linux c-state
driver(no matter intel_cstate or acpi_cstate) fails to enter idle state
with system-IO. This can always be reproduced on native environments.
MPERF counters show CPU cores are not in real idle state as expected.
To enable C-state in VMs, we have to switch to mwait.
As ACRN has already supported both system-IO and mwait, we don't have
to modify any code. We just need to tell user to use mwait instead of
system-IO.
That is, don't add 'nomwait intel_idle.max_cstate=0' to host Linux's
CMD line when using board_inspector. Just add 'intel_idle.max_cstate=0'
Due to the Apollo Lake's mwait bug, 'nomwait' is still needed for
Apollo Lake as an exception.
Tracked-On: #7371
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
Some cpu reports a brand string with non-viewable characters. While XML
string value can not contain NULL bytes or control characters.
So replace non-viewable characters in brand string with spaces.
Tracked-On: #7365
Signed-off-by: Qiang Zhang <qiang4.zhang@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Unlike other CPU IDs, the cpu_id field under //processors//thread in the
board XML is in decimal as it is assigned by the kernel continuously,
starting from 0. However, the cache info extractor today parses them as
hexadecimal numbers, leading to incomplete cache info when more than 10
processors are present on the board. This patch fixes this issue.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Today ACRN works only on platforms with a single PCI domain (which is true
for most client and IoT platforms). This limitation is also used to
simplify the implementation of the board inspector. As a result, on
platforms with multiple PCI domains, the board inspector may crash when
parsing information about PCI devices.
This patch adds a check on the number of PCI domains before the board
inspector attempts to extract any information, and terminates the tool
early if multiple PCI domains are detected.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the import of the `sys` module in platformbase.py which
uses `sys.exit` to terminate the board inspector upon fatal errors.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The lookup extractor of the board inspector filters out non-PCI or
non-present devices by checking the presence of vendor ID and class code.
The same logic applies to PCI buses as well, but is neglected today.
This patch adds the missing check.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the command line option --add-llc-cat to the board
inspector to allow users adding CAT capabilities of the last level cache to
the generated board XML even when the hardware does not report so for any
reason.
Tracked-On: #6690
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds logic to the extractors to fetch the following information.
1. All the details of an SR-IOV capability, which are reported in the
SR-IOV extended capability structure.
2. Correctly report the vendor ID, device ID and BAR addresses of VFs.
3. Refer each VF back to the corresponding PF. Use XPATH to search for
all the VFs enabled by a PF.
Tracked-On: #7301
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the logic needed to fully parse an SR-IOV extended
capability structure. Such information will later be used to extract all
information about physical and virtual functions.
Tracked-On: #7301
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In order to ease the access of certain capability structure of a PCI config
space, this patch changes the class PCIConfigSpace to maintain a
_caps_as_dict dictionary that maps capability names (as specified in the
caps.py and extcaps.py) to the actual capability structures.
Tracked-On: #7301
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Many of the license and Intel copyright headers include the "All rights
reserved" string. It is not relevant in the context of the BSD-3-Clause
license that the code is released under. This patch removes those strings
throughout the code (hypervisor, devicemodel and misc).
Tracked-On: #7254
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
fix the path issue that fail to read XSD file.
Tracked-On: #6689
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
1. check if VMX feature is enabled in the BIOS setting.
If disabled, board inspector will show error message.
2. check if Hyper-Threading is enabled in the BIOS setting.
If enabled, board inspector will show warning message.
3. check if VT-d is enabled in the BIOS setting.
If disabled, board inspector will show error message.
v2-->v3:
Use the class names instead of addresses, and invoke the rdmsr method
of each class.
v1-->v2:
1. For the Hyper-Threading BIOS check, update the log level to the warning.
2. For VMX invalid BIOS check, the XDS does the actual check,
the board inspector only collects information.
Tracked-On: #6689
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add CPU capability checks.
If a feature is not supported on this processor, the board inspector
will show error message because it would impact ACRN’s ability
to function properly.
v3-->v4:
Update the error messages.
v2-->v3:
1. For VMX features, split each feature as a separate property, capability
checks in XML schema will then check all those features.
2. Use the class names instead of addresses, and invoke the rdmsr method
of each class.
v1-->v2:
1. Define each register as a class inheriting the `MSR` class defined
in platformbase.py, and define each bit as fields of that class.
2. The board inspector simply collects the CPU capability and attribute,
and the XSD does the actual check
Tracked-On: #6689
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
