Commit Graph

475 Commits

Author SHA1 Message Date
Jie Deng
d6138210b6 dm: free entries in pci_businfo[] when deinit
Entries of pci_businfo[] allocated in function "pci_parse_slot"
using calloc need to be freed when deinit.

Signed-off-by: Jie Deng <jie.deng@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2018-05-15 13:29:15 +08:00
Yonghua Huang
a1ad2207e7 remove potential using default i/o handler
- device driver should register valid i/o handlers
  in any cases, avoid referencing to default handler

- remove i/o handler test code as they shall
  never be NULL.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 13:27:14 +08:00
David B. Kinder
84c3a6d8b9 devops: Add CODEOWNERS for GitHub review
Seed an initial CODEOWNERS file.  Update as owners for specific areas
are defined.

You can use a CODEOWNERS file to define individuals or teams that are
responsible for code in a repository. The listed names must have write
permissions for the repository.

Code owners are automatically requested for review when someone opens a
pull request that modifies code that they own. When someone with admin
or owner permissions has enabled required reviews, they also can
optionally require approval from a code owner before the author can
merge a pull request in the repository.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-15 12:04:40 +08:00
Yan, Like
1f3e38b306 tools: acrntrace: fix NULL pointer issue in create_trace_file_dir()
Fix NULL pointer dereference if 'localtime()' execution encountered an error,
in create_trace_file_dir().

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 12:03:53 +08:00
Yan, Like
0f847e35a7 tools: acrnlog: fix issues founded in static analysis
fixed two issues: 1) potential uninitiliazed usage of 'len' in
hvlog_read_dev(); 2) NULL dereference of 'last' if 'calloc' failure.

Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 12:03:53 +08:00
Minggui Cao
20d375f33a add a makefile under project root directory
it can be used as following:
  make ==> to make hypervisor & devicemodel & tools
also modify tools makefile to support out-dir setting.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jack Ren <jack.ren@intel.com>
2018-05-15 11:37:42 +08:00
Yonghua Huang
9154176626 I/O VM-exit handler cleanup
- add check for spanning i/o devices access
- remove ASSERT in I/O instr. VM exit handler

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 11:28:45 +08:00
Zhao Yakui
1361b8a866 HV: Enable the -O2 option for HV
Now the -O0 option is used. In such case the code is not optimized.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 10:36:10 +08:00
Zhao Yakui
aa6c4e7666 HV: Initialize one variable to fix the compiling warning
If the optimization option is enabled, it is possible that one variable is 
not initialized before using in the get_vioapic_info. (In fact the warning is
bogus)
This is only to reduce the compiling warning.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2018-05-15 10:36:10 +08:00
Zhao Yakui
fda00e6cd7 HV: Add gcc compiler option to disable FPU/SSE/MMX
FPU/SSE is not supported in HV. Otherwise it is possible that the
SSE/FPU register is used under -O2 option.
So the gcc option is added to disable them.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 10:36:10 +08:00
Zhao Yakui
42bbc22ef2 HV: Use the CFLAGS to control the optimization option
Now two flags can be used to control the optimizatin option. So unify them
and only one flag can be used to config the optimization

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 10:36:10 +08:00
Zhao Yakui
7de42842d5 HV: Add one correct Descriptor_table struct to configure VMCS
Now one uint64_t type is used to obtain the corresponding descriptor_table
for GDT/IDT. This will cause the stack protect corruption under -O2.
So the descriptor_table struct is added to configure the GDT/IDT of VMCS.

V1->V2: Move the descriptor_table into vmx.h header file
And its type is renamed from dt_addr_t to descriptor_table.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 10:36:10 +08:00
Zhao Yakui
52ca0fe8fc HV: Fix the incorrect operand-constraints for inline assembly
The RFLAGS will be touched in some inline assembly.(exec_vmxon/
RFLAGS_RESTORE). The "cc" constraint should be added. Otherwise
it won't be handled under -O2 option.
And "%%XXX" register should also be added into constraints.
Otherwise it will be optimized incorrectly.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 10:36:10 +08:00
Li, Fei1
3daff9c286 hv: vlapic_timer: refine vlapic tscdeadline timer
Add vlapic_create_timer/vlapic_reset_timer to setup/reset a timer.
Add vlapic_update_lvtt to disarm timer when mode changes.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 10:35:12 +08:00
Li, Fei1
9bfcaf9a20 hv: vlapic_timer: add vlapic timer mode API
Add vlapic_lvtt_oneshot, vlapic_lvtt_masked
rename vlapic_periodic_timer to vlapic_lvtt_period
rename VLAPIC_TSCDEADLINE to vlapic_lvtt_tsc_deadline

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 10:35:12 +08:00
Li, Fei1
2b3e36692d hv: vlapic: coding refine
Using __func__ instead of function string name.
Using tab instead of more whitespace.
Using macro instead of numeric constants.
Remove unnecessary function declaration.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 10:35:12 +08:00
Li, Fei1
c40d9f23b2 hv: vlapic_timer: remove vlapic one-shot/periodic timer implement
These code is useless since it just pseudocode. Current it doesn't
support vlapic one-shot/periodic timer.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 10:35:12 +08:00
Li, Fei1
8153ec7aaa hv: timer: make the timer list be ordered
make the timer list be ordered to speed up expried timer
process and next timer event finding.

Add timer would not schedule timer unless it's the next
timer event.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 10:35:12 +08:00
David Kinder
97af90250a
Merge pull request #177 from gvancuts/point-at-top-level-license
Documentation: update the contributing guide to use new LICENSE file
2018-05-14 09:05:57 -07:00
Geoffroy Van Cutsem
bdaea88afe Documentation: update the contributing guide to use new LICENSE file
Update the "Contributing Guidelines" document to point at the
top-level LICENSE file that was created after the merger of
the three acrn-{hypervisor,devicemodel,documentation} repositories

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-14 13:41:43 +02:00
Yan, Like
26e7b260b1 Move ACRN tools code directory one level higher
The tools directory is moved out of ./devicemodle, to be in parallel with
hypervisor, devicemodel and doc.

Signed-off-by: Yan, Like <like.yan@intel.com>
2018-05-14 17:57:47 +08:00
David Kinder
bbac18cf19
Merge pull request #170 from dbkinder/readme
doc: add project README
2018-05-11 14:28:40 -07:00
David B. Kinder
5b62cd2796 doc: add project README
Simplify the previous README and add more information about project
resources.

Fixes: #144

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-11 14:16:05 -07:00
David Kinder
98add35b14
Merge pull request #172 from dbkinder/docbuild-fix
doc: update doc building howto
2018-05-11 13:28:41 -07:00
David B. Kinder
4493b425c7 doc: update doc building howto
Post-merge, the doc building instructions need an update to reflect the
new diretory structure.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-11 13:21:52 -07:00
David Kinder
881d54c6fd
Merge pull request #164 from dbkinder/fix-doc-merge
doc: post-merge changes to docs
2018-05-11 13:05:13 -07:00
David Kinder
e5bd752a2a
Merge pull request #169 from rustylynch/master
Fix typo in gitignore
2018-05-11 11:25:11 -07:00
David Kinder
33b6e83b67
Create LICENSE (#168)
* Create LICENSE

* Create LICENSE

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-11 11:23:30 -07:00
Rusty Lynch
f6efbe8e36 Fix typo in gitignore
Signed-off-by: Rusty Lynch <rusty.lynch@intel.com>
2018-05-11 11:09:50 -07:00
David B. Kinder
bb5113c38d doc: post-merge changes to docs
Documentation updates were needed to account for changes caused by the
recent merging of the three acrn-hypervisor, acrn-devicemodel, and
acrn-documentation repos.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-11 10:05:05 -07:00
lijinxia
53fb54d6a8
Merge pull request #159 from gvancuts/master
Merging acrn-devicemodel and acrn-documentation
2018-05-11 17:00:46 +08:00
Geoffroy Van Cutsem
58c31cf56d Move ACRN documentation in a dedicated doc/ folder
Adjust various scripts accordingly

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-10 23:14:01 +02:00
Geoffroy Van Cutsem
b533db6401 Merge remote-tracking branch 'documentation/master'
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-10 01:54:18 +02:00
Geoffroy Van Cutsem
d93066f769 Move ACRN Device Model code in a devicemodel/ folder
This is part of the short series of commits that will lead
to a unified repository for the ACRN hypervisor, device model
and the associated documentation.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-10 01:51:51 +02:00
Geoffroy Van Cutsem
e8b4b6a0c2 Merge remote-tracking branch 'devicemodel/master'
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-10 01:49:55 +02:00
Geoffroy Van Cutsem
f7c72f6328 Move ACRN hypervisor code in dedicated hypervisor/ folder
Prepare the repository to be merged with the content of
acrn-devicemodel and acrn-documentation

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-10 01:47:16 +02:00
David Kinder
7a1a823255
Merge pull request #47 from dbkinder/git-issues
doc: add use of GitHub issues
2018-05-09 13:48:43 -07:00
Zide Chen
2523416619 HV: Enable CR0.WP
Page fault could be raised if writing to read-only pages. This is
useful for debugging.

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-09 18:52:49 +08:00
Victor Sun
beb24f893c HV: rename acrn_register to acpi_generic_address
The name of acrn_register is too generic, rename to acpi_generic_address
which is more common.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-09 18:50:52 +08:00
lijinxia
dfcf4f30a0 Revert "HV: Prepare cpu_secondary.S for AP trampoline code relocation"
This reverts commit bfa67fa6a0.
2018-05-09 18:39:42 +08:00
lijinxia
9075c5072c Revert "HV: added memory allocation functions for AP trampoline code relocation"
This reverts commit 41b83bb20b.
2018-05-09 18:39:42 +08:00
lijinxia
e80a4d85e0 Revert "HV: Make AP trampoline code relocatable"
This reverts commit 31bf2befbf.
2018-05-09 18:39:42 +08:00
lijinxia
92219f42a1 Revert "HV: adjust the base address of guest initial page tables"
This reverts commit 4aab1ea80d.
2018-05-09 18:39:42 +08:00
Zide Chen
4aab1ea80d HV: adjust the base address of guest initial page tables
V2->V3: Updated variable name: trampoline_code_paddr
V1->V2: changed variable name: init_ap_code_addr

These page tablea are sitting right after the trampoline code, so adjust it according to
the actual loaded address for trampoline code

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-09 14:02:24 +08:00
Zide Chen
31bf2befbf HV: Make AP trampoline code relocatable
V3->V4: Updated function/variable names for accurancy
V2->V3: Changed a few function/variable names to make it less confusing
V1->V2: removed the unneccesary cache flushing

- For UEFI boot, allocate memory for trampoline code in ACRN EFI,
  and pass the pointer to HV through efi_ctx
- For other boot, scan E820 to allocate memory in HV run time
- update_trampoline_code_refs() updates all the references that need the
  absolute PA with the actual load address

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-09 14:02:24 +08:00
Zide Chen
41b83bb20b HV: added memory allocation functions for AP trampoline code relocation
V2->V3: Fixed the booting issue on MRB board and removed the restriction
        of allocate memory from address 0

1) Fix the booting from MRB issue
-#define    CONFIG_LOW_RAM_SIZE 0x000CF000
+#define    CONFIG_LOW_RAM_SIZE 0x00010000

2) changed e820_alloc_low_memory() to handle corner case of unaligned e820 entries
  and enable it to allocate memory at address 0
+		a length = end > start ? (end - start) : 0;

-       /* We don't want the first page */
-       if ((length == size) && (start == 0))
-           continue;

3) changed emalloc_for_low_mem() to enable to allocate memory at address 0
-       /* We don't want the first page */
-       if (start == 0)
-           start = EFI_PAGE_SIZE;

V1->V2: moved e820_alloc_low_memory() to guest.c and added the logic to
        handle unaligned E820 entries

emalloc_for_low_mem() is used if CONFIG_EFI_STUB is defined.
e820_alloc_low_memory() is used for other cases

In either case, the allocated memory will be marked with E820_TYPE_RESERVED

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-09 14:02:24 +08:00
Zide Chen
bfa67fa6a0 HV: Prepare cpu_secondary.S for AP trampoline code relocation
V1->V2: removed CONFIG_LOW_RAM_START and added ".org 0" to
cpu_secondary.S

The assumption is trampoline code is relocated while HV is not, so:

trampoline code is built at address 0, and CS register is updated
by SIPI to reflect the correct vector

in real mode part, added extra pointers for page tables and long jump buffer
so it's possible for HV code to patch the relocation offset

in long mode part, use absolute addressing when referring HV symbols,
and use relative addressing for symbols within trampoline code

Signed-off-by: Zheng, Gen <gen.zheng@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-05-09 14:02:24 +08:00
Yu Wang
c04a468128 dm: Reorganize ACRN DM directory.
The current dm, all non-pci and non-acpi related files are put into
hw/platform directory. This is actually disturbed the meaning of
*platform*. The platform devices are mean of board and SoC specific
non-PCI devices, like usb devices, etc.

This patch refines the ACRN dm directory architecture.

For some common device logic files, likes block_if.c/uart_core.c or
usb_core.c. They will move to hw/ directly.

For platform architecture depended files, create arch/ under root dir.
And create sub-dir arch/x86 for x86 architecture, will create more
architectures in future. The pm.c will move to this new dir.

The hw/acpi will be moved to hw/platform/acpi due to acpi also be
considered as part of platform.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
2018-05-09 13:57:44 +08:00
Zide Chen
ec2084a8a8 HV: correct the handling of MU_MEM_ATTR_READ MMU flag
Currently config_page_table_attr() treats MMU_MEM_ATTR_READ exactly as
MMU_MEM_ATTR_BIT_READ_WRITE for PTT_HOST, so even when MMU_MEM_ATTR_WRITE
is not used, the R/W bit in PTE is still being set

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-09 10:56:09 +08:00
Victor Sun
af66e74b73 DM: rename acrn_register to acpi_generic_address
The name of acrn_register is too generic, rename to acpi_generic_address
which is more common.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2018-05-09 10:39:54 +08:00