Added progress bar for board_inspector.py in all extractors and
some detailed step.
Added timeout mechanism for update-pciids command.
Tracked-On: #7973
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
On some platforms the L3 CAT capabilities are not reported via CPUID even
though they are present. The public real-time tuning guide suggests to try
accessing the MSRs directly to detect if L3 CAT is available or not.
This patch implements such guessing logic in the board inspector in order
to enable CAT for users with those kinds of platforms.
Tracked-On: #7948
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The MSR reading and writing routines today has the following issues:
1. The missing of /dev/cpu/*/msr is not properly captured as it is
reported via FileNotFoundError rather than IOError.
2. The wrmsr logic is not updated to use the tmpdevfs msr file.
This patch fixes the issues above which is a prerequisite of adding
additional MSR parsing classes.
Tracked-On: #7948
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In v3.0 the msrfield class has its initializer changed in a way that is
incompatible with the parameter names or the getter/setter. When introduced
from the BITS project, that class allows specifying an MSR field of
arbitrary length by being given the index of the most and least significant
bits.
This patch restores the original behavior of that msrfield class and moves
the use-case specific methods, namely is_vmx_cap_supported and
is_ctrl_setting_allowed, to a helper class.
Parsing of the VMX capability reporting MSRs in msr.py are updated
accordingly, and brief documentation of the MSR fields are added as well.
Tracked-On: #7948
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
As the last step to simplify the steps to enable software SRAM passthrough
to a pre-launched RT VM, this patch generates a virtual RTCT which only
contains a compatibility entry (to indicate that the format of the RTCT is
v2) and a couple of SSRAM or SSRAM waymask entries to report the software
SRAM blocks that pre-launched VM has access. That follows the practice how
ACRN device model generates virtual RTCT for post-launched VMs today.
In case RTCT v1 is used physically, this patch still generates a v2 RTCT
for the pre-launched VM but does not add an SSRAM waymask entry there
due to lack of information.
Tracked-On: #7947
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Today users still need to manually copy the RTCT binary file when they want
to passthrough software SRAM to a pre-launched RTVM, which is far from
being user friendly.
To get rid of that step, this patch extracts all information from the RTCT
table and format them in the board XML which is the only file users need to
copy from their target platform to build the hypervisor. The patch that
immediately follows will then use such information to generate vRTCT for
the pre-launched VM.
A side effect of this change is that more ranges, which represents those
reported by RTCT such as the CRL binary or the error log area, will be
added to the `memory` section of the board XML. The `id` attributes of
those range will be used to identify what that range is for. As a result,
getting RAM of the physical platform from the board XML requires additional
conditions on the `id` attributes to avoid counting non-RAM regions
unintendedly.
Tracked-On: #7947
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch refactors and fixes the following in the ACPI RTCT parser of the
board inspector.
1. Refactor to expose the RTCTSubtableSoftwareSRAM_v2 class directly as
it is a fixed-size entry. There is no need to create a dynamic class
which is mostly for variable-length entries.
2. Rename the "format" field in RTCT entry header to "format_or_version",
as that field actually means "version" in RTCT v2.
3. Properly parse the RTCT compatibility entry which is currently parsed
as an unknown entry with raw data.
Tracked-On: #7947
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Fixed the problem of exception handling of the
incoming type error in reading GSI number method
in 40-acpi-tables.py line 37 when dmesg command
line is too long.
Tracked-On: #7906
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
Use stderror to redirect error message to subprocess.DEVNULL
to hide it when the "update pciids" command is called.
Tracked-On: #7886
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
Modified the copyright year range in code, and corrected "int32_tel"
into "Intel" in two "hypervisor/include/debug/profiling.h" and
"hypervisor/include/debug/profiling_internal.h".
Tracked-On: #7559
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
One had escaped from the global cleaning that commit 8b16be918 did.
Tracked-On: #7254
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Changed default log level into "warning",
and fixed errors in warning log summary.
And further modified the log summary of checking
each message category.
Tracked-On: #7653
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
Support detecting connected usb devices in board_inspector and list them
in the usb mediator configuration menu.
Tracked-On: #7424
Signed-off-by: Calvin Zhang <calvinzhang.cool@gmail.com>
1.Temporarily store the log in the form of tempfile,
and the temporary file will be deleted after the summary log information is displayed.
2.Now, the logs will be printed when they generated as well.
Tracked-On: #6689
Signed-off-by: Ziheng Li <ziheng.li@intel.com>
This patch is about the bug that VMs can't idle.
ACRN enables VM's C-state by extracting host's C-state table.
The C-state table has two types of interfaces: system-IO and mwait. VMs
just need one of them. ACRN can support both.
Currently we are telling users to use the system-IO type. That is, by
adding 'nomwait intel_idle.max_cstate=0' to host Linux's CMD line when
using board_inspector. (The reaseon we were using system-IO is that
mwait was buggy on Apollo Lake.)
But recent tests show that system-IO is somehow buggy. Linux c-state
driver(no matter intel_cstate or acpi_cstate) fails to enter idle state
with system-IO. This can always be reproduced on native environments.
MPERF counters show CPU cores are not in real idle state as expected.
To enable C-state in VMs, we have to switch to mwait.
As ACRN has already supported both system-IO and mwait, we don't have
to modify any code. We just need to tell user to use mwait instead of
system-IO.
That is, don't add 'nomwait intel_idle.max_cstate=0' to host Linux's
CMD line when using board_inspector. Just add 'intel_idle.max_cstate=0'
Due to the Apollo Lake's mwait bug, 'nomwait' is still needed for
Apollo Lake as an exception.
Tracked-On: #7371
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
Some cpu reports a brand string with non-viewable characters. While XML
string value can not contain NULL bytes or control characters.
So replace non-viewable characters in brand string with spaces.
Tracked-On: #7365
Signed-off-by: Qiang Zhang <qiang4.zhang@linux.intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Unlike other CPU IDs, the cpu_id field under //processors//thread in the
board XML is in decimal as it is assigned by the kernel continuously,
starting from 0. However, the cache info extractor today parses them as
hexadecimal numbers, leading to incomplete cache info when more than 10
processors are present on the board. This patch fixes this issue.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Today ACRN works only on platforms with a single PCI domain (which is true
for most client and IoT platforms). This limitation is also used to
simplify the implementation of the board inspector. As a result, on
platforms with multiple PCI domains, the board inspector may crash when
parsing information about PCI devices.
This patch adds a check on the number of PCI domains before the board
inspector attempts to extract any information, and terminates the tool
early if multiple PCI domains are detected.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the import of the `sys` module in platformbase.py which
uses `sys.exit` to terminate the board inspector upon fatal errors.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The lookup extractor of the board inspector filters out non-PCI or
non-present devices by checking the presence of vendor ID and class code.
The same logic applies to PCI buses as well, but is neglected today.
This patch adds the missing check.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the command line option --add-llc-cat to the board
inspector to allow users adding CAT capabilities of the last level cache to
the generated board XML even when the hardware does not report so for any
reason.
Tracked-On: #6690
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds logic to the extractors to fetch the following information.
1. All the details of an SR-IOV capability, which are reported in the
SR-IOV extended capability structure.
2. Correctly report the vendor ID, device ID and BAR addresses of VFs.
3. Refer each VF back to the corresponding PF. Use XPATH to search for
all the VFs enabled by a PF.
Tracked-On: #7301
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the logic needed to fully parse an SR-IOV extended
capability structure. Such information will later be used to extract all
information about physical and virtual functions.
Tracked-On: #7301
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In order to ease the access of certain capability structure of a PCI config
space, this patch changes the class PCIConfigSpace to maintain a
_caps_as_dict dictionary that maps capability names (as specified in the
caps.py and extcaps.py) to the actual capability structures.
Tracked-On: #7301
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Many of the license and Intel copyright headers include the "All rights
reserved" string. It is not relevant in the context of the BSD-3-Clause
license that the code is released under. This patch removes those strings
throughout the code (hypervisor, devicemodel and misc).
Tracked-On: #7254
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
fix the path issue that fail to read XSD file.
Tracked-On: #6689
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
1. check if VMX feature is enabled in the BIOS setting.
If disabled, board inspector will show error message.
2. check if Hyper-Threading is enabled in the BIOS setting.
If enabled, board inspector will show warning message.
3. check if VT-d is enabled in the BIOS setting.
If disabled, board inspector will show error message.
v2-->v3:
Use the class names instead of addresses, and invoke the rdmsr method
of each class.
v1-->v2:
1. For the Hyper-Threading BIOS check, update the log level to the warning.
2. For VMX invalid BIOS check, the XDS does the actual check,
the board inspector only collects information.
Tracked-On: #6689
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add CPU capability checks.
If a feature is not supported on this processor, the board inspector
will show error message because it would impact ACRN’s ability
to function properly.
v3-->v4:
Update the error messages.
v2-->v3:
1. For VMX features, split each feature as a separate property, capability
checks in XML schema will then check all those features.
2. Use the class names instead of addresses, and invoke the rdmsr method
of each class.
v1-->v2:
1. Define each register as a class inheriting the `MSR` class defined
in platformbase.py, and define each bit as fields of that class.
2. The board inspector simply collects the CPU capability and attribute,
and the XSD does the actual check
Tracked-On: #6689
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
This patch adds schema-based board checks mechanism.
This provides integrators with a mechanism that XSD does
the actual board data check.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch extracts all serial ttys in the native environment and updates
the XML schema to specify the XPATH that evaluates to the available ttys
for users to choose as the hypervisor console port.
Tracked-On: #6690
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Add a new extractor 70-device-classes.py which extracts virtio device
input basic information such as: name and phys.
An example:
<device_classes>
<inputs>
<input>
<name>Power Button</name>
<phys>LNXPWRBN/button/input0</phys>
</input>
<inputs>
</device_classes>
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
This patch adds the BDF (in the format BBBB:DD.F) of each PCI device into
its description, which helps the configurator to fetch all available PCI
devices via XPATH rather than text manipulating functions.
Tracked-On: #6690
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
category based on different log levels:
1) If the board inspector show CRITICAL error messages, it means that the
board inspector tool exit instantly and generate no file.
2) If the board inspector show ERROR messages, it means that the board
inspector will generate the board XML file successfully, but several conditions
may result in ACRN build or boot failure cannot continue execution due to the error.
3) If the board inspector show WARNING messages, this means that the board inspector
generate the board XML file successfully, but this board XML file is lack of
some feature which could still boot ACRN but loss some features.
4) If the board inspector show INFO messages, this means that board inspector
printed out some normal information.
5) If the board inspector show DEBUG messages, this means that it is used to
debug board inspector workflow.
v1->v2
1. Keep the assertions or exceptions under the acpiparser, inspectorlib
and smbiosparser directory.
2. Exit after all check_deps() completes instead of any unsatisfied dep
is identified.
3. As Amy's advice, Replace the message "{board_xml} saved successfully" with
the message "SUCCESS: Board configuration file <file name> generated successfully
and saved to <path>."
To do:
Print all messages using the colored font.
Tracked-On: #6689
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Bring all the cores up in the beginning of the board_inspector.py
It is expected to run board_inspector in clean and native environment.
To resolve the issue that user may run other jobs which puts cores
offline, bringing up all cores online so tool can run cpuid to extract
all available cores information.
Tracked-On: #7119
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
In 10-processors.py, level_types is an unordered dictionary from level type
encodings to human-readable terms, not a list. It is thus illegal to access the
highest level using the `[-1]` notation.
This patch fixes this by calculating the highest level in level_types and use
that level as the index instead.
Tracked-On: #6689
Fixes: b5b22bf98 ("board_inspector: avoid hard-coded topo level names")
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
While the terms to refer to CPU topology levels are originally borrowed
from MSR listings in SDMs (i.e. thread, core, die and package), we now
align the topology information with the CPUID topology enumeration
leaf (which does not have a "package" level) in the
implementation. However, some hard-coded level types are not updated
accordingly, leading to strangely organized nodes in the generated board
XML.
This patch refines the CPU extractor of the board inspector by removing
such hard code. Also the XPATH counting the total number of threads is
refined to tolerate the variance of reported intermediate levels.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
INTx routing can be specified in ACPI PRT (PCI Routing Table) in two ways:
1. By an absolute interrupt line from the global interrupt pool.
2. By a device object and an index to its interrupt resource.
The board inspector today only encodes the source object of an interrupt
pin routing in XML device resource descriptors, which is incomplete if the
source is a device object (i.e. case 2 above).
This patch adds the index from PRT to device resource nodes as well.
Tracked-On: #7058
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Today we assume a device node under /sys/devices/pciXXXX:XX/ always contain
a `config` file which shows the configuration space of the PCI
functions. This seems not the case for, at least, Non-Transparent
Bridge (or NTB).
This patch checks the existence of the `config` file and skips PCI
functions which do not contain one.
Tracked-On: #6902
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
The stream tracks the AML binary to be parsed as a list of bytes, not
characters. It makes no sense to call `ord` with a byte as the input
parameter.
This patch also adjust the format of the dump and print the formatted using
the logging module.
Tracked-On: #6504
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Add a new extractor 40-acpi-tables.py which extracts ioapics basic
information such as: ioapic id, address, gsi base and gsi number.
An example:
<ioapics>
<ioapic id="0x2">
<address>0xfec00000</address>
<gsi_base>0x0</gsi_base>
<gsi_number>240</gsi_number>
</ioapic>
</ioapics>
Tracked-On: #6986
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
According to PCIe specification (since 2.0), absence of any extended
capabilities is required to be indicated by an extended capability header
with a capability ID of FFFFh and a next capability offset of 000h. Thus,
the board inspector today accesses the first extended capability header at
100h in the configuration space of a PCIe function unconditionally.
However, in practice we have seen real PCI functions which has a PCIe
capability but no extended capability header. This will cause the board
inspector to crash due to invalid configuration space accesses.
To fix that, this patch adds a check to the size of the configuration space
before walking the extended capabilities of a PCIe function.
Tracked-On: #6411
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
1. "make clean && make BOARD=nuc11tnbi5 SCENARIO=shared" will generate the acrn debian package.
2. "make clean && make board_inspector" will generate the acrn board_inspector debian package
Tracked-On: #6688
Signed-off-by: Hu Fenglin <fenglin.hu@intel.com>
