Commit Graph

28 Commits

Author SHA1 Message Date
Kaige Fu
21f0bddff8 HV: instr_emul: Rename emul_cnx to emul_ctxt
ctxt is a more general abbreviation of context.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-09 09:27:42 +08:00
Junjie Mao
91ef6ed59b HV: instr_emul: enforce unsignedness when possible
Most of variables used when decoding instructions are unsigned bit-fields. This
patch adds the 'U' or 'UL' suffix to constants in unsigned context and changes
the type of arguments/local variables when necessary.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao
ecce1e6ae4 HV: instr_emul: make integer conversion explicit
This patch makes necessary integer narrowing and/or signedness conversion
explicit.

While some narrowing are expected behavior, the correctness of the others relies
on the specifications of some interfaces (e.g. the higher 32-bit of what
exec_vmread() returns is all 0s if the given field is 32-bit). Add a stub
for now to avoid missing them.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao
479dacc219 HV: instr_emul: convert cpl to uint8_t
CPL is represented by a plain int but calculated from shifts and bit-wise
operations. Convert it the uint8_t for consistency.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao
ab156c9633 HV: instr_emul: convert return value of get_vmcs_field to unsigned
get_vmcs_field() returns a VMCS field offset which is normally unsigned, but it
also returns negatives (-1 here) on invalid arguments. Following the convention
we use for vectors, pins, etc., use a special unsigned value to indicate such
errors.

v1 -> v2:

    * Use a special value (VMX_INVALID_VMCS_FIELD) instead of a seperate output
      parameter to indicate errors.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao
d457874cf5 treewide: instr_emul: rename vm_reg to cpu_reg
The current register names in instr_emul are misleading since the register names
are not VM-specific. Rename VM_REG(_GUEST) to CPU_REG in both the hypervisor and
device model.

v1 -> v2:

    * Introduced.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao
845437646f HV: instr_emul: keep using enum vm_reg_name for registers
The vm_reg_name is a good example of a collection of discrete values. This patch
replaces signed integers with this type whenever applicable to avoid dependence
on the underlying value of such enumeration constants.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Junjie Mao
edc793145a HV: instr_emul: convert sizes to uint8_t
Op_sizes are mostly from vie->opsize which is a 4-bit field in struct vie. Use
uint8_t instead of int to represent them.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-07-05 13:14:07 +08:00
Huihuang Shi
8b94957774 HV:guest:fix "signed/unsigned conversion without cast"
Misra C required signed/unsigned conversion with cast.

V1->V2:
  a.split patch to patch series

V2->V3:
  a.change the uint64_t type numeric constant's suffix from U to UL

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 12:18:38 +08:00
Kaige Fu
4cd27a5ddd HV: Don't pass retval to vmm_emulate_instruction()
We pass retval to vmm_emulate_instruction and assign the return value to retval
at the same time. The retval will be passed to mmio_read/write finally as memarg
and the functions don't use the parameter actually. Apparently, we misused the
retval.

This patch fix it by passing 'NULL' to vmm_emulate_instruction.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-07-04 09:12:52 +08:00
Kaige Fu
b67836f722 HV: Minor refactor to get_guest_paging_info
Add a new parameter csar to get_guest_paging_info. We will save one exec_vmread
in this case.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-02 10:46:41 +08:00
Junjie Mao
aa505a28bb HV: treewide: convert hexadecimals used in bitops to unsigned
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-06-21 13:12:39 +08:00
Huihuang Shi
cb56086239 HV:guest:fix "expression is not Boolean"
MISRA C explicit required expression should be boolean when
in branch statements (if,while...).

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-20 14:19:47 +08:00
Jason Chen CJ
8d35d8752b instr_emul: remove vm_gva2gpa
- vm_gva2gpa is same as gva2gpa, so replace it with gva2gpa directly.
- remove dead usage of vm_gva2gpa in emulate_movs.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-06-11 12:14:43 +08:00
Jason Chen CJ
48de7efa26 instr_emul: remove vm_restart_instruction and use VCPU_RETAIN_RIP
there is no need to use wrap function vm_restart_instruction, we
can use VCPU_RETAIN_RIP directly

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-06-11 12:14:43 +08:00
Jason Chen CJ
0d6218f980 instr_emul: remove unnecessary params in __decode_instruction
removed unused vcpu & gla params

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-06-11 12:14:43 +08:00
Jason Chen CJ
570aef648a instr_emul: refine decode_instruction with copy_from_gva
use copy_from_gva in vie_init, if copy_from_gva meet -EFAULT, inject #PF.
And for decode_instruction, if return -EFAULT, the caller should keep return
path with successful status.

v2:
- remove vm_restart_instruction when inject #PF

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-06-11 12:14:43 +08:00
Huihuang Shi
e591315a65 HV:treewide:C99-friendly per_cpu implementation change the per_cpu method
The current implementation of per_cpu relies on several non-c99 features,
and in additional involves arbitrary pointer arithmetic which is not MIS-
RA C friendly.

This patch introduces struct per_cpu_region which holds all the per_cpu
variables. Allocation of per_cpu data regions and access to per_cpu vari-
ables are greatly simplified, at the cost of making all per_cpu varaibl-
es accessible in files.

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
2018-06-05 17:09:00 +08:00
Binbin Wu
9e7179c950 hv: support gva2gpa in different paging modes
Translate gva2gpa in different paging modes.
Change the definition of gva2gpa.
- return value for error status
- Add a parameter for error code when paging fault.
Change the definition of vm_gva2gpa.
- return value for error status
- Add a parameter for error code when paing fault.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
Binbin Wu
dd14d8e1b0 hv: add API to get vcpu paging mode
Use # of paging level to identify paging mode

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
Binbin Wu
fb09f9daca hv: update vcpu mode when vmexit
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
2018-06-01 19:14:13 +08:00
David B. Kinder
f4122d99c5 license: Replace license text with SPDX tag
Replace the BSD-3-Clause boiler plate license text with an SPDX tag.

Fixes: #189

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-01 10:43:06 +08:00
Zide Chen
8f16faab04 HV: further cleanup of header inclusions
According to the comments in hypervisor:
 " This file includes config header file "bsp_cfg.h" and other
	hypervisor used header files.
	It should be included in all the source files."

this patch includes all common header files in hypervisor.h
then removes other redundant inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Zide Chen
d594878e31 HV: cleanup for header inclusions.
used https://gitlab.com/esr/deheader to detect and remove unnecessary
header file inclusions

Signed-off-by: Zide Chen <zide.chen@intel.com>
2018-05-25 10:45:56 +08:00
Yonghua Huang
fbaff2aa35 HV:remove redundant field 'mmio' from 'struct emul_cnx'
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-23 11:43:56 +08:00
Yonghua Huang
aee1931ee6 HV: refine 'decode_instruction() function
update:
   1. remove 'struct mem_io *'from input arguments
   2. return 'opsize' instead of status.
   3. rename 'vmm_decode_instruction()'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-22 16:41:19 +08:00
Yonghua Huang
0e5f7cb91c hv: bugfix - MMIO access size was not properly initialized.
- MMIO access size is not initialized before
  instruction emulation.
- rename 'analyze_instruction()' to 'decode_instruction()'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-18 16:37:44 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00