PIC pin IDs should be logically unsigned, while we currently use ''int'' to
represent them.
Following the convention we use unsigned IDs, this patch converts the
representation of pins to uint8_t. A special value VPIC_INVALID_PIN is
introduced to represent the case when a valid target pin cannot be
found (previously -1 is used for this case). The branch conditions are updated
accordingly, following the convention below.
(for ''pin''s representing a per-PIC pin)
if (pin != -1) -> if (pin < NR_VPIC_PINS_PER_CHIP)
if (pin == -1) -> if (pin >= NR_VPIC_PINS_PER_CHIP)
if (pin >= 0 && pin < 8) -> if (pin < NR_VPIC_PINS_PER_CHIP)
if (pin >= 0 && pin <= 7) -> if (pin < NR_VPIC_PINS_PER_CHIP)
if (pin >= 0) -> if (pin < NR_VPIC_PINS_PER_CHIP)
(for ''pin''s representing a pin in the vPIC with 2 cascading PICs)
if (pin >= 0 && pin <= 15) -> if (pin < NR_VPIC_PINS_TOTAL)
if (pin > 15) -> if (pin >= NR_VPIC_PINS_TOTAL)
Related local variables are also changed accordingly.
v1 -> v2:
* Rename the number of pins per PIC to NR_VPIC_PINS_PER_CHIP, and the number
of pins of 2 cascading PICs to NR_VPIC_PINS_TOTAL.
* Using "%hhu" instead of "%d" in format string when a pin is expected.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
We've been expanding documentation, and now need to organize things a bit
cleaner and separate content into new major folders: Introduction, Getting
Started, User Guides, Developer Guides, Tutorials, and Release notes..
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
According intel mannual and ACPI mannual,lapic_id length is 1 byte.
V1->V2:
Add U suffix to the numeric when do arithmetic operation on lapic.
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
This analyzer is implemented in vmexit_analyze. This patch make it as independent
analyzer with an option "--irq"
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
- Refactor vmexit_analyzer based on new trace format (raw data). We can get
the same output like original implementation.
- Remove irq related analysis. Will add it back with an option "--irq".
- Remove unused VMEXIT_EPT_VIOLATION_GVT
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
As we may analyze multi-cases at the same time. It's better to store all the
analyzer in an array. Then we can traverse the array and exec all analyzer one
by one.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Originally, acrntrace stores cpu frequency in output file and use it for time-based
analysis. Actually, we should use TSC frequency instead of cpu frequency.
This patch change to using TSC frequency for time-based analysis and introduce
an option "-f --frequency" to let user configure TSC frequency.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
acrntrace_format.py is used for parsing raw trace data to human-readable file on
given format. A sample format file for acrntrace predefined trace events is available
in tools/acrntrace/scripts/formats in acrn source tree.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Benefits of outputing trace data as raw data:
- Smaller trace data size
- More convenient to add new trace entry. There is no need to change acrntrace
when we add new trace entry to HV. All we need do is to update the analysis
scripts to deal with this situation.
Trace data size(with 1 UOS):
~57M -- with patch
~137M -- without patch
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Later patch will refactor acrntrace to make trace data output as raw data(binary)
and introduce a new tool(acrntrace_format) to parse raw data to human-readable
file.
Adding nr of data and cpuid to trace_entry will make it easy for acrntrace_format
to parse data file and inditify which cpu this trace entry belong to.
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Some build environment might has no USER pre-defined. So use id tool to
get builder username instead of USER environemnt.
Also add a version cleanup for tools to keep them updated.
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Acked-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
This patch drops the duplicated definitions to ''true'' and ''false'' and
initializes boolean variables with boolean values instead of integers.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Port I/O handlers are expected to accept unsigned port address and width which
have type uint16_t and size_t accordingly. The internal handlers in vpic, on the
other hand, declares signed addresses and width in their prototypes. This patch
enforces unsignedness of addresses and widths in these handlers.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The number of initialization command word (ICW) and register contents are
logically unsigned and they have already been used in such way. This patch
changes the declaration of them so that the declarations, definitions and uses
are all aligned.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
WIFI dev has no FLR, so 'reset' in sysfs calls secondary bus reset,
which cause PCI configuration mess(all FF) then passthrough failure.
To fix it, this patch makes no reset before passthrough by default,
until append this option.
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Use right parameter in launch_uos.sh after updating prefer_msi option
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Current option of removing vGSI capability is global, which exposes
vIOAPIC link for all ptdev even only one need this. This patch makes
it as ptdev local option to lower the system level impact. To keep
vGSI for MSI capable ptdev, just explicitly append ",keep_gsi" in
option list, like "-s 14,passthru,0/e/0,keep_gsi"
Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
The local variable type should be transfer to non-basic type,
chaned it to length-prefix(uint32_t,int32_t ...) type.
Char *type or char array type which used to pointer a string
will be keeped.
V1->V2 add extra comments.
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
HPET reading is much slower than TSC. Using it will hurt SOS performance
a lot, and then the whole system performance.
Remove the strict assignment from cmdline. Then SOS kernel will pickup
TSC as default clocksource.
Signed-off-by: Shuo Liu <shuo.a.liu@intel.com>
Reviewed-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
ACRN needs to trap the pm1a/pm1b written/read from VM0. So we
could know when should we put the system to S3.
We will have two path back to VM0:
- S3 enter/exit sucess. Will reset VM0 and jump to VM0 wakeup vec
with real mode
- S3 enter/exit failed. Will return to the next instruction of
pm1a/pm1b register writing. VM0 will read the pm1a/pm1b evt
register to check whether it's waked up or not.
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
S3 resume path for VM0 is put bsp of VM0 to real mode and jump
to the wakeup vec of VM0. So we need to extend the init_guest_state
to support start from real mode.
We apply different CS:IP setting for BSP:
- if entry_addr of BSP is larger than 0x100000, it's not wakeup
from S3. We assume it's guest start and set CS:IP by hardcode.
- if entry_addr of BSP is smaller than 0x100000, it's wakeup
from S3. We setup CS:IP according to ACPI spec.
Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Emulate VM0 resume from S3 state:
- reset BSP of VM0
- set the BSP entry to saved VM0 wakeup vec and set BSP to real mode
- start BSP
To match trampoline_spinlock release on ACRN Sx resume path, acquire
trampoline_spinlock if ACRN Sx enter fails.
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
enter_s3 is main function for ACRN to enter S3 state with following
process:
- pause vm0
- save the wakeup vec of vm0 and set wakeup vec of ACRN. So
resume from S3 will jump to ACRN wakeup
- offline APs
- update the main entry of trampoline to resume entry. After BSP
is resume from S3, it will jump to resume entry instead of AP
startup routine
- turn off vmx
- suspend devices
- enter S3.
exit S3 with following process:
- release trampoline_spinlock which is hold in trampoline code
- resume devices
- enable vmx
- update the main entry of trampoline to AP startup routine.
- online APs.
The following operations will be resume vm0 which will be added
in next patch.
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Couple of small changes merged in this change:
- export main_entry, trampoline_spinlock and stop_cpus.
- change vm_resume() name to resume_vm()
- change resume_console_enable() name to resume_console()
- extend reset_vcpu to reset more fields of vcpu
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
The S3 enter lowlevel routine saves the cpu context to memory
and enter S3 state
The S3 wakeup lowlevel routine restore cpu context and return.
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
We will add host_pm.h for ACRN power manager header file.
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- add a commont head file include/common/irq.h, to include the common data
structure and APIs;
- move the common data struct and APIs from arch/x86/irq.h to the common header.
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
To make the file structure clearer, change the file names:
- rename arch/x86/interrupt.c to virq.c, for the virtual irq relavant code,
such as irq injection etc;
- merge arch/x86/intr_main.c into arch/x86/irq.c;
- rename arch/x86/intr_lapic.c to lapic.c
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Previously, either rnd->fd or vbs_k->fd isn't be closed in some cases.
this patch will close them in time.
V2: fix vbs_k->fd leak as well
Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com>
- hardcode the devices' GSI info based on the platform
- reject the passthrough if the following requirement is not met
all the PCI devices that are sharing the same GSI should be assigned
to same VM to avoid physical GSI sharing between multiple VMs.
v4 -> v5
* Move the gsi_dev_mapping_tables definition in a separate file
* Add the GSI info that might be used by GPIO
* Update the HW name
v3 - > v4
* Refine the format of raw data to improve the readability
* Remove the redundant code when adding the new dev into the gsi
sharing group
v2 -> v3
* Add the MSI/MSI-x capability check
Do not add the device which supports MSI/MSI-x to the GSI sharing
group.
v1 -> v2
* Update the GSI raw data based on SBL
* Free the resources when gsi sharing violation occurs
* Move the MACRO PCI_BDF(b, d, f) to pci_core.h since passthrough.c
and gsi_sharing.c are both using it
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Edwin Zhai <edwin.zhai@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
MISRA C required function return type should be consistented.
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Update the vcpu id type as uint16_t for vm_create_vcpu, this
keeps alignment with the updates for the structure acrn_create_vcpu
used by hcall_create_vcpu in the hypervisor.
In the device model, the caller is responsible for vcpu id type
conversion; vcpu id type is uint16_t for external interface in the
current implement.
Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
It is already assumed that ''long'' has 8-bytes, and thus there is no need to
use ULL to indicate a 8-byte unsigned constant.
This patch changes all ULL suffixes found in the hypervisor to UL.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
- to avoid reading operations on MTRR registers if
no MTRR feature support on current platform in "init_mtrr()".
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
The device model is a userspace application on SOS to config the
PCI devices for the UOS. Audio mediator device model is to config
the virtual audio PCI device.
Signed-off-by: Zhu Yingjiang <yingjiang.zhu@linux.intel.com>
When enabling GPU passthru for guest, stolen memory needs to be
disabled. This change disables stolen memory in passthru mode.
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
Snoop control is not supported in the graphics VT-d engine and so should
be disabled in the PTEs. Also enabled iommu for graphics in the
dmar_drhd array.
v2: removed disable iommu in handle_one_drhd and combined if cond.
v3: minor code review changes
v4: moved the snoop control change to ept.c to accomodate upstream changes
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
To enable GPU passthru, BAR2 allocation had problems when the allocation
is above the 4GB memory.This change is to accomodate the 256MB aperture
allocation in BAR2 to a more managable address.
v2: changed the MEMBASE64 address instead of increasing the mem_size.
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Reviewed-by: Gong Zhipeng <zhipeng.gong@intel.com>
The for loop statement should work in both & and &&, but it seems
make more sense to have && when executing a condtion.
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Fix the type for vector in ioapic setup, which is a potential problem:
- return VECTOR_INVALID instead of false in irq_desc_alloc_vector()
when irq is out of range;
- change variable type from int to uint32_t for vector, and correct
the returned value check.
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
For hypervisor, we initliaze the flags used in build command
to empty to avoid flags set in default env impact to hypervisor
build.
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: VanCutsem Geoffroy <geoffroy.vancutsem@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This adds Python3 and the 'kconfiglib' tool to all Dockerfiles.
This is required in order to build (and/or configure) the ACRN
hypervisor.
It also adds 'findutils' to all Fedora Dockerfiles as both 'find'
and 'xargs' are used in some Makefiles and provided by this package.
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
It could be also used by host as well. So we remove GUEST from
MACRO name
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
for bsp_boot_init/cpu_secondary_init, they are on temp stack.
for bsp_boot_post/cpu_secondary_post, they are on runtime stack.
define SWITCH_TO MACRO to switch runtime stack then jump to post functions.
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
