Commit Graph

3015 Commits

Author SHA1 Message Date
Arindam Roy
de8d85753e HV: Modularize vtd.c to remove acrn_vm usage
This patch is a modified one. It removes the usage
of acrn_vm struct from inside vtd.c.
It also puts struct iommu_domain inside vtd.h,
from vtd.c.
It modifies the signature of init_iommu_domain
in order to remove dependency on acrn_vm from
inside vtd.c.
Incorporated comments from Jason and Eddie.
Changed the name of sos_vm_domain to
fallback_iommu_domain
Removed any reference of sos_vm from vtd.[c|h]
files, including comments.

Tracked-On: #2496
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-06 08:53:46 +08:00
Peter Fang
24cf377d5d dm: vhpet: fix vHPET memory leak on device reset
Need to properly remove and free its MMIO entry during deinit.

Tracked-On: #2453
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Yin Fengwei <fengwei.yin@intel.com>
2019-02-06 08:53:27 +08:00
Yonghua Huang
c855b78230 hv:refine coding style for trusty_hypercallc.
remove some redundant code

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 15:06:05 +08:00
Mingqiang Chi
229fbdd81d hv:cleanup header file for vcpu.c & vcpu.h
For vcpu.c and vcpu.h,only include some necessary
header files, doesn't include hypervisor.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:50:42 +08:00
Mingqiang Chi
3d878a9123 hv:cleanup header file for vm.c & vm.h
-- now hypervisor.h is the universal set of header file,
   this patch doesn't include hypervisor.h, only include
   some necessary header files for vm.c and vm.h
-- move 'struct vcpuid_entry' from vm.h to vcpuid.h
-- remove dead code 'enum vm_privilege_level'
-- move 'enum vpic_wire_mode' from vm.h to vpic.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:50:42 +08:00
Shiqing Gao
b5f4757650 hv: refine guest.h
- move functions related vmexit from `guest.h` to `vmexit.h`
- move functions related msr from `guest.h` to `msr.h`
- move functions related vm_sw_loader from `guest.h` to `vm.h`
- move function `vmx_vmrun` from `guest.h` to `vcpu.h`
- move MACROs related to vcpu from `guest.h` to `vcpu.h`
- move MACRO `E820_MAX_ENTRIES` from `guest.h` to `e820.h`
- move MACROs related to irq from `guest.h` to `irq.h`
- rename `guest.h` to `guest_memory.h`

Tracked-On: #2503
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 13:00:42 +08:00
Victor Sun
827d24ccb9 HV: repace vpci_vdev_array with pci_ptdev config
Use acrn_vm_pci_ptdev_config struct for PCI PT devices configuration
in acrn_vm_config, the only needed configure item is PT devices's
vBDF and pBDF info. When init PT devices, the BDF info will be stored
in pci_vdevs[] of acrn_vm.

With this patch, the previous vpci_vdev_array struct is not needed.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-03 08:18:54 +08:00
Mingqiang Chi
af1e5d5742 hv:remove several redundancy variables related memory
Remove redundancy code since they are not used now.
-- remove 'max_ram_blk_base' & 'max_ram_blk_size' in
   struct e820_mem_params
-- remove 'gpa_lowtop' in struct vm_hw_info
-- remove MACRO 'UOS_DEFAULT_START_ADDR'

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 22:59:34 +08:00
Victor Sun
d05af3526f HV: vm description clean up
The partition mode vm config in vm_description.c is abandoned,
so delete the file. Its related struct in vm.h is also removed;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 17:41:33 +08:00
Victor Sun
55efc763ae HV: switch vm configs array for partition mode
The previous VM configs array for partition mode is inside struct of
vm_config_partition and named as vm_config_array[], now switch to
global vm_configs[];

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 17:41:33 +08:00
Victor Sun
9e33178998 HV: add vm config files for partition mode
Add VM configure files for Intel apl-mrb and dnv-cb2 platforms.

The board specific config header is named as partition_config.h and
the PCI passthrough device list is named as pt_dev.c under
hypervisor/arch/x86/configs/$CONFIG_BOARD folder.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 17:41:33 +08:00
dongshen
f4adb109de HV: store a pointer to pdev instead to save memory.
As we store the physical pci device info in a global pdev array, the vdev struct can
store a pointer to pdev instead.

Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
Victor Sun
6ba07e64b9 HV: remove ptdev ops init in vm description
The ptdev ops will be initialized automatically during ptdev init, so
remove the hardcoded ops in vm_description.c

Tracked-On: #2431
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
Victor Sun
69d883560a HV: remove bar info in vm description
We have enabled bar decoding in init ptdev, so hard-coded bar info is not needed
any more.

Tracked-On: #2431
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
Victor Sun
f082176df0 HV: init ptdev bar during runtime for partition mode
Current pt devices bar info for partion mode is hardcoded in
vm_description.c, now we remove the hardcoded info and parse the bar
info during pt devices init.

Tracked-On: #2431
Signed-off-by: Victor Sun <victor.sun@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
dongshen
983b717a61 HV: use the cached pci device info for sharing mode
Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
dongshen
e0f9d14011 HV: scan all physical PCI devices and store all needed info in array
Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
dongshen
65f9370d76 HV: move struct pci_bar and pci_pdev to pci.h
Tracked-On: #2431
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-02-02 15:24:43 +08:00
Victor Sun
0f745b4d15 HV: e820 refinement
- add e820 info in struct acrn_vm;

- rename rebuild_sos_vm_e820() to create_sos_vm_e820();

- add create_prelaunched_vm_e820() for partition mode;

- rename create_e820_table() to create_zeropage_e820() and merge for
  both sharing mode and partition mode;

- move create_xxx_vm_e820() to vm.c;

- move create_zeropage_e820() to vm_load.c;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 11:53:37 +08:00
Victor Sun
11bfe3d43e HV: move e820 entry out of vm description
move e820_default_entries[] from vm_description.c to ve820.c and rename
to ve820_entry[] as a temparary solution for partiton mode e820 management;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-02 11:53:37 +08:00
Li, Fei1
ce19dd423e hv: vlapic: make vlapic deliver interrupt related functions more readable
Rename vlapic_deliver_intr to vlapic_receive_intr: ioapic/msi device
deliver an interrupt to lapic.
Rename vlapic_pending_intr to vlapic_find_deliverable_intr: find a
deliverable interrupt which pending in irr and its priority large than ppr.
Rename vlapic_intr_accepted to vlapic_get_deliverable_intr: get the deliverable
interrupt from irr and set it in isr (which also raise ppr update)

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2019-02-02 09:31:49 +08:00
Yonghua Huang
123c2b5fa4 hv: rename MACROs 'VMX_CRx_MASK"
CRx 'guest/host mask' is widely used when talking
  about CR0/CR4 virtualization in SDM spec,
  rename them to 'VMX_CRx_GUEST_HOST_MASK'.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-01 16:49:39 +08:00
Shiqing Gao
49623fc073 hv: refine guest.c
- move `vcpumask2pcpumask` from `guest.c` to `vcpu.c`
- move `prepare_sos_vm_memmap` from `guest.c` to `vm.c`
- rename `guest.c` to `guest_memory.c`

Tracked-On: #2484
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-01 16:30:55 +08:00
Yuan Liu
be946ca8e0 IOC mediator: dynamically enable dummy channels
The dummy channels can emulate cbc lifecycle, cbc signal and cbc raw
channel instead canbox, and the feature can be enabled by ioc command
line within wakeup reason bit 24.

Tracked-On: #2481
Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2019-02-01 16:05:43 +08:00
Sainath Grandhi
f122d6bd32 hv: Add Interrupt Remapping Enable/Disable APIs
This patch adds IR enable/disable APIs. Upon boot, enabling IR is
deferred until the first interrupt source is programmed. This is done
for UEFI platforms as UEFI bootloader depends on timer interrupt and
the programming of timer interrupt source is done before ACRN gets a
chance to run during boot.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-02-01 15:54:55 +08:00
Sainath Grandhi
970821462b hv: Use Interrupt Remapping format for programming interrupt sources
When a corresponding IOMMU is found for the device, this patch adds
support to program Interrupt Remapping hardware RTEs and the original
interrupt sources (MSI or IOAPIC) with IR format.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 15:54:55 +08:00
Grandhi, Sainath
7104f0a512 hv: Add support to add IR tables
Interrupt Remapping hardware in x86 can hold 64K entries with each entry
of size 16 bytes. So 256 entries occupy 4K. Adding a configuration for
developer to choose number of IR entries, in multiples of 256. ACRN does
not boot on platforms that does not support Interrupt Remapping and
Extended Interrupt Mode

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 15:54:55 +08:00
Grandhi, Sainath
cb46937bf5 hv: Enumerate IOAPIC info from DMAR table
IOAPIC info from DMAR table is needed to match the IOAPIC info from
MADT. This patch adds support to get id and bus, devfn for IOAPIC
from DMAR. IOAPIC info for SBL platform is hardcoded in the header
file.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 15:54:55 +08:00
Grandhi, Sainath
4ff9f5dfb2 hv: Enumerate IOAPIC info from MADT
IOAPIC info, specifically ID, is needed to map the IOAPIC to
corresponding DMAR. DMAR table in ACPI has a field that has IOAPIC
ID, that matches the info provided in MADT. Both (IOAPIC info from
MADT and from DMAR) is needed for remapping IOAPIC interrupts.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-02-01 15:54:55 +08:00
Grandhi, Sainath
fb6e9267f3 hv: Support Queued Invalidation
As we enable Interrupt Remapping Hardware in ACRN, Queued Invalidation
(QI) needs to be used clear DMAR hardware caches. This patch introduces
Queued Invalidation APIs. Code related to Register based Invalidation
is removed from ACRN and platforms that do not support QI cannot boot
with ACRN after this patch.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 15:54:55 +08:00
Xiaoguang Wu
80dc0bce3e DM: ACPI: Avoiding hard code the ASL_COMPILER macro
The ASL_COMPILER macro is hard coded as /usr/sbin/iasl, it is
complained by some developers. This patch changes it to a
flexible way, by which the following make command lines are
supported:

make
make devicemodel
make ASL_COMPILER=/path/to/iasl
make ASL_COMPILER=/path/to/iasl devicemodel

Tracked-On: #2298
Signed-off-by: Xiaoguang Wu <xiaoguang.wu@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>
2019-02-01 13:47:55 +08:00
Min Lim
342d29eea8 profiling: fix the system freeze issue when running profiling tool
The msr load/restore during vmexit/vmentry is enabled in HV by
default. The profiling has assumption that it's only user for this
feature, which could overwrite of HV default setting.

This fix combine the msr load list for vmexit when profiling.

Tracked-On: #2422
Signed-off-by: Min Lim <min.yeol.lim@intel.com>
2019-02-01 13:21:15 +08:00
Min Lim
ec4dd2284c profiling: enable to capture dropped samples while buffering
Since the profiling utilizes the limited size of buffer to capture
sample data, dropping samples could happen while collecting data
if data is generated faster than flushing by consumer. Capturing
the dropped sample info is critical to understand how much the data
is reliable to use.

To capture the information, the new hypercall "PROFILING_GET_STATUS"
is introduced.

Tracked-On: #2474
Signed-off-by: Manisha Chinthapally <manisha.chinthapally@intel.com>
Signed-off-by: Min Lim <min.yeol.lim@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-02-01 11:44:04 +08:00
Tw
18b04451e1 efi-stub: reset all APs after entering guest mode
In current hv implementation, we assume all AP have no context before
jumping into guest mode. But this is not true in all UEFI bios. BIOS
could have enabled all (or some of) APs at first. These APs could stay
in a run loop or wait for a semaphore. But after hv takes over control from
efi-stub, all of these AP environments will be simply dropped because
we don't support AP context save/restore for now. As a result,
BSP's ExitBootService will hang forver because it's waiting for AP in its
way (by waiting for a semaphore for example), unfortunately APs are now
in the context that hv provides in which they usually stay in idle loop.

To fix the issue above, we could have two solutions:
1. Save AP's runtime context before entering hv and restore context
after hv jumps back.
2. After hv jumps back, reset all the APs in the UEFI way, so the
previous context will be thrown away and a fresh new starts. Moreover
this new one is under virtualization.

Currently, we adopt the second one by disabling all the APs before
virtualization and then enabling them after hv jumps back. A reset
will be triggered. And this is guaranteed by UEFI MP Service protocol.

Tracked-On: #2435
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-02-01 08:56:05 +08:00
Geoffroy Van Cutsem
5c9f1662db Documentation: add caption to the "PREEMPT_RT VM on ACRN" figure
Add a caption to the figure describing the Real-Time Linux VM running
on ACRN. Without this text, the HTML output does not add the Figure
number below it. That figure number is still used in the paragraph
making it hard for the reader to understand which figure is really
referenced (except by clicking on the hyperlink)

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2019-01-31 08:47:46 -08:00
Yonghua Huang
0f5c6e2c18 HV: fix address type violation for MSR_LOAD/STORE
According to SDM 24.7.2, these two MSRs should be
  configured with physical address.

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 22:23:41 +08:00
Yan, Like
17f4cd18a3 hv: fix dest of IPI for CPU with lapic_pt
With lapic_pt based on vlapic, guest always see vitual apic_id.
We need to convert the virtual apic_id from guest to physical apic_id
before writing ICR.

SMP for VM with lapic_pt is supported with this fix.

Tracked-On: #2351
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 18:18:44 +08:00
David B. Kinder
ea250c5147 doc: fixes to rt-linux tutorial
Fix a typo in the doc and add some formatting.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-01-30 21:48:52 -08:00
acrn si
1a4a1c3045 Need to delete '# CONFIG_BLK_DEV_NVME is not set' to enable NVME driver 2019-01-30 21:43:24 -08:00
wenlingz
37ce259fb9 modify create-up2-images scripts 2019-01-30 21:28:04 -08:00
yuhong.tao@intel.com
eb7091bb1f HV: add rdmsr/wrmsr debug cmd
Add these commands to  HV console:
1.rdmsr [-p<pcpu_id>] [msr_index]
  read MSR register, eg., 'rdmsr 0xc8f' read MSR with address 0xc8f;
  'rdmsr -p1 0xc8f' read MSR address 0xc8f, on PCPU1.

1.wrmsr [-p<pcpu_id>] [msr_index] [value]
  write to MSR register, eg., 'wrmsr 0xc8f 0x100000000' write
  0x100000000 to MSR, which address is 0xc8f;
  'wrmsr -p1 0xc8f 0x100000000' write 0x100000000 to MSR address
  0xc8f, on PCPU1.

Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:33:15 +08:00
yuhong.tao@intel.com
648450c62c HV: cpu: add msr_read_pcpu()& msr_write_pcpu()
Use smp_call_function() to read/write MSR register on target PCPU

Tracked-On: #2462
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:33:15 +08:00
Tw
39ffd29aa3 schedule: add magic number at the bottom of schedule stack
Add this magic number to prevent potential overflow when dumping
host stack.

Tracked-On: #2455
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:28:29 +08:00
Tw
efc64d778f hv: fix host call stack dump issue
As scheduler uses its own stack for now,
there is no need to check stack validity,
so wipe it out.

Tracked-On: #2455
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:28:29 +08:00
Li, Fei1
5214a60bbf hv: replace improper use of ASSERT with panic for parse_madt
ASSERT could be used in some situations, such as, there are some pre-assumption
for some code, using ASSERT here for debug. It could not be used for detect error
when system booting where panic should be used.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 11:09:39 +08:00
Li, Fei1
9291fbe4d6 hv: multiboot: replace improper use of ASSERT with panic
ASSERT could be used in some situations, such as, there are some pre-assumption
for some code, using ASSERT here for debug. It could not be used for detect error
when system booting where panic should be used.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
2019-01-31 11:09:39 +08:00
Li, Fei1
2474c60141 hv: replace improper use of panic with ASSERT
Panic should only be used when system booting. Once the system boot done,
it could never be used. While ASSERT could be used in some situations, such
as, there are some pre-assumption for some code, using ASSERT here for debug.

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
2019-01-31 11:09:39 +08:00
Victor Sun
a01c3cb913 doc: change term of vm0 to sos_vm
Using term of VM0 would mislead to a VM with VM id 0 easily, whereas
VM id 0 could be used for any PRE_LAUNCHED_VM. So replace VM0 with
SOS_VM.

Signed-off-by: Victor Sun <victor.sun@intel.com>
2019-01-30 17:14:26 -08:00
Mingqiang Chi
7da9161d7d hv:no need to use lock for the bit operations of local variable
Use bitmap_set_nolock/bitmap_clear_nolock instead of
bitmap_set_lock/bitmap_clear_lock for the local variable.

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-31 08:25:33 +08:00
David B. Kinder
e2cb6acba6 doc: add Trusty ACRN doc
Add the Trusty and Security Services in ACRN tutorial

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-01-30 16:18:09 -08:00