Commit Graph

60 Commits

Author SHA1 Message Date
Binbin Wu
744e09bc7e hv: define 4 vcpu modes
move enum vm_cpu_mode to guest.h
move enum vm_paging_mode to guest.h
replace REAL_MODE with CPU_MODE_REAL
replace PAGE_PROTECTED_MODE with CPU_MODE_64BIT

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-24 10:16:48 +08:00
Mingqiang Chi
2175bcafa1 hv: replace _EC with _ERROR_CODE in VMCS field
EC is not clear, replace it with ERROR_CODE.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-21 15:11:23 +08:00
Zhao Yakui
698b53adc4 HV: Add one correct Descriptor_table struct to configure VMCS
Now one uint64_t type is used to obtain the corresponding descriptor_table
for GDT/IDT. This will cause the stack protect corruption under -O2.
So the descriptor_table struct is added to configure the GDT/IDT of VMCS.

V1->V2: Move the descriptor_table into vmx.h header file
And its type is renamed from dt_addr_t to descriptor_table.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Yonghua Huang
3c119e124a check validity of 'VM-exit Int-Info' before extracting vector
1. exception vector and other information
   can be extracted from 'VM-Exit Interrupt-Information'
   field of VMCS only if bit31 (Valid) is set.
   -Intel SDM 24.9.2, Vol3

2.  Rename 'exit-interrupt_info' to 'idt_vectoring_info'
    in 'struct vcpu_arch', which is consistent with
    SDM 24.9.3, Vol3

3. 'IDT-vectoring information' in VMCS is 32bit
    -Intel SDM 24.9.3, Vol3

    Update the type of 'idt_vectoring_info' in
    'struct vcpu_arch'from 'uint32_t' to 'uint64_t'.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:25:55 +08:00
Li, Fei1
80d194cfb5 hv: vmx_capability: add cpu_has_vmx_ept/vpid_cap API
Refine and simple vmx_capability API defination.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:55 +08:00
Yonghua Huang
316731c9a5 hv: pass-through xsave feature to guests
enable Xsave feature and pass-through it to guests
 update based on v2:
  - enable host xsave before expose it to guests.
  - add validation for the value to be set to 'xcr0' before call xsetbv
    when handling xsetbv vmexit.
  - tested in SOS guest, created two threads to do different
    FP calculations,test code runs in user land of sos.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:23 +08:00
Li, Fei1
4110e25eae Add cpuinfo_x86 to cache cpu capability/feature
Add a global boot_cpu_data to cache common cpu capbility/feature
for detect cpu capbility/feature.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:19:37 +08:00
Yonghua Huang
f01a8eef58 Add APIC ACCESS VMexit handler
Update 'apic_access_exit_handler()' function to emulate
guest instruments to read/write guest's lapic registers page

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 17:19:37 +08:00
Li, Fei1
74e2bfc15f Simple get_vmx_cap()
Don't check MSR Control Features in get_vmx_cap

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-15 17:19:36 +08:00
Eddie Dong
7a3a539b17 initial import
internal commit: 14ac2bc2299032fa6714d1fefa7cf0987b3e3085

Signed-off-by: Eddie Dong <eddie.dong@intel.com>
2018-05-11 14:44:28 +08:00