Commit Graph

191 Commits

Author SHA1 Message Date
Victor Sun
49e6deaf26 HV: rename the term of vm0 to sos vm
Under sharing mode, VM0 is identical with SOS VM. But the coupling of
SOS VM and VM 0 is not friendly for partition mode.

This patch is a pure term change of vm0 to sos VM, it does not change
any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-21 18:03:31 +08:00
Victor Sun
c4a230f313 HV: rename the term of vm_description to vm_config
This patch is a pure term change of vm_description to vm_config,
the struct name of vm_description is changed to acrn_vm_config.

The patch does not change any code logic or senmantic.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-18 11:50:00 +08:00
Yan, Like
6641bc7949 hv: remove ACRN_REQUEST_TMR_UPDATE and unnecessary codes
Because ACRN_REQUEST_TMR_UPDATE is not needed anymore, this commit remove
the MACRO definition and its related logic, including following functions:
- apicv_batch_set_tmr()
- vlapic_apicv_batch_set_tmr()
- vlapic_set_tmr_one_vec()
- vioapic_update_tmr()

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Yan, Like
f15cc7d6de hv: set/clear TMR bit like hardware behave
Current ACRN implementation update TMR bits one time only when related RTE fields changed,
which is not acting like actual hardware.

From SDM vol3 10.8.4:
"Upon acceptance of an interrupt into the IRR, the corresponding TMR bit is cleared for
edge-triggered interrupts and set for leveltriggered interrupts."

This commit change the ACRN implementation to set/clear corresponding TMR bit when inject
intr to vlapic.

Tracked-On: #2343
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-17 08:48:22 +08:00
Chaohong guo
dc6d1d5fa7 HV: fix MISRA issue in apicv_pending_intr()
Remove multi-return statement in apicv_pending_intr().

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-15 13:48:19 +08:00
Chaohong guo
6a1c865671 HV: add empty else statement for if condition in vlapic.c
To meeting MISRA, add empty else {} for corresponding if-else-if {}.
Also, remove a DD flow violation in vlapic_free()

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-15 13:48:19 +08:00
Shiqing Gao
e2971ebc98 hv: vlapic: code clean-up
* rename `vlapic_set_intr_ready` to `vlapic_accept_intr`
 * replace calling of `vlapic_intr_edge` with `vlapic_set_intr`
 * remove `vlapic_intr_level` and `vlapic_intr_edge`

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-11 09:44:10 +08:00
Chaohong guo
e2c11c0c75 HV: remove multi returns in vlapic_set_apicbase
remove few calls to return statement in routines.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-03 15:58:10 +08:00
Chaohong guo
9efbdc829d HV: Remove goto in vlapic_read()
remove goto statement in vlapic_read() routine

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-03 15:58:10 +08:00
Chaohong guo
7a04db7cd8 HV: remove multiple exits in vlapic_set_intr_ready()
To meet MISRA, remove multiple return in the func.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-03 15:58:10 +08:00
Chaohong guo
0884397361 HV: cycomatic complexity 20 in vlapic_icrlo_write_handler
MISRA compaint that the vlapic_icrlo_write_handler 's cyclomatic
complexity is greater than 20. Try to remove multiple returns/exits.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00
Chaohong guo
eaa0e307b7 HV: remove multiple exit/return in routines in the file of vlapic.c
To meet MISRA, remove few return in routines of vlapic.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00
Chaohong guo
2e01b4c8dc HV: trival changes to meet MISRA
add @pre for routines and bracks for condition checking in vlapic.c

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00
Chaohong guo
971eb84c20 HV: add const qualifier for functions' argments in vlapic.c
If a argment is not changed in function, MISRA recommends to add const
qualifier for that argement.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00
Chaohong guo
5a583fb87c HV: move global variable into the scope of calling function
The static global variable apicv_apic_access_addr is used only by
vlapic_apicv_get_apic_access_addr(), to remove the warning by MISRA,
move it into function scope.

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00
Chaohong guo
235eaf057d HV: APICBASE_RESERVED definition is not used by any code. Just remove it
To meet MISRA standard, remove unused micro definition

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-02 16:22:11 +08:00
Mingqiang Chi
682824de6d hv:Change phys_cpu_num to static
-- change phys_cpu_num to static
-- add get_pcpu_nums() and is_pcpu_active() APIs
-- replace phys_cpu_num with get_pcpu_nums() except cpu.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-12-28 23:26:31 +08:00
Li, Fei1
e3fc6c3c79 hv: use int32_t replace int
Since it's typedef in "include/lib/types.h"

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-12 13:08:10 +08:00
Zide Chen
b6aaf1b8d9 hv: MSRs may need isolation between normal and secure world
- implement unified APIs to access guest_msrs[] under struct acrn_vcpu.
- use these new APIs to read/write emulated TSC_DEADLINE MSR
- switch world_msrs[] and guest_msrs[] during world switch for MSRs that
  need world isolation
- remove the old guest_msrs[] array and it's index macros.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-09 21:32:03 +08:00
Li, Fei1
c616a42251 hv: fix string assigned to non const object
String should assigned to const object

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-07 10:03:44 +08:00
Li, Fei1
79463fd5ce hv: avoid using of mixed mode arithmetic
Avoid using of mixed mode arithmetic by using explicit casts

Tracked-On: #861
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-12-05 13:17:38 +08:00
Shiqing Gao
b38629b85e hv: fix 'Space missing before or after binary operator'
This patch adds the necessary space before or after binary operator.

v1 -> v2:
 * minor fix related to integer
   [i - 1] ====> [i - 1U]

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-12-04 09:16:04 +08:00
Shiqing Gao
2f15d3569c hv: replace CPU_PAGE_SIZE with PAGE_SIZE
replace CPU_PAGE_SIZE with PAGE_SIZE
These two MACROs are duplicated and PAGE_SIZE is a more reasonable name.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-12-03 15:14:57 +08:00
Shiqing Gao
e1564edda5 hv: fix type conversion violations
This patch fixes the following violations:
 1. Implicit conversion: actual to formal param
 2. Value is not of appropriate type
 3. No cast for widening complex int expression
 4. Widening cast on complex integer expression
 5. Narrower int conversion without cast.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-30 18:14:59 +08:00
Junjie Mao
584f6b7255 doc: replace return with retval
`@return` is dedicated for brief description of return values, not for comments
stating actual return values. In addition, sphinx + breathe does not join
multiple adjacent `@return`. This results in multiple `Return` sections in the
generated document, which is confusing.

This patch replaces `@return` with `@retval` for the lists of return
values. Adjacent `@retval` can be joined into one list by breathe.

v1 -> v2:

* Replace return value descriptions like `negative` and `positive` with
  expressions like `<0` and `>0` in `@retval`.
* Keep the list of `@retval` comprehensive, even when there is a `@return` to
  generally describe what the return value means.
* Drop duplicated `@return` when it does not give more information than the
  `@retval` list.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00
Junjie Mao
97eb72a4a0 doc: always use 'None' for functions not returning a value
It is preferred to state the absence of a return value explicitly in the
doxygen-stile comments. Currently there are different styles of doing this,
including:

  @return None
  @return NULL
  @return void
  @return N/A

This patch unifies the above with `@return None`.

Tracked-On: #1595
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2018-11-30 14:55:17 +08:00
Shiqing Gao
db3c5746f3 hv: fix 'Function return value potentially unused'
MISRA-C requires that if the return value of a function call is
assigned to a local variable, this value shall be used in all paths.

This patch moves the variable assignment right before the moment that
the variable is used.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-30 06:54:54 +08:00
Huihuang Shi
2afa7173ef hv: vlapic: fix "Procedure has more than one exit point"
IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-27 14:43:16 +08:00
Shiqing Gao
d97224a4b5 hv: fix integer violations
fix the following integer violations:
1. Signed/unsigned conversion without cast
2. Literal value requires a U suffix
3. Implicit conversion of underlying type

v3 -> v4:
 * change the type of npk_loglevel/mem_loglevel/console_loglevel
   from uint32_t to uint16_t

v2 -> v3:
 * discard the return value of update_ept
 * discard changes related to npk loglevel

v1 -> v2:
 * remove the unnecessary changes related to the false positive
   issues caused by scanning tool
 * change the type of the local variable 'vlapic_id' from uint8_t
   to uint32_t in function 'vlapic_build_id'
 * change the type of the struct member 'flags' in shared_buf from
   uint64_t to uint32_t

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-14 12:46:34 +08:00
Shiqing Gao
3731b4c0ac hv: fix '(void) missing for discarded return value'
MISRA-C requires that the function call in which the returned
value is discarded shall be clearly indicated using (void).

This patch fixes the violations related to the following
function calls.
- vlapic_set_intr
- vlapic_intr_edge

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-11-13 19:24:54 +08:00
Shiqing Gao
b430b00a08 hv: fix 'Expression is not Boolean'
MISRA-C requires that the controlling expression of an if statement or
an iteration-statement shall be Boolean type.

v1 -> v2:
* update the U suffix of constant to let the type of operands
  to bit operations (&) is the same.
* update the type of 'i' from uint64_t to uint16_t in
  'profiling_set_control' since it is limited by phys_cpu_num,
  which is uint16_t.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-08 13:04:11 +08:00
Xiangyang Wu
99586e32cc HV:treewide:rename vm data structure
For data structure types "struct vm", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vm *vm-->struct acrn_vm *vm

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu
ace4f48c9a HV:treewide:rename vcpu_arch data structure
For data structure types "struct vcpu_arch", its name
shall follow Naming convention.

Naming convention rule:If the data structure type is
used by multi modules, its corresponding logic resource
is exposed to external components (such as SOS, UOS),
and its name meaning is simplistic (such as vcpu, vm),
its name needs prefix "acrn_". Variable name can be
shortened from its data structure type name.

The following udpates are made:
struct vcpu_arch arch_vcpu-->struct acrn_vcpu_arch arch

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Xiangyang Wu
fa26a16645 HV:treewide:rename vcpu data structure
For data structure types "struct vcpu", its name is identical
with variable name in the same scope. This is a MISRA C  violation.

Naming convention rule:If the data structure type is used by multi
modules, its corresponding logic resource is exposed to external
components (such as SOS, UOS), and its name meaning is simplistic
(such as vcpu, vm), its name needs prefix "acrn_".

The following udpates are made:
struct vcpu *vcpu-->struct acrn_vcpu *vcpu

Tracked-On: #861

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
2018-11-05 15:35:49 +08:00
Yonghua Huang
c41f286085 hv: revise interfaces description in vlapic
Add comments for APIs:
 - vlapic_pending_intr();
 - vlapic_pending_accepted();
 - vlapic_post_intr();
 - lapicv_get_pir_desc_paddr();
 - vlapic_intr_level();
 - vlapic_intr_edge();
 - vlapic_set_local_intr();
 - vlapic_intr_msi();

Tracked-On: #1595
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-11-03 08:40:14 -07:00
Sainath Grandhi
48ae379b4b hv: LAPIC pass-thru support for partition mode of ACRN
ACRN, in partition mode, supports LAPIC pass-thru to guests. Guest needs
to use x2APIC mode of LAPIC for pass-thru to be enabled.

ACRN also needs the user to configure lapic_pt to true in vm_desc
for the VM.

Interrupt Command Register (ICR) is the only APIC register that is
intercepted. Reference code in partition/vm_description.c enables
LAPIC pass-thru for vm2.

Tracked-On: #1626
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Xu Anthony <anthony.xu@intel.com>
2018-11-02 13:48:43 +08:00
Sainath Grandhi
f3aa20a8ac hv: self-IPI APIC register in x2APIC mode of guest vLAPIC
This patch adds support for self-IPI virtualization when guest
uses vLAPIC in x2APIC mode.

Tracked-On: #1626
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Xu Anthony <anthony.xu@intel.com>
2018-11-02 13:48:43 +08:00
Sainath Grandhi
c85e35d31b hv: Switch APICv from MMIO to MSR for x2APIC mode of guest vLAPIC
When guest switches from xAPIC mode to x2APIC mode of vLAPIC operation,
MSRs are used to access vLAPIC. This patch adds APICv support for
MSR accesses to vLAPIC. Switching from xAPIC to x2APIC is supported via
APIC BASE MSR. Other modifications like disabling and switching back to
xAPIC are not supported.

Tracked-On: #1626
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Xu Anthony <anthony.xu@intel.com>
2018-11-02 13:48:43 +08:00
Sainath Grandhi
cf4d191272 hv: Modify vlapic_get_apicid for x2APIC mode of vLAPIC
This patch adds support to return APIC ID if guest uses vLAPIC
in x2APIC mode.

Tracked-On: #1626
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Xu Anthony <anthony.xu@intel.com>
2018-11-02 13:48:43 +08:00
Sainath Grandhi
80b6e62735 hv: Add APIs to convert x2APIC MSR accesses to LAPIC MMIO offset
This patch converts x2APIC MSR accesses to corresponding LAPIC MMIO offset to
utitlize vlapic_write/read APIs to virtualize LAPIC. Also adds support to inject
GP fault when read-only registers are attempted to be written to or vice versa.

Tracked-On: #1626
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Xu Anthony <anthony.xu@intel.com>
2018-11-02 13:48:43 +08:00
Sainath Grandhi
e9fe6efd81 hv: vLAPIC ICR write and destination mask matching for x2APIC
When guest uses vLAPIC in x2APIC mode, ICR write is a single MSR write.
Also, the destination field for device interrupts and IPIs should not be
handled in the same way as xAPIC mode. This patch adds support for x2APIC
mode operation of guest vLAPIC.

Tracked-On: #1626
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Xu Anthony <anthony.xu@intel.com>
2018-11-02 13:48:43 +08:00
Sainath Grandhi
6a4dcce390 hv: APIs for building x2APIC ID and LDR
x2APIC ID and LDR are in different format compared to xAPIC mode of operation.
This patch adds code to build ID and LDR when guest uses vLAPIC in x2APIC mode.

Tracked-On: #1626
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Xu Anthony <anthony.xu@intel.com>
2018-11-02 13:48:43 +08:00
Sainath Grandhi
64f61961bf hv: add missing support to intercept x2APIC MSRs
Accessing x2APIC MSRs in xAPIC mode should result in GP exception according
to SDM section 10.12.2. Adding support to ACRN to inject GP into guests for
the same reason.

Tracked-On: #1626
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Xu Anthony <anthony.xu@intel.com>
2018-11-02 13:48:43 +08:00
Shiqing Gao
60d0a75243 hv: fix integer violations
The operands to shift operations (<<, >>) shall be unsigned integers.

v1 -> v2:
 * replace 12U with CPU_PAGE_SHIFT when it is address shift case.
 * replace 6UL with 0x6UL

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-31 15:01:57 +08:00
Sainath Grandhi
569ababd86 hv: switch vLAPIC mode vlapic_reset
Guest OS can use vLAPIC in x2APIC mode. Upon vlapic_reset, vLAPIC should
be set to xAPIC mode.

Tracked-On: #1626
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-10-30 14:37:26 +08:00
Huihuang Shi
e24899d9c9 fix "Recursion in procedure calls found"
Functions shall not call themselves, either directly or indirectly.
V1->V2:
    add pre-assumption.
V2->V3:
    when vector < 16,call vlapic_set_error

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-29 14:18:28 +08:00
Mingqiang Chi
4afb6666b9 hv:cleanup vcpu_id compare with phys_cpu_num
Currently we compare vcpu_id with phys_cpu_num,
vcpu_id is not related with phys_cpu_num,
this patch cleanup them.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-29 10:14:25 +08:00
Mingqiang Chi
1568a4c095 hv:Remove deadcode 'vm_lapic_from_pcpuid'
This api is not used, remove it.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-10-25 13:45:40 +08:00
Huihuang Shi
ea32c34ae1 HV:fix "Pointer param should be declared pointer to const"
Fix violations for function whose parameter can be read-only.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:45:14 +08:00
Huihuang Shi
60b216a460 HV:fixed "Pointer param should be declared pointer to const"
Pointer param should be declared pointer to const if
the parameter is keeped read-only.
This patch changes pointer param whose name is vm.

Tracked-On:#861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-19 22:49:38 +08:00