This patch adds CPU frequency info extraction for board_inspector.
It is supposed to be used by ACRN CPU performance management.
Including those:
- Capabilities for HWP base regs, and turbo boost, by reading cpuids.
- Reporting all CPUID bits in LEAF 06H.
- Max none turbo ratio and max turbo ratio, by reading MSRs.
- HWP capabilities, by reading IA32_HWP_CAPABILITIES. Reading this
register requires HWP enabled in IA32_PM_ENABLE. (SDM Vol3 14.4.2:
Additional MSRs associated with HWP may only be accessed after HWP
is enabled)
- ACPI _PSD info, by reading sys nodes of Linux acpi-pstate driver.
This table describes frequency domains in which CPUs shares the same
frequency.
Tracked-On: #8168
Signed-off-by: Wu Zhou <wu.zhou@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
On some platforms the L3 CAT capabilities are not reported via CPUID even
though they are present. The public real-time tuning guide suggests to try
accessing the MSRs directly to detect if L3 CAT is available or not.
This patch implements such guessing logic in the board inspector in order
to enable CAT for users with those kinds of platforms.
Tracked-On: #7948
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In v3.0 the msrfield class has its initializer changed in a way that is
incompatible with the parameter names or the getter/setter. When introduced
from the BITS project, that class allows specifying an MSR field of
arbitrary length by being given the index of the most and least significant
bits.
This patch restores the original behavior of that msrfield class and moves
the use-case specific methods, namely is_vmx_cap_supported and
is_ctrl_setting_allowed, to a helper class.
Parsing of the VMX capability reporting MSRs in msr.py are updated
accordingly, and brief documentation of the MSR fields are added as well.
Tracked-On: #7948
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
1. check if VMX feature is enabled in the BIOS setting.
If disabled, board inspector will show error message.
2. check if Hyper-Threading is enabled in the BIOS setting.
If enabled, board inspector will show warning message.
3. check if VT-d is enabled in the BIOS setting.
If disabled, board inspector will show error message.
v2-->v3:
Use the class names instead of addresses, and invoke the rdmsr method
of each class.
v1-->v2:
1. For the Hyper-Threading BIOS check, update the log level to the warning.
2. For VMX invalid BIOS check, the XDS does the actual check,
the board inspector only collects information.
Tracked-On: #6689
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Add CPU capability checks.
If a feature is not supported on this processor, the board inspector
will show error message because it would impact ACRN’s ability
to function properly.
v3-->v4:
Update the error messages.
v2-->v3:
1. For VMX features, split each feature as a separate property, capability
checks in XML schema will then check all those features.
2. Use the class names instead of addresses, and invoke the rdmsr method
of each class.
v1-->v2:
1. Define each register as a class inheriting the `MSR` class defined
in platformbase.py, and define each bit as fields of that class.
2. The board inspector simply collects the CPU capability and attribute,
and the XSD does the actual check
Tracked-On: #6689
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
