If we don't enforce passing BOARD_FILE/SCENARIO_FILE param to
hypervisor/Makefile, the BOARD_FILE/SCENARIO_FILE value would
not be overridden to its realpath in hypervisor/Makefile when
make hypervisor.
Tracked-On: #4067
Signed-off-by: Victor Sun <victor.sun@intel.com>
Move hypervisor related include path from CFLAGS to INCLUDE_PATH to make
structure more clean.
Tracked-On: #3779
Signed-off-by: Victor Sun <victor.sun@intel.com>
We now have four methods to configure board and scenario when
build acrn (sorted with priority):
1. Change them with "make menuconfig" in hypervisor directory
2. Give baord_file/scenario_file as make command parameters
3. Give BOARD/SCENARIO as make command parameters
4. Use BOARD/SCENARIO default value defined in Makefile file
With this patch, we make sure we follow priority exactly.
Tracked-On: #4067
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Signed-off-by: Victor Sun <victor.sun@intel.com>
Currently make hypervisor will depend on a $(BOARD).config file to load
board defconfig which triggered by oldconfig process, this will block
make from XMLs for a new board because $(BOARD).config never exist.
This requires us to patch configuration for new board earlier than make
oldconfig.
Tracked-On: #4067
Signed-off-by: Victor Sun <victor.sun@intel.com>
In non-64-bit mode, CS segment base address should be considered when
determining the linear address of the vcpu's instruction pointer. Use
vie_calculate_gla() for instruction address translation which also takes
care of 64-bit mode.
Tracked-On: #4064
Signed-off-by: Peter Fang <peter.fang@intel.com>
without the msr.h file the build will be failed when CAT is enabled.
Tracked-On: #4066
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
For vuart1, if it's mapped to a real native serial port, we must
re-use the native serial port io base and irq number. If no native
serial port is mapped to vuart1, non-exist io base and irq should
be used.
Please note: UOS launch script may need be updated according to
which serial port index is used by vuart1.
Now, we are using ttyS1 of SOS for vuart1 in our release. User may
need to remap vuart to different ttySx by following above rule if
ttyS1 in user platform is used by other devices like Bluetooth/Wifi.
Tracked-On: #4016
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-On: Victor Sun <victor.sun@intel.com>
Enable xhci usb mediator for whl-ipc-i5/whl-ipc-7 and KBL NUC for LaaG
and WaaG.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Enhance the $(board).config for new board.
Serial config should be set in $(board).config for new board.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
mem_size should be set from xml, it should not be overrided dynamically.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
interrupt_storm should be enabled while passthrough device was set.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add support to generate launch script for whl-ipc-i5/whl-ipc-i7.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. run_cotainer is linux type uos, remove related runC script from
unnercessary luanch script.
Tracked-On: #3930
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add board/scenario/launch config files for whl-ipc-i7.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Add board/scenario/launch config files for whl-ipc-i5.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
keep_gsi is needed as a workaround for the device that support both
MSI and legacy interrupt, so keep the flag for Android only because
it is not sure for some wifi/audio device on other Linux guest.
Tracked-On: #3956
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The default binary will not support 2 core/2 thread hardware from V1.3;
KBL NUC7i5DNH has serial port;
Add cores and threads for CPU of hardware listed;
Signed-off-by: Xie Zhengtian <zhengtian.xie@intel.com>
1. Parse DRHD_INFO section from board config xml, and generate dmar
structure information to board.c
2. Copy macro of DRHD_INFO from board config xml to $(board)_acpi_platform.h
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Since msr_index relys on the MSR_IA32_L2_QOS_MASKn(n:max to 3)
macro which defined in hv source code, generate array that CLOS number
more than 4 means need define more than 4 macro.
This patch solve such issue by using MSR_IA32_L2/L3_MASK_BASE with the
msr index offset.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The DRHD_INFO section should be updated with the refinement patches for
parsing DMAR table.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
1. Initialize DRHDn_DEVSCOPEn_TYPE/DRHDn_DEVSCOPEn_ID for each devscope;
2. Remove DRHDn_IOAPIC_ID macro;
2. Refine the value format from base 10 to 16.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Previous DRHD and device scope number are hard coded to 4, this patch removes
the limitation and parse the real drhd count/devscope count dynamically.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The DRHDx_IGNORE should be defined to true when DRHD device BDF equal to
the given CONFIG_GPU_SBDF.
Tracked-On: #3854
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
MISRA C requires specified bounds for arrays declaration, previous declaration
of platform_clos_array in board.h does not meet the requirement.
Tracked-On: #3987
Signed-off-by: Victor Sun <victor.sun@intel.com>
