This patch adds the acpiparser.aml.builder module which provides methods to
construct AML trees from scratch in Python. Similar to how parsers and
binary generators are implemented, this module constructs most builder
methods from the AML grammar defined in the acpiparser.aml.grammar
module. AML objects whose grammar are not present in the grammar module
require special treatment and their builders are implemented
explicitly. The methods have the same name as the AML tree labels defined
in the grammar.
In addition, this module also provides the method `build_value` which
converts plain integers, strings or interpreter values (which are defined
in the datatypes module) to AML trees.
With the builders, the `interpret_method_call` method in the
ConcreteInterpreter is refined to build the (fake) MethodInvocation node
using the builders and handle the actual parameters as well.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Tree visitors usually have a fixed direction (either top-down or bottom-up)
and invoking a visitor with a wrong direction typically leads to unintended
behavior. However, the current implementation exposes both `visit_topdown`
and `visit_bottomup` methods to users, allowing callers to invoke the
visitors in an undesigned way. The same issue exists in the implementation
of transformers.
This patch refactors the base classes of visitors and transformers so that
they require an explicit direction from their sub-classes to
initialize. Callers of the visitors and transformers are now expected to
invoke the `visit` or `transform` methods without assuming the correct
direction of the visitor or transformer. The original `visit_topdown` or
`visit_bottomup` methods (or their transformer counterparts) are now
used to initialize the `visit` method and can be used by the subclasses in
case those subclasses visits the tree in a customized manner.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch introduces a visitor that converts an arbitrary AML tree to an
AML binary. Most nodes can be converted in a straightforward way by
following the defined grammar, but the following nodes require some
additional effort:
- NameStrings can be formatted as either a NameSeg (i.e. four upper case
characters), a DualNamePath, a MultiNamePath or a NullName.
- PkgLengths are recalculated according to the actual length of the
following object (in case they are changed dynamically after being
generated by the parser) and generated following the AML encoding of
such lengths.
The visitor works in a bottom-up manner, i.e. the children are visited and
converted to binary before the parent.
The whole trees parsed from DSDT/SSDTs are now also stored in the Context
for further reference.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
_STR is another device identification object defined in ACPI spec that
describes a device. This patch collects this string (when available) into
board XML as well.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the property `irqs` to the class SmallResourceitemIRQ so
that the list of IRQs encoded in this resource item can be retrieved
easily.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds a parser to the PCI routing tables returned by _PRT objects
of platform devices. The parsed result is a list of PRTMappingPackage
instances, each of which is a named tuple with the following fields:
* address: a dword with higher 16 bits being the function number and
lower 16 bits all 1's.
* pin: a byte representing the mapped pin.
* source: either a DeviceDecl of the device that allocates the interrupt
line, or the byte 0.
* source_index:
- If `source` is a DeviceDecl, this is the index of the interrupt
source within that device.
- If `source` is 0, this is the interrupt line connected to the pin.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Local variables can be assigned with formal arguments in AML. As a result
when interpreting a DefReturn node, the interpreter shall unwrap multiple
layers of argument/local variable wrappings until a concrete value is
found. This patch implements this logic.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Resource template buffers always end with an end tag. Concatenation of two
resource buffers thus requires that the end tag of the first buffer is
stripped. This patch adds this logic to the interpretation of DefConcatRes
AML nodes.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The warning, info and debug logging levels are intended to be used in the
following way.
* Warnings are used when users are expected to be aware of a certain
failure.
* Info messages are used to track parsing process and major internal
errors for development.
* Debug messages are used to collect verbose debug logs.
To align the current usage of logs to the above guidelines, this patch
adjusts the logging level of the following messages:
* DSDT/SSDT interpretation failures are now warnings, not information
* Failures of parsing deferred AML blocks are now information, not debug
messages
The default log level when running `cli.py` is adjusted to WARNING as well,
as INFO is primarily used for development. A new command line option
`loglevel` is added to adjust the log level per user needs.
v2 -> v3:
* Make address collisions in ACPI namespace as an info rather than a
warning.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
A DualNamePath clause is a NamePath that only follows rootchar or
prefixpath. Thus, it is never necessary to check if a dot is necessary for
separating segments before a DualNamePath. This patch removes the code that
conduct that check.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
It is seen occasionally that a memory/port BAR of a PCI device is
programmed with the address 0 which is clearly invalid. This patch
gracefully handles this case by printing an error to warn the users that
this device cannot be passed through to any VM.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
According to section 19 of ACPI spec 6.4, the following clauses open name
scopes (in addition to the Scope clauses).
- Function
- Device
- Method
- Power Resource
- Thermal Zone
The current AML parser only opens a scope when parsing DefMethod and
DefDevice, however. This patch fixes the AML parsing by opening a scope on
visiting a DefPowerRes or DefThermalZone clause.
Note: Functions in ASL are equivalent to Methods at AML level.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current ConditionallyUnregisterSymbolVisitor has the following two
issues.
1. The visitor will crash when a DefIfElse node is not fully parsed due
to failed deferred expansion.
2. Nested DefIfElse of disabled blocks are still checked and one of its
branch may still take effect.
This patch fixes those issues by checking the predicates of a DefIfElse
block only when conditionally_hidden is False and check existence of
TermList and DefElse clauses.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
When parsing a sequence of clauses, it is not necessary to peek an opcode
from the current stream unless that sequence starts with one. Peeking an
opcode is even an error when the actual clause is empty (e.g. as a
TermList).
This patch makes the SequenceFactory only peeking at the next opcode when
the grammar expects one.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch refines the AML parser to improve its readability and
performance in the following ways.
1. A Tree object now has the parts of the corresponding object being
member fields. As an example, a Tree with label `DefMethod` now has
members `NameString`, `MethodFlags` and `TermList`.
2. It is now possible to assign names each part of an object. The grammar
is updated to assign different names to the parts with the same type
in the same object.
3. Invocation to intermediate factories is now skipped. As an example,
when parsing a ByteConst that acts as a ByteIndex, the original
implementation invokes the following factories in sequence:
ByteIndex -> TermArg -> DataObject -> ComputationalData -> ByteConst
The factories TermArg, DataObject and ComputationalData does nothing
but forward the parsing to the next-level factory according to the
opcode of the next object. With this patch, the invocation sequence
becomes:
ByteIndex -> ByteConst
i.e. ByteIndex directly passes to ByteConst which can parse the next
opcode.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current ACPI AML parser can generate incorrect AST if a DSDT/SSDT
satisfies the following:
1. The body of a method invokes a NameString that is defined later.
2. Before that method the same NameString is also defined but in an outer
scope and with a different number of parameter.
Since method bodies hardly define any further symbol that is referenced
outside the method itself, this patch forces the parsing of method bodies
to be deferred to the second pass when all symbols have been declared.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current implementation of I/O buffers have the following issues.
1. I/O buffers are filled with values on creation. This may be fine for
memory-mapped I/O regions, but could be a problem to port I/O regions
and indexed I/O regions.
2. While not commonly seen, it IS witnessed that some devices only allow
its MMIO registers to be accessed with certain width. Accessing such
registers with a larger width will not be handled by the device,
causing SW to get all 1's rather than the actual values in these
registers.
This patch resolves the issues above as follows:
1. I/O buffers now do not access any register on creation. Instead, the
register is accessed only upon requests.
2. The access width of these registers are followed to ensure that the
registers are accessed properly.
The classes that represents buffers when interpreting AML is also
refactored to abstract the common code that manages fields within
buffers. The class hierarchy now looks like this:
BufferBase: Implement methods that registers, reads or writes fields
Buffer(BufferBase): Implement memory buffer
StreamIOBuffer(BufferBase): Implement I/Os available via /dev files
IndexedIOBuffer(BufferBase): Implement I/Os via index/data registers
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
DefDevide is now enountered when interpreting host DSDT/SSDT. This patch
implements the interpretation of the integer division operation.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The current implementation of the AML interpreter continues interpreting a
method after meeting a DefReturn object, which is incorrect. This patch
fixes this issue by raising a dedicated exception on return and catching
that exception on the caller side.
Tracked-On: #6298
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Update generic_board/generic_code folder with compile result
on the nuc11tnbi5 platform.
Tracked-On: #6292
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
config editor creates the default scenario xmls and launch xmls
based on generic configs when users import a new board.
Tracked-On: #6208
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
add interface to save scenario xmls and launch xmls to user defined
path in config editor; move all config xmls and generated scripts
out of acrn-hypervisor.
Tracked-On: #6208
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
While running in a nested environment, such as qemu, parse the board
information should be allowed even it is not in a native environment.
Replace the error with warning message and does not exit the program.
Tracked-On: #6208
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Enlarge the max size to store the PTCT/RTCT table to 1k bytes
because the size of RTCT table exceeded the original max size
0x1100 - 0xF00 which makes RTCT table overlap other ACPI tables.
Tracked-On: #6303
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. Update the vaule of the tag CLOS_MASK to 0xfffff according to board.xml
in all scenario xml files.
2. Replace industry_launch_2uos.xml launch file with industry_launch_6uos.xml.
3. Update logical_partition.xml file.
4. Remove hybrid_rt.xml file, then add a second POST_STD_VM in hybrid.xml and
add hybrid_launch_2uos.xml launch file correspondingly.
Tracked-On: #6244
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Add the MSI-X capability structure nodes under <capability
id="MSI-X"> in board.xml.
Example:
<capability id="MSI-X">
<table_size>16</table_size>
<table_bir>1</table_bir>
<table_offset>0x1000000</table_offset>
<pba_bir>1</pba_bir>
<pba_offset>0x0</pba_offset>
</capability>
Fix the MSI <count> nodes when there is only one vector.
Tracked-On: #6235
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
The PR 6236 has modified the board.xml format for MAX_MSIX_TABLE_NUM fix.
To compromise this PR, updates all the source file board.xmls.
Tracked-On: #6235
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
IC_ASSIGN_MMIODEV -> ACRN_IOCTL_ASSIGN_MMIODEV
IC_DEASSIGN_MMIODEV -> ACRN_IOCTL_DEASSIGN_MMIODEV
struct acrn_mmiodev has slight change. Move struct acrn_mmiodev into
acrn_common.h because it is used by both DM and HV.
Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
In launch script, update cpu offline method to fix the issue
that it isn't offline cpu on ADL-S board.
Tracked-On: #6266
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. Update the necessary libraries to consistent with the "Build ACRN From Source"
document in the "Getting Started Guide" document.
2. Delete the related introduction with acrngt.conf and launch_uos_id1.sh files in
"Getting Started Guide" document.
3. Update WHL-IPC-I7 board's processor in Supported HW document.
4. Add cpu_affinity element's description in ACRN Configuration Data.
5. Update the description for shm_region in Launch XML format.
6. Update configurable/readonly attributes values.
7. Update the description for hv.CAPACITIES.MAX_MSIX_TABLE_NUM in schema/config.xsd.
Tracked-On: #5692
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
1. Update the value of the tag MAX_MSIX_TABLE_NUM from 64 to empty
for all scenario xml except ehl-crb-b board.
2. Update the value of the tag MAX_MSIX_TABLE_NUM to 96 for the
scenario xml on the ehl-crb-b board.
Tracked-On: #6186
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Update the value of the tag MAX_PT_IRQ_ENTRIES from 64 to 128
in TGL-RVP scenario xml.
Tracked-On: #6185
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
A vmsix supported passthrough device expects the first unused bar region
for vmsix. Pop the first unused_bar_index in gpa.py instead.
Reference code: init_vmsix_on_msi of hypervisor\dm\vpci\vmsix_on_msi.c
Tracked-On: #6192
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Without this, the GUEST_FLAG_NVMX_ENABLED doesn't show up in the
drop-down list of "guest_flags" in the ACRN config GUI.
Tracked-On: #5923
Signed-off-by: Zide Chen <zide.chen@intel.com>
Update the content about getting board xml from native
enviroment in acrn_configuration_tool.rst and README.
Tracked-On: #6134
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Refine get_pt_intx_table. The method parse the <pt_inx> of scenario and
append the pair of phys_gsi and virt_gsi if there is any.
Refine check_pt_intx. Add a condition that the method returns if the
phys_gsi and virt_gsi are empty dictionary.
Tracked-On: #6178
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Add flag "allow_trigger_s5" to launch script xmls. If this flag sets to
'y' and the poweroff_channel sets to "vuart1(pty)" or "vuart1(tty)", the
"allow_trigger_s5" will appends to the end of "--pm_notify_channel
uart".
Tracked-On: #6138
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Make up qemu.xml to compromise the static allocators which use the
new xpath based on board inspector.
Tracked-On: #6102
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
For illegal characters, replace original characters with escaped characters in board.xml.
Tracked-On: #6113
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
Modify the initial value of PT_SLOT variable and
update the get slot logic that all device call the virtual_dev_slot function to get slot number directly.
Copy the launch_uos_id1.sh to launch_win.sh.
Tracked-On: #6072
Signed-off-by: Kunhui Li <kunhuix.li@intel.com>
